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GET /api/patches/77824/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 77824,
    "url": "https://patches.dpdk.org/api/patches/77824/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200916031002.42122-3-junyux.jiang@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200916031002.42122-3-junyux.jiang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200916031002.42122-3-junyux.jiang@intel.com",
    "date": "2020-09-16T03:09:59",
    "name": "[v3,2/5] net/ice: add flow director enabled switch value",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "077b16dbf0acf2855bb916721f392f79e657c171",
    "submitter": {
        "id": 1408,
        "url": "https://patches.dpdk.org/api/people/1408/?format=api",
        "name": "Junyu Jiang",
        "email": "junyux.jiang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200916031002.42122-3-junyux.jiang@intel.com/mbox/",
    "series": [
        {
            "id": 12253,
            "url": "https://patches.dpdk.org/api/series/12253/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12253",
            "date": "2020-09-16T03:09:57",
            "name": "supports RxDID #22 and FDID",
            "version": 3,
            "mbox": "https://patches.dpdk.org/series/12253/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/77824/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/77824/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F211CA04C7;\n\tWed, 16 Sep 2020 05:27:36 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8677A1C11D;\n\tWed, 16 Sep 2020 05:27:28 +0200 (CEST)",
            "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id C05A21C10E\n for <dev@dpdk.org>; Wed, 16 Sep 2020 05:27:25 +0200 (CEST)",
            "from orsmga002.jf.intel.com ([10.7.209.21])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 15 Sep 2020 20:27:25 -0700",
            "from unknown (HELO intel.sh.intel.com) ([10.239.255.60])\n by orsmga002.jf.intel.com with ESMTP; 15 Sep 2020 20:27:23 -0700"
        ],
        "IronPort-SDR": [
            "\n I+kB5IYldWs1ctZBptPo4TsqONtmJ7+uLSNnpI499UJ7E6aNWqUtuSRDSXj7TjQ/vdXtql7LKk\n twWQW8cxprTg==",
            "\n gbnPKcEMoWLjCPe1GhlzkNVgL9EN8eaZ0HJcRuOiAMV0+BvFvgY6sAOUuJVGFTsILkgrS64lKP\n yDpF0EnCk5PA=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9745\"; a=\"147143648\"",
            "E=Sophos;i=\"5.76,431,1592895600\"; d=\"scan'208\";a=\"147143648\"",
            "E=Sophos;i=\"5.76,431,1592895600\"; d=\"scan'208\";a=\"319692327\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Junyu Jiang <junyux.jiang@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Leyi Rong <leyi.rong@intel.com>, Qi Zhang <qi.z.zhang@intel.com>,\n Qiming Yang <qiming.yang@intel.com>, Guinan Sun <guinanx.sun@intel.com>",
        "Date": "Wed, 16 Sep 2020 03:09:59 +0000",
        "Message-Id": "<20200916031002.42122-3-junyux.jiang@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20200916031002.42122-1-junyux.jiang@intel.com>",
        "References": "<20200826075501.50052-1-guinanx.sun@intel.com>\n <20200916031002.42122-1-junyux.jiang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v3 2/5] net/ice: add flow director enabled switch\n\tvalue",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Guinan Sun <guinanx.sun@intel.com>\n\nThe patch adds fdir_enabled flag to identify if parse flow director mark ID\nfrom flexible Rx descriptor.\n\nSigned-off-by: Guinan Sun <guinanx.sun@intel.com>\n---\n drivers/net/ice/ice_ethdev.h      |  2 ++\n drivers/net/ice/ice_fdir_filter.c |  9 ++++++++-\n drivers/net/ice/ice_rxtx.h        | 30 ++++++++++++++++++++++++++++++\n 3 files changed, 40 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex e8c9971fb..366eee3b4 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -291,6 +291,7 @@ struct ice_fdir_filter_conf {\n \n \tuint64_t input_set;\n \tuint64_t outer_input_set; /* only for tunnel packets outer fields */\n+\tuint32_t mark_flag;\n };\n \n #define ICE_MAX_FDIR_FILTER_NUM\t\t(1024 * 16)\n@@ -471,6 +472,7 @@ struct ice_adapter {\n \tbool is_safe_mode;\n \tstruct ice_devargs devargs;\n \tenum ice_pkg_type active_pkg_type; /* loaded ddp package type */\n+\tuint16_t fdir_ref_cnt;\n };\n \n struct ice_vsi_vlan_pvid_info {\ndiff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c\nindex e0ce1efb0..175abcdd5 100644\n--- a/drivers/net/ice/ice_fdir_filter.c\n+++ b/drivers/net/ice/ice_fdir_filter.c\n@@ -1318,6 +1318,9 @@ ice_fdir_create_filter(struct ice_adapter *ad,\n \t\tgoto free_counter;\n \t}\n \n+\tif (filter->mark_flag == 1)\n+\t\tice_fdir_rx_parsing_enable(ad, 1);\n+\n \trte_memcpy(entry, filter, sizeof(*entry));\n \tret = ice_fdir_entry_insert(pf, entry, &key);\n \tif (ret) {\n@@ -1390,6 +1393,10 @@ ice_fdir_destroy_filter(struct ice_adapter *ad,\n \t}\n \n \tice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, false);\n+\n+\tif (filter->mark_flag == 1)\n+\t\tice_fdir_rx_parsing_enable(ad, 0);\n+\n \tflow->rule = NULL;\n \n \trte_free(filter);\n@@ -1562,7 +1569,7 @@ ice_fdir_parse_action(struct ice_adapter *ad,\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_MARK:\n \t\t\tmark_num++;\n-\n+\t\t\tfilter->mark_flag = 1;\n \t\t\tmark_spec = actions->conf;\n \t\t\tfilter->input.fltr_id = mark_spec->id;\n \t\t\tfilter->input.fdid_prio = ICE_FXD_FLTR_QW1_FDID_PRI_ONE;\ndiff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h\nindex e21ba152d..9fa57b3b2 100644\n--- a/drivers/net/ice/ice_rxtx.h\n+++ b/drivers/net/ice/ice_rxtx.h\n@@ -70,6 +70,7 @@ struct ice_rx_queue {\n \n \tuint8_t port_id; /* device port ID */\n \tuint8_t crc_len; /* 0 if CRC stripped, 4 otherwise */\n+\tuint8_t fdir_enabled; /* 0 if FDIR disabled, 1 when enabled */\n \tuint16_t queue_id; /* RX queue index */\n \tuint16_t reg_idx; /* RX queue register index */\n \tuint8_t drop_en; /* if not 0, set register bit */\n@@ -245,4 +246,33 @@ uint16_t ice_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n int ice_fdir_programming(struct ice_pf *pf, struct ice_fltr_desc *fdir_desc);\n int ice_tx_done_cleanup(void *txq, uint32_t free_cnt);\n \n+#define FDIR_PARSING_ENABLE_PER_QUEUE(ad, on) do { \\\n+\tint i; \\\n+\tfor (i = 0; i < (ad)->eth_dev->data->nb_rx_queues; i++) { \\\n+\t\tstruct ice_rx_queue *rxq = (ad)->eth_dev->data->rx_queues[i]; \\\n+\t\tif (!rxq) \\\n+\t\t\tcontinue; \\\n+\t\trxq->fdir_enabled = on; \\\n+\t} \\\n+\tPMD_DRV_LOG(DEBUG, \"FDIR processing on RX set to %d\", on); \\\n+} while (0)\n+\n+/* Enable/disable flow director parsing from Rx descriptor in data path. */\n+static inline\n+void ice_fdir_rx_parsing_enable(struct ice_adapter *ad, bool on)\n+{\n+\tif (on) {\n+\t\t/* Enable flow director parsing from Rx descriptor */\n+\t\tFDIR_PARSING_ENABLE_PER_QUEUE(ad, on);\n+\t\tad->fdir_ref_cnt++;\n+\t} else {\n+\t\tif (ad->fdir_ref_cnt >= 1) {\n+\t\t\tad->fdir_ref_cnt--;\n+\n+\t\t\tif (ad->fdir_ref_cnt == 0)\n+\t\t\t\tFDIR_PARSING_ENABLE_PER_QUEUE(ad, on);\n+\t\t}\n+\t}\n+}\n+\n #endif /* _ICE_RXTX_H_ */\n",
    "prefixes": [
        "v3",
        "2/5"
    ]
}