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GET /api/patches/7640/?format=api
{ "id": 7640, "url": "https://patches.dpdk.org/api/patches/7640/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1444874628-5453-31-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1444874628-5453-31-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1444874628-5453-31-git-send-email-wenzhuo.lu@intel.com", "date": "2015-10-15T02:03:43", "name": "[dpdk-dev,v2,30/35] e1000/base: use the correct i210 register for EEMNGCTL", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "06ed935187cdd959ceb55086bd68a847e7215acc", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1444874628-5453-31-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/7640/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/7640/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id DF38E9356;\n\tThu, 15 Oct 2015 04:05:09 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id E7AFC923A\n\tfor <dev@dpdk.org>; Thu, 15 Oct 2015 04:05:04 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby fmsmga101.fm.intel.com with ESMTP; 14 Oct 2015 19:05:05 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 14 Oct 2015 19:05:05 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t9F251Zo006247;\n\tThu, 15 Oct 2015 10:05:01 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9F24wfc005978; Thu, 15 Oct 2015 10:05:00 +0800", "(from wenzhuol@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9F24wCs005974; \n\tThu, 15 Oct 2015 10:04:58 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.17,683,1437462000\"; d=\"scan'208\";a=\"826988794\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Date": "Thu, 15 Oct 2015 10:03:43 +0800", "Message-Id": "<1444874628-5453-31-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1444874628-5453-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1444804479-14840-1-git-send-email-wenzhuo.lu@intel.com>\n\t<1444874628-5453-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 30/35] e1000/base: use the correct i210\n\tregister for EEMNGCTL", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The i210 has two EEPROM access registers that are located in\nnon-standard offsets: EEARBC and EEMNGCTL. EEARBC was fixed previously\nand EEMNGCTL should also be corrected.\n\nSigned-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\n---\n drivers/net/e1000/base/e1000_i210.c | 30 ++++++++++++++++++++++++++++++\n drivers/net/e1000/base/e1000_regs.h | 1 +\n 2 files changed, 31 insertions(+)", "diff": "diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c\nindex fedf88e..277331c 100644\n--- a/drivers/net/e1000/base/e1000_i210.c\n+++ b/drivers/net/e1000/base/e1000_i210.c\n@@ -982,6 +982,35 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)\n }\n \n /**\n+ * e1000_get_cfg_done_i210 - Read config done bit\n+ * @hw: pointer to the HW structure\n+ *\n+ * Read the management control register for the config done bit for\n+ * completion status. NOTE: silicon which is EEPROM-less will fail trying\n+ * to read the config done bit, so an error is *ONLY* logged and returns\n+ * E1000_SUCCESS. If we were to return with error, EEPROM-less silicon\n+ * would not be able to be reset or change link.\n+ **/\n+STATIC s32 e1000_get_cfg_done_i210(struct e1000_hw *hw)\n+{\n+\ts32 timeout = PHY_CFG_TIMEOUT;\n+\tu32 mask = E1000_NVM_CFG_DONE_PORT_0;\n+\n+\tDEBUGFUNC(\"e1000_get_cfg_done_i210\");\n+\n+\twhile (timeout) {\n+\t\tif (E1000_READ_REG(hw, E1000_EEMNGCTL_I210) & mask)\n+\t\t\tbreak;\n+\t\tmsec_delay(1);\n+\t\ttimeout--;\n+\t}\n+\tif (!timeout)\n+\t\tDEBUGOUT(\"MNG configuration cycle has not completed.\\n\");\n+\n+\treturn E1000_SUCCESS;\n+}\n+\n+/**\n * e1000_init_hw_i210 - Init hw for I210/I211\n * @hw: pointer to the HW structure\n *\n@@ -998,6 +1027,7 @@ s32 e1000_init_hw_i210(struct e1000_hw *hw)\n \t\tif (ret_val != E1000_SUCCESS)\n \t\t\treturn ret_val;\n \t}\n+\thw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;\n \tret_val = e1000_init_hw_82575(hw);\n \treturn ret_val;\n }\ndiff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h\nindex e23e1e8..84531a9 100644\n--- a/drivers/net/e1000/base/e1000_regs.h\n+++ b/drivers/net/e1000/base/e1000_regs.h\n@@ -110,6 +110,7 @@ POSSIBILITY OF SUCH DAMAGE.\n #define E1000_PBS\t0x01008 /* Packet Buffer Size */\n #define E1000_PBECCSTS\t0x0100C /* Packet Buffer ECC Status - RW */\n #define E1000_EEMNGCTL\t0x01010 /* MNG EEprom Control */\n+#define E1000_EEMNGCTL_I210\t0x01010 /* i210 MNG EEprom Mode Control */\n #define E1000_EEARBC\t0x01024 /* EEPROM Auto Read Bus Control */\n #define E1000_EEARBC_I210\t0x12024 /* EEPROM Auto Read Bus Control */\n #define E1000_FLASHT\t0x01028 /* FLASH Timer Register */\n", "prefixes": [ "dpdk-dev", "v2", "30/35" ] }