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GET /api/patches/7598/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 7598,
    "url": "https://patches.dpdk.org/api/patches/7598/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1444804479-14840-30-git-send-email-wenzhuo.lu@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1444804479-14840-30-git-send-email-wenzhuo.lu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1444804479-14840-30-git-send-email-wenzhuo.lu@intel.com",
    "date": "2015-10-14T06:34:34",
    "name": "[dpdk-dev,29/34] e1000/base: implement 88E1543 PHY initialization",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "8f4c33821d34e3fbad98814841b5a32ff95f8106",
    "submitter": {
        "id": 258,
        "url": "https://patches.dpdk.org/api/people/258/?format=api",
        "name": "Wenzhuo Lu",
        "email": "wenzhuo.lu@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1444804479-14840-30-git-send-email-wenzhuo.lu@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/7598/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/7598/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 9BD5D8E78;\n\tWed, 14 Oct 2015 08:36:20 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 943E58DA7\n\tfor <dev@dpdk.org>; Wed, 14 Oct 2015 08:36:18 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga101.fm.intel.com with ESMTP; 13 Oct 2015 23:35:53 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby FMSMGA003.fm.intel.com with ESMTP; 13 Oct 2015 23:35:55 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t9E6Zpiu000640;\n\tWed, 14 Oct 2015 14:35:51 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9E6ZlmG015080; Wed, 14 Oct 2015 14:35:49 +0800",
            "(from wenzhuol@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9E6ZlNQ015076; \n\tWed, 14 Oct 2015 14:35:47 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.17,681,1437462000\"; d=\"scan'208\";a=\"580373718\"",
        "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Wed, 14 Oct 2015 14:34:34 +0800",
        "Message-Id": "<1444804479-14840-30-git-send-email-wenzhuo.lu@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1444804479-14840-1-git-send-email-wenzhuo.lu@intel.com>",
        "References": "<1444804479-14840-1-git-send-email-wenzhuo.lu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 29/34] e1000/base: implement 88E1543 PHY\n\tinitialization",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The initializtion process for 88E1543 PHY.\n\nSigned-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\n---\n drivers/net/e1000/base/e1000_82575.c   | 106 ++++++++++++++++++++++++++++++++-\n drivers/net/e1000/base/e1000_82575.h   |   1 +\n drivers/net/e1000/base/e1000_defines.h |   1 +\n 3 files changed, 107 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c\nindex 4374eab..723885d 100644\n--- a/drivers/net/e1000/base/e1000_82575.c\n+++ b/drivers/net/e1000/base/e1000_82575.c\n@@ -277,6 +277,11 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)\n \t\t\tif (ret_val)\n \t\t\t\tgoto out;\n \t\t}\n+\t\tif (phy->id == M88E1543_E_PHY_ID) {\n+\t\t\tret_val = e1000_initialize_M88E1543_phy(hw);\n+\t\t\tif (ret_val)\n+\t\t\t\tgoto out;\n+\t\t}\n \t\tbreak;\n \tcase IGP03E1000_E_PHY_ID:\n \tcase IGP04E1000_E_PHY_ID:\n@@ -2817,7 +2822,7 @@ s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data)\n  *  e1000_initialize_M88E1512_phy - Initialize M88E1512 PHY\n  *  @hw: pointer to the HW structure\n  *\n- *  Initialize Marverl 1512 to work correctly with Avoton.\n+ *  Initialize Marvell 1512 to work correctly with Avoton.\n  **/\n s32 e1000_initialize_M88E1512_phy(struct e1000_hw *hw)\n {\n@@ -2903,6 +2908,105 @@ out:\n }\n \n /**\n+ *  e1000_initialize_M88E1543_phy - Initialize M88E1543 PHY\n+ *  @hw: pointer to the HW structure\n+ *\n+ *  Initialize Marvell 1543 to work correctly with Avoton.\n+ **/\n+s32 e1000_initialize_M88E1543_phy(struct e1000_hw *hw)\n+{\n+\tstruct e1000_phy_info *phy = &hw->phy;\n+\ts32 ret_val = E1000_SUCCESS;\n+\n+\tDEBUGFUNC(\"e1000_initialize_M88E1543_phy\");\n+\n+\t/* Check if this is correct PHY. */\n+\tif (phy->id != M88E1543_E_PHY_ID)\n+\t\tgoto out;\n+\n+\t/* Switch to PHY page 0xFF. */\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xDC0C);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\t/* Switch to PHY page 0xFB. */\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0xC00D);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\t/* Switch to PHY page 0x12. */\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\t/* Change mode to SGMII-to-Copper */\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\t/* Switch to PHY page 1. */\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x1);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\t/* Change mode to 1000BASE-X/SGMII and autoneg enable; reset */\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1543_FIBER_CTRL, 0x9140);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\t/* Return the PHY to page 0. */\n+\tret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0);\n+\tif (ret_val)\n+\t\tgoto out;\n+\n+\tret_val = phy->ops.commit(hw);\n+\tif (ret_val) {\n+\t\tDEBUGOUT(\"Error committing the PHY changes\\n\");\n+\t\treturn ret_val;\n+\t}\n+\n+\tmsec_delay(1000);\n+out:\n+\treturn ret_val;\n+}\n+\n+/**\n  *  e1000_set_eee_i350 - Enable/disable EEE support\n  *  @hw: pointer to the HW structure\n  *  @adv1g: boolean flag enabling 1G EEE advertisement\ndiff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h\nindex 7a46ceb..c498684 100644\n--- a/drivers/net/e1000/base/e1000_82575.h\n+++ b/drivers/net/e1000/base/e1000_82575.h\n@@ -498,6 +498,7 @@ s32 e1000_set_eee_i350(struct e1000_hw *hw, bool adv1G, bool adv100M);\n s32 e1000_set_eee_i354(struct e1000_hw *hw, bool adv1G, bool adv100M);\n s32 e1000_get_eee_status_i354(struct e1000_hw *, bool *);\n s32 e1000_initialize_M88E1512_phy(struct e1000_hw *hw);\n+s32 e1000_initialize_M88E1543_phy(struct e1000_hw *hw);\n \n /* I2C SDA and SCL timing parameters for standard mode */\n #define E1000_I2C_T_HD_STA\t4\ndiff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h\nindex 8e40771..69aa1f2 100644\n--- a/drivers/net/e1000/base/e1000_defines.h\n+++ b/drivers/net/e1000/base/e1000_defines.h\n@@ -847,6 +847,7 @@ POSSIBILITY OF SUCH DAMAGE.\n #define E1000_M88E1543_PAGE_ADDR\t0x16       /* Page Offset Register */\n #define E1000_M88E1543_EEE_CTRL_1\t0x0\n #define E1000_M88E1543_EEE_CTRL_1_MS\t0x0001     /* EEE Master/Slave */\n+#define E1000_M88E1543_FIBER_CTRL\t0x0        /* Fiber Control Register */\n #define E1000_EEE_ADV_DEV_I354\t\t7\n #define E1000_EEE_ADV_ADDR_I354\t\t60\n #define E1000_EEE_ADV_100_SUPPORTED\t(1 << 1)   /* 100BaseTx EEE Supported */\n",
    "prefixes": [
        "dpdk-dev",
        "29/34"
    ]
}