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GET /api/patches/75604/?format=api
https://patches.dpdk.org/api/patches/75604/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200818072143.2189928-1-kirankumark@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200818072143.2189928-1-kirankumark@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200818072143.2189928-1-kirankumark@marvell.com", "date": "2020-08-18T07:21:41", "name": "[v3,1/2] ethdev: add level support for RSS offload types", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "12fe49667c37f981b04af2b758dce0cff8cce2c8", "submitter": { "id": 1260, "url": "https://patches.dpdk.org/api/people/1260/?format=api", "name": "Kiran Kumar Kokkilagadda", "email": "kirankumark@marvell.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200818072143.2189928-1-kirankumark@marvell.com/mbox/", "series": [ { "id": 11680, "url": "https://patches.dpdk.org/api/series/11680/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11680", "date": "2020-08-18T07:21:41", "name": "[v3,1/2] ethdev: add level support for RSS offload types", "version": 3, "mbox": "https://patches.dpdk.org/series/11680/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/75604/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/75604/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7E452A034C;\n\tTue, 18 Aug 2020 09:22:20 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 627172B94;\n\tTue, 18 Aug 2020 09:22:19 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 7CD16F90\n for <dev@dpdk.org>; Tue, 18 Aug 2020 09:22:17 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 07I7AAQu003995; Tue, 18 Aug 2020 00:22:11 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 3304fhhd0j-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 18 Aug 2020 00:22:11 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 18 Aug 2020 00:22:10 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 18 Aug 2020 00:22:09 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 18 Aug 2020 00:22:09 -0700", "from localhost.localdomain (unknown [10.28.34.15])\n by maili.marvell.com (Postfix) with ESMTP id CDB143F7043;\n Tue, 18 Aug 2020 00:21:57 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=xIATlAGX+3KpPn9VnDcFAM0iwwCRIGkh8UsKnNg8H0Y=;\n b=PwBUTjgTOnmZ6cvq4vd3fBCh1igmdGTfJS1LlLvSvlTBhY1wbTVOv9mKiKSnvNtsNW+g\n 4nOPrsenqv6pCBklshppw6wEgqLmiwKA4y3E8vXv1xykxTEgWpgBTnFEY3IqG9pLqS1p\n cxMGJOXBIZ3fggii4y53xlC139yZ7h9M/kOmRThcHmbMcBRsN53W1q6qevloBcnW6Lve\n HRd4mQdudkoJuoeB1E9woqq8W3fJnvm5v2NJzvtJJSEDG/AzdUYCOb6zZ+mJtaFv8zKm\n in0y1cUeGDjc827dsNcgrdR/benNbyEtHoNwWai5g449t6QG7KdJxTi8BQq00iblor1l Uw==", "From": "<kirankumark@marvell.com>", "To": "Wenzhuo Lu <wenzhuo.lu@intel.com>, Beilei Xing <beilei.xing@intel.com>,\n Bernard Iremonger <bernard.iremonger@intel.com>, Thomas Monjalon\n <thomas@monjalon.net>, Ferruh Yigit <ferruh.yigit@intel.com>, \"Andrew\n Rybchenko\" <arybchenko@solarflare.com>", "CC": "<dev@dpdk.org>, <jerinj@marvell.com>, <orika@mellanox.com>,\n <xuanziyang2@huawei.com>, <cloud.wangxiaoyun@huawei.com>,\n <zhouguoyang@huawei.com>, <rosen.xu@intel.com>, <jia.guo@intel.com>,\n <rmody@marvell.com>, <shshaikh@marvell.com>, <ndabilpuram@marvell.com>,\n <qiming.yang@intel.com>, <qi.z.zhang@intel.com>,\n <keith.wiles@intel.com>, <hemant.agrawal@nxp.com>,\n <sachin.saxena@nxp.com>, <wei.zhao1@intel.com>, <johndale@cisco.com>,\n <hyonkim@cisco.com>, <chas3@att.com>, <matan@mellanox.com>,\n <shahafs@mellanox.com>, <viacheslavo@mellanox.com>,\n <rahul.lakkireddy@chelsio.com>, <grive@u256.net>, <lironh@marvell.com>,\n <jingjing.wu@intel.com>, <xavier.huwei@huawei.com>,\n <humin29@huawei.com>, <yisen.zhuang@huawei.com>,\n <ajit.khaparde@broadcom.com>, <somnath.kotur@broadcom.com>,\n <jasvinder.singh@intel.com>, <cristian.dumitrescu@intel.com>,\n Kiran Kumar K <kirankumark@marvell.com>", "Date": "Tue, 18 Aug 2020 12:51:41 +0530", "Message-ID": "<20200818072143.2189928-1-kirankumark@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20200808143631.1704756-1-kirankumark@marvell.com>", "References": "<20200808143631.1704756-1-kirankumark@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687\n definitions=2020-08-18_04:2020-08-18,\n 2020-08-18 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 1/2] ethdev: add level support for RSS offload\n\ttypes", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nThis patch reserves 2 bits as input selection to select Inner and\nouter layers for RSS computation. It is combined with existing\nETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.\nThis functionality already exists in rte_flow through level parameter in\nRSS action configuration rte_flow_action_rss.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\n---\nV3 Changes:\n* Added testpmd support.\n\n app/test-pmd/parameters.c | 6 ++++++\n lib/librte_ethdev/rte_ethdev.h | 27 +++++++++++++++++++++++++++\n 2 files changed, 33 insertions(+)\n\n--\n2.25.1", "diff": "diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c\nindex 7cb0e3d6e..5f669ff24 100644\n--- a/app/test-pmd/parameters.c\n+++ b/app/test-pmd/parameters.c\n@@ -632,6 +632,8 @@ launch_args_parse(int argc, char** argv)\n \t\t{ \"forward-mode\", 1, 0, 0 },\n \t\t{ \"rss-ip\",\t\t\t0, 0, 0 },\n \t\t{ \"rss-udp\",\t\t\t0, 0, 0 },\n+\t\t{ \"rss-outer\",\t\t\t0, 0, 0 },\n+\t\t{ \"rss-inner-outer\",\t\t0, 0, 0 },\n \t\t{ \"rxq\",\t\t\t1, 0, 0 },\n \t\t{ \"txq\",\t\t\t1, 0, 0 },\n \t\t{ \"rxd\",\t\t\t1, 0, 0 },\n@@ -1051,6 +1053,10 @@ launch_args_parse(int argc, char** argv)\n \t\t\t\trss_hf = ETH_RSS_IP;\n \t\t\tif (!strcmp(lgopts[opt_idx].name, \"rss-udp\"))\n \t\t\t\trss_hf = ETH_RSS_UDP;\n+\t\t\tif (!strcmp(lgopts[opt_idx].name, \"rss-outer\"))\n+\t\t\t\trss_hf |= ETH_RSS_LEVEL_OUTER;\n+\t\t\tif (!strcmp(lgopts[opt_idx].name, \"rss-inner-outer\"))\n+\t\t\t\trss_hf |= ETH_RSS_LEVEL_INNER_OUTER;\n \t\t\tif (!strcmp(lgopts[opt_idx].name, \"rxq\")) {\n \t\t\t\tn = atoi(optarg);\n \t\t\t\tif (n >= 0 && check_nb_rxq((queueid_t)n) == 0)\ndiff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h\nindex d29930fd8..28184cc85 100644\n--- a/lib/librte_ethdev/rte_ethdev.h\n+++ b/lib/librte_ethdev/rte_ethdev.h\n@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {\n #define RTE_ETH_RSS_L3_PRE64\t (1ULL << 53)\n #define RTE_ETH_RSS_L3_PRE96\t (1ULL << 52)\n\n+/*\n+ * We use the following macros to combine with the above layers to choose\n+ * inner and outer layers or both for RSS computation.\n+ * Note: Default is 0: inner layers, 1: outer layers, 2: both\n+ * bit 50 and 51 are reserved for this.\n+ */\n+\n+/**\n+ * Level 0, It basically stands for the innermost encapsulation level RSS\n+ * can be performed on according to PMD and device capabilities.\n+ */\n+#define ETH_RSS_LEVEL_INNER (0ULL << 50)\n+/**\n+ * Level 1, It basically stands for the outermost encapsulation level RSS\n+ * can be performed on according to PMD and device capabilities.\n+ */\n+#define ETH_RSS_LEVEL_OUTER (1ULL << 50)\n+/**\n+ * Level 2, It basically stands for the both inner and outermost\n+ * encapsulation level RSS can be performed on according to PMD and\n+ * device capabilities.\n+ */\n+#define ETH_RSS_LEVEL_INNER_OUTER (2ULL << 50)\n+#define ETH_RSS_LEVEL_MASK\t (3ULL << 50)\n+\n+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)\n+\n /**\n * For input set change of hash filter, if SRC_ONLY and DST_ONLY of\n * the same level are used simultaneously, it is the same case as\n", "prefixes": [ "v3", "1/2" ] }{ "id": 75604, "url": "