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[
    {
        "id": 116538,
        "web_url": "https://patches.dpdk.org/comment/116538/",
        "msgid": "<AM0PR05MB670721BA5BCA10AA50B3C2E0C2760@AM0PR05MB6707.eurprd05.prod.outlook.com>",
        "date": "2020-07-23T08:57:27",
        "subject": "Re: [dpdk-dev] [PATCH] net/mlx5: fix vectorized mini-CQE prefetching",
        "submitter": {
            "id": 513,
            "url": "https://patches.dpdk.org/api/people/513/",
            "name": "Raslan Darawsheh",
            "email": "rasland@mellanox.com"
        },
        "content": "Hi,\n\n> -----Original Message-----\n> From: Alexander Kozyrev <akozyrev@mellanox.com>\n> Sent: Wednesday, July 22, 2020 11:33 PM\n> To: dev@dpdk.org\n> Cc: stable@dpdk.org; Raslan Darawsheh <rasland@mellanox.com>; Slava\n> Ovsiienko <viacheslavo@mellanox.com>\n> Subject: [PATCH] net/mlx5: fix vectorized mini-CQE prefetching\n> \n> There was an optimization work to prefetch all the CQEs before\n> their invalidation. It allowed us to speed up the mini-CQE\n> decompression process by preheating the cache in the vectorized\n> Rx routine.\n> \n> Prefetching of the next mini-CQE, on the other hand, showed\n> no difference in the performance on x86 platform. So, that was\n> removed. Unfortunately this caused the performance drop on ARM.\n> \n> Prefetch the mini-CQE as well as well as the all the soon to be\n> invalidated CQEs to get both CQE and mini-CQE on the hot path.\n> \n> Fixes: 28a4b9632 (\"net/mlx5: prefetch CQEs for a faster decompression\")\n> Cc: stable@dpdk.org\n> \n> Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>\n> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n> ---\n>  drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 3 ++-\n>  drivers/net/mlx5/mlx5_rxtx_vec_neon.h    | 3 +++\n>  drivers/net/mlx5/mlx5_rxtx_vec_sse.h     | 3 ++-\n>  3 files changed, 7 insertions(+), 2 deletions(-)\n> \n> diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n> b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n> index f5414eebad..cb4ce1a099 100644\n> --- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n> +++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n> @@ -158,7 +158,6 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq,\n> volatile struct mlx5_cqe *cq,\n>  \t\tfor (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i)\n>  \t\t\tif (likely(pos + i < mcqe_n))\n>  \t\t\t\trte_prefetch0((void *)(cq + pos + i));\n> -\n>  \t\t/* A.1 load mCQEs into a 128bit register. */\n>  \t\tmcqe1 = (vector unsigned char)vec_vsx_ld(0,\n>  \t\t\t(signed int const *)&mcq[pos % 8]);\n> @@ -287,6 +286,8 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq,\n> volatile struct mlx5_cqe *cq,\n>  \t\tpos += MLX5_VPMD_DESCS_PER_LOOP;\n>  \t\t/* Move to next CQE and invalidate consumed CQEs. */\n>  \t\tif (!(pos & 0x7) && pos < mcqe_n) {\n> +\t\t\tif (pos + 8 < mcqe_n)\n> +\t\t\t\trte_prefetch0((void *)(cq + pos + 8));\n>  \t\t\tmcq = (void *)&(cq + pos)->pkt_info;\n>  \t\t\tfor (i = 0; i < 8; ++i)\n>  \t\t\t\tcq[inv++].op_own =\n> MLX5_CQE_INVALIDATE;\n> diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n> b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n> index 555c342626..6c3149523e 100644\n> --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n> +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n> @@ -145,6 +145,7 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq,\n> volatile struct mlx5_cqe *cq,\n>  \t\t\t\t    -1UL << ((mcqe_n - pos) *\n>  \t\t\t\t\t     sizeof(uint16_t) * 8) : 0);\n>  #endif\n> +\n>  \t\tfor (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i)\n>  \t\t\tif (likely(pos + i < mcqe_n))\n>  \t\t\t\trte_prefetch0((void *)(cq + pos + i));\n> @@ -227,6 +228,8 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq,\n> volatile struct mlx5_cqe *cq,\n>  \t\tpos += MLX5_VPMD_DESCS_PER_LOOP;\n>  \t\t/* Move to next CQE and invalidate consumed CQEs. */\n>  \t\tif (!(pos & 0x7) && pos < mcqe_n) {\n> +\t\t\tif (pos + 8 < mcqe_n)\n> +\t\t\t\trte_prefetch0((void *)(cq + pos + 8));\n>  \t\t\tmcq = (void *)&(cq + pos)->pkt_info;\n>  \t\t\tfor (i = 0; i < 8; ++i)\n>  \t\t\t\tcq[inv++].op_own =\n> MLX5_CQE_INVALIDATE;\n> diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n> b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n> index 34e3397115..554924d7fc 100644\n> --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n> +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n> @@ -135,7 +135,6 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq,\n> volatile struct mlx5_cqe *cq,\n>  \t\tfor (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i)\n>  \t\t\tif (likely(pos + i < mcqe_n))\n>  \t\t\t\trte_prefetch0((void *)(cq + pos + i));\n> -\n>  \t\t/* A.1 load mCQEs into a 128bit register. */\n>  \t\tmcqe1 = _mm_loadu_si128((__m128i *)&mcq[pos % 8]);\n>  \t\tmcqe2 = _mm_loadu_si128((__m128i *)&mcq[pos % 8 + 2]);\n> @@ -214,6 +213,8 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq,\n> volatile struct mlx5_cqe *cq,\n>  \t\tpos += MLX5_VPMD_DESCS_PER_LOOP;\n>  \t\t/* Move to next CQE and invalidate consumed CQEs. */\n>  \t\tif (!(pos & 0x7) && pos < mcqe_n) {\n> +\t\t\tif (pos + 8 < mcqe_n)\n> +\t\t\t\trte_prefetch0((void *)(cq + pos + 8));\n>  \t\t\tmcq = (void *)(cq + pos);\n>  \t\t\tfor (i = 0; i < 8; ++i)\n>  \t\t\t\tcq[inv++].op_own =\n> MLX5_CQE_INVALIDATE;\n> --\n> 2.24.1\n\nPatch applied to next-net-mlx,\n\nKindest regards,\nRaslan Darawsheh",
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            "Subject": "Re: [dpdk-dev] [PATCH] net/mlx5: fix vectorized mini-CQE prefetching",
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            "From": "Raslan Darawsheh <rasland@mellanox.com>",
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            "Thread-Topic": "[PATCH] net/mlx5: fix vectorized mini-CQE prefetching",
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