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GET /api/patches/74564/?format=api
{ "id": 74564, "url": "https://patches.dpdk.org/api/patches/74564/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1595331111-12151-4-git-send-email-radu.nicolau@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1595331111-12151-4-git-send-email-radu.nicolau@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1595331111-12151-4-git-send-email-radu.nicolau@intel.com", "date": "2020-07-21T11:31:50", "name": "[v10,3/4] common/qat: use WC store to update queue tail registers", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "717aff0e3537cd12ee766de014e1bcac4f2bbe03", "submitter": { "id": 743, "url": "https://patches.dpdk.org/api/people/743/?format=api", "name": "Radu Nicolau", "email": "radu.nicolau@intel.com" }, "delegate": { "id": 24651, "url": "https://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1595331111-12151-4-git-send-email-radu.nicolau@intel.com/mbox/", "series": [ { "id": 11202, "url": "https://patches.dpdk.org/api/series/11202/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11202", "date": "2020-07-21T11:31:47", "name": "eal: add WC store functions", "version": 10, "mbox": "https://patches.dpdk.org/series/11202/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/74564/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/74564/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3B282A0526;\n\tTue, 21 Jul 2020 13:32:26 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id F278B1C037;\n\tTue, 21 Jul 2020 13:32:07 +0200 (CEST)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by dpdk.org (Postfix) with ESMTP id 110751C037\n for <dev@dpdk.org>; Tue, 21 Jul 2020 13:32:04 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Jul 2020 04:32:04 -0700", "from silpixa00383879.ir.intel.com ([10.237.222.142])\n by orsmga005.jf.intel.com with ESMTP; 21 Jul 2020 04:32:02 -0700" ], "IronPort-SDR": [ "\n 2+q+U/ttkKOnRXS3wIuPuqbTyirIxWwWkfU/hJTCtxNGygcTSgy7ra+Ng+mdzufLG6FwI36Ymg\n id99aD9PcgWw==", "\n U4iBUmVAjs0/Wd1ndTAWdFALx9HubWI2urkl2MVlwn9fnYRDQPo6Ai3eeM8rf40FyVWYV41cn2\n Adp4lnwLs28g==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9688\"; a=\"214767024\"", "E=Sophos;i=\"5.75,378,1589266800\"; d=\"scan'208\";a=\"214767024\"", "E=Sophos;i=\"5.75,378,1589266800\"; d=\"scan'208\";a=\"462041842\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Radu Nicolau <radu.nicolau@intel.com>", "To": "dev@dpdk.org", "Cc": "beilei.xing@intel.com, jia.guo@intel.com, bruce.richardson@intel.com,\n konstantin.ananyev@intel.com, jerinjacobk@gmail.com,\n david.marchand@redhat.com, fiona.trahe@intel.com, wei.zhao1@intel.com,\n ruifeng.wang@arm.com, Radu Nicolau <radu.nicolau@intel.com>", "Date": "Tue, 21 Jul 2020 12:31:50 +0100", "Message-Id": "<1595331111-12151-4-git-send-email-radu.nicolau@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1595331111-12151-1-git-send-email-radu.nicolau@intel.com>", "References": "<1591870283-7776-1-git-send-email-radu.nicolau@intel.com>\n <1595331111-12151-1-git-send-email-radu.nicolau@intel.com>", "Subject": "[dpdk-dev] [PATCH v10 3/4] common/qat: use WC store to update queue\n\ttail registers", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Performance improvement: use a write combining store\ninstead of a regular mmio write to update queue tail\nregisters.\n\nSigned-off-by: Radu Nicolau <radu.nicolau@intel.com>\nAcked-by: Fiona Trahe <fiona.trahe@intel.com>\n---\n drivers/common/qat/qat_adf/adf_transport_access_macros.h | 6 ++++--\n 1 file changed, 4 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/common/qat/qat_adf/adf_transport_access_macros.h b/drivers/common/qat/qat_adf/adf_transport_access_macros.h\nindex 1eef551..504ffb7 100644\n--- a/drivers/common/qat/qat_adf/adf_transport_access_macros.h\n+++ b/drivers/common/qat/qat_adf/adf_transport_access_macros.h\n@@ -9,6 +9,8 @@\n /* CSR write macro */\n #define ADF_CSR_WR(csrAddr, csrOffset, val)\t\t\\\n \trte_write32(val, (((uint8_t *)csrAddr) + csrOffset))\n+#define ADF_CSR_WC_WR(csrAddr, csrOffset, val)\t\t\\\n+\trte_write32_wc(val, (((uint8_t *)csrAddr) + csrOffset))\n \n /* CSR read macro */\n #define ADF_CSR_RD(csrAddr, csrOffset)\t\t\t\\\n@@ -110,10 +112,10 @@ do { \\\n \t\tADF_RING_CSR_RING_UBASE + (ring << 2), u_base);\t\\\n } while (0)\n #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \\\n-\tADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \\\n+\tADF_CSR_WC_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \\\n \t\tADF_RING_CSR_RING_HEAD + (ring << 2), value)\n #define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \\\n-\tADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \\\n+\tADF_CSR_WC_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \\\n \t\tADF_RING_CSR_RING_TAIL + (ring << 2), value)\n #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \\\n do { \\\n", "prefixes": [ "v10", "3/4" ] }