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{
    "id": 74563,
    "url": "https://patches.dpdk.org/api/patches/74563/",
    "web_url": "https://patches.dpdk.org/patch/74563/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1595331111-12151-3-git-send-email-radu.nicolau@intel.com>",
    "date": "2020-07-21T11:31:49",
    "name": "[v10,2/4] net/i40e: use WC store to update queue tail registers",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "967554111d9931f79d10f1b21d8b022609edabb9",
    "submitter": {
        "id": 743,
        "url": "https://patches.dpdk.org/api/people/743/",
        "name": "Nicolau, Radu",
        "email": "radu.nicolau@intel.com"
    },
    "delegate": {
        "id": 24651,
        "url": "https://patches.dpdk.org/api/users/24651/",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "https://patches.dpdk.org/patch/74563/mbox/",
    "series": [
        {
            "id": 11202,
            "url": "https://patches.dpdk.org/api/series/11202/",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11202",
            "date": "2020-07-21T11:31:47",
            "name": "eal: add WC store functions",
            "version": 10,
            "mbox": "https://patches.dpdk.org/series/11202/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/74563/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/74563/checks/",
    "tags": {},
    "headers": {
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9688\"; a=\"214767014\"",
            "E=Sophos;i=\"5.75,378,1589266800\"; d=\"scan'208\";a=\"214767014\"",
            "E=Sophos;i=\"5.75,378,1589266800\"; d=\"scan'208\";a=\"462041827\""
        ],
        "IronPort-SDR": [
            "\n CMDiJj4Rk4b2g7aVIkVJfK2aG3WWaIm1+2pR1U1WR0PlGNm804isNKRcMTd2Ip0cFUqHEeJ7RK\n 1y+OMQGQ2sdQ==",
            "\n 09rSMUxeeR4+v+QI9wznOQMKXytWVkAmsSD9qCjCVd7+VnWWKfSlBlcC9tbg82ivM2jb8RkYDl\n BSWXnXfsl0kg=="
        ],
        "X-Amp-File-Uploaded": "False",
        "Precedence": "list",
        "X-Mailman-Version": "2.1.15",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "X-BeenThere": "dev@dpdk.org",
        "References": "<1591870283-7776-1-git-send-email-radu.nicolau@intel.com>\n <1595331111-12151-1-git-send-email-radu.nicolau@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v10 2/4] net/i40e: use WC store to update queue\n\ttail registers",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CA09FA0526;\n\tTue, 21 Jul 2020 13:32:17 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8D8B01C033;\n\tTue, 21 Jul 2020 13:32:04 +0200 (CEST)",
            "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by dpdk.org (Postfix) with ESMTP id 82C2D1C029\n for <dev@dpdk.org>; Tue, 21 Jul 2020 13:32:02 +0200 (CEST)",
            "from orsmga005.jf.intel.com ([10.7.209.41])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Jul 2020 04:32:02 -0700",
            "from silpixa00383879.ir.intel.com ([10.237.222.142])\n by orsmga005.jf.intel.com with ESMTP; 21 Jul 2020 04:31:59 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "X-Mailer": "git-send-email 2.7.4",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "X-ExtLoop1": "1",
        "Date": "Tue, 21 Jul 2020 12:31:49 +0100",
        "To": "dev@dpdk.org",
        "From": "Radu Nicolau <radu.nicolau@intel.com>",
        "In-Reply-To": "<1595331111-12151-1-git-send-email-radu.nicolau@intel.com>",
        "Cc": "beilei.xing@intel.com, jia.guo@intel.com, bruce.richardson@intel.com,\n konstantin.ananyev@intel.com, jerinjacobk@gmail.com,\n david.marchand@redhat.com, fiona.trahe@intel.com, wei.zhao1@intel.com,\n ruifeng.wang@arm.com, Radu Nicolau <radu.nicolau@intel.com>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Message-Id": "<1595331111-12151-3-git-send-email-radu.nicolau@intel.com>",
        "Return-Path": "<dev-bounces@dpdk.org>"
    },
    "content": "Performance improvement: use a write combining store\ninstead of a regular mmio write to update queue tail\nregisters.\n\nSigned-off-by: Radu Nicolau <radu.nicolau@intel.com>\nAcked-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n drivers/net/i40e/base/i40e_osdep.h    | 5 +++++\n drivers/net/i40e/i40e_rxtx.c          | 8 ++++----\n drivers/net/i40e/i40e_rxtx_vec_avx2.c | 4 ++--\n drivers/net/i40e/i40e_rxtx_vec_sse.c  | 4 ++--\n 4 files changed, 13 insertions(+), 8 deletions(-)",
    "diff": "diff --git a/drivers/net/i40e/base/i40e_osdep.h b/drivers/net/i40e/base/i40e_osdep.h\nindex 58be396..9b50330 100644\n--- a/drivers/net/i40e/base/i40e_osdep.h\n+++ b/drivers/net/i40e/base/i40e_osdep.h\n@@ -138,6 +138,11 @@ static inline uint32_t i40e_read_addr(volatile void *addr)\n #define I40E_PCI_REG_WRITE_RELAXED(reg, value)\t\\\n \trte_write32_relaxed((rte_cpu_to_le_32(value)), reg)\n \n+#define I40E_PCI_REG_WC_WRITE(reg, value) \\\n+\trte_write32_wc((rte_cpu_to_le_32(value)), reg)\n+#define I40E_PCI_REG_WC_WRITE_RELAXED(reg, value) \\\n+\trte_write32_wc_relaxed((rte_cpu_to_le_32(value)), reg)\n+\n #define I40E_WRITE_FLUSH(a) I40E_READ_REG(a, I40E_GLGEN_STAT)\n #define I40EVF_WRITE_FLUSH(a) I40E_READ_REG(a, I40E_VFGEN_RSTAT)\n \ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 840b6f3..f709c52 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -760,7 +760,7 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \tif (nb_hold > rxq->rx_free_thresh) {\n \t\trx_id = (uint16_t) ((rx_id == 0) ?\n \t\t\t(rxq->nb_rx_desc - 1) : (rx_id - 1));\n-\t\tI40E_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\t\tI40E_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);\n \t\tnb_hold = 0;\n \t}\n \trxq->nb_rx_hold = nb_hold;\n@@ -938,7 +938,7 @@ i40e_recv_scattered_pkts(void *rx_queue,\n \tif (nb_hold > rxq->rx_free_thresh) {\n \t\trx_id = (uint16_t)(rx_id == 0 ?\n \t\t\t(rxq->nb_rx_desc - 1) : (rx_id - 1));\n-\t\tI40E_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\t\tI40E_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);\n \t\tnb_hold = 0;\n \t}\n \trxq->nb_rx_hold = nb_hold;\n@@ -1249,7 +1249,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\t   (unsigned) tx_id, (unsigned) nb_tx);\n \n \trte_cio_wmb();\n-\tI40E_PCI_REG_WRITE_RELAXED(txq->qtx_tail, tx_id);\n+\tI40E_PCI_REG_WC_WRITE_RELAXED(txq->qtx_tail, tx_id);\n \ttxq->tx_tail = tx_id;\n \n \treturn nb_tx;\n@@ -1400,7 +1400,7 @@ tx_xmit_pkts(struct i40e_tx_queue *txq,\n \t\ttxq->tx_tail = 0;\n \n \t/* Update the tx tail register */\n-\tI40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n+\tI40E_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail);\n \n \treturn nb_pkts;\n }\ndiff --git a/drivers/net/i40e/i40e_rxtx_vec_avx2.c b/drivers/net/i40e/i40e_rxtx_vec_avx2.c\nindex 3bcef13..178d8f4 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_avx2.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_avx2.c\n@@ -134,7 +134,7 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)\n \t\t\t     (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));\n \n \t/* Update the tail pointer on the NIC */\n-\tI40E_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\tI40E_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);\n }\n \n #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC\n@@ -921,7 +921,7 @@ i40e_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n \n \ttxq->tx_tail = tx_id;\n \n-\tI40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n+\tI40E_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail);\n \n \treturn nb_pkts;\n }\ndiff --git a/drivers/net/i40e/i40e_rxtx_vec_sse.c b/drivers/net/i40e/i40e_rxtx_vec_sse.c\nindex 6985183..240ce47 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_sse.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_sse.c\n@@ -86,7 +86,7 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)\n \t\t\t     (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));\n \n \t/* Update the tail pointer on the NIC */\n-\tI40E_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\tI40E_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);\n }\n \n #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC\n@@ -733,7 +733,7 @@ i40e_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,\n \n \ttxq->tx_tail = tx_id;\n \n-\tI40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n+\tI40E_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail);\n \n \treturn nb_pkts;\n }\n",
    "prefixes": [
        "v10",
        "2/4"
    ]
}