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GET /api/patches/74560/?format=api
{ "id": 74560, "url": "https://patches.dpdk.org/api/patches/74560/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1595329889-31516-1-git-send-email-viacheslavo@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1595329889-31516-1-git-send-email-viacheslavo@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1595329889-31516-1-git-send-email-viacheslavo@mellanox.com", "date": "2020-07-21T11:11:29", "name": "[v2] common/mlx5: fix Rx/Tx queue doorbell record size", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f4f074da7c3a19dba70b9af7f8b5b3572615c786", "submitter": { "id": 1102, "url": "https://patches.dpdk.org/api/people/1102/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@mellanox.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1595329889-31516-1-git-send-email-viacheslavo@mellanox.com/mbox/", "series": [ { "id": 11201, "url": "https://patches.dpdk.org/api/series/11201/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11201", "date": "2020-07-21T11:11:29", "name": "[v2] common/mlx5: fix Rx/Tx queue doorbell record size", "version": 2, "mbox": "https://patches.dpdk.org/series/11201/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/74560/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/74560/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 85192A0526;\n\tTue, 21 Jul 2020 13:11:36 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 097331BFFB;\n\tTue, 21 Jul 2020 13:11:35 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 044FA1BFEB\n for <dev@dpdk.org>; Tue, 21 Jul 2020 13:11:33 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com) with SMTP; 21 Jul 2020 14:11:31 +0300", "from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx\n [10.210.17.40])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06LBBVkn018127;\n Tue, 21 Jul 2020 14:11:31 +0300", "from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 06LBBVJu031564;\n Tue, 21 Jul 2020 11:11:31 GMT", "(from viacheslavo@localhost)\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 06LBBUqc031563;\n Tue, 21 Jul 2020 11:11:30 GMT" ], "X-Authentication-Warning": "pegasus12.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f", "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, thomas@monjalon.net,\n dekelp@mellanox.com, stable@dpdk.org", "Date": "Tue, 21 Jul 2020 11:11:29 +0000", "Message-Id": "<1595329889-31516-1-git-send-email-viacheslavo@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1595165997-12225-1-git-send-email-viacheslavo@mellanox.com>", "References": "<1595165997-12225-1-git-send-email-viacheslavo@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v2] common/mlx5: fix Rx/Tx queue doorbell record\n\tsize", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When Rx/Tx queue was being created with DevX the allocated\ndoorbell record size was only uint64_t. That was definitely\nless than size of CPU cacheline and it might have happened the\ndoorbell records attached to different queues handled by\ndifferent cores were allocated within same cacheline. It might\nhave caused the contention on doorbell record writing.\n\nThis patch extends the allocated memory size for doorbell\nrecord to cacheline size.\n\nFixes: 21cae8580fd0 (\"net/mlx5: allocate door-bells via DevX\")\nCc: stable@dpdk.org\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n\n---\nv2: - rebase\n - clarify commit message, register is replaced with record\n\n drivers/common/mlx5/mlx5_common.c | 2 +-\n drivers/common/mlx5/mlx5_common.h | 10 ++++++----\n 2 files changed, 7 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c\nindex 79cd5ba..193e73b 100644\n--- a/drivers/common/mlx5/mlx5_common.c\n+++ b/drivers/common/mlx5/mlx5_common.c\n@@ -187,7 +187,7 @@ static inline void mlx5_cpu_id(unsigned int level,\n \tpage->dbr_bitmap[i] |= (UINT64_C(1) << j);\n \tpage->dbr_count++;\n \t*dbr_page = page;\n-\treturn (((i * 64) + j) * sizeof(uint64_t));\n+\treturn (i * CHAR_BIT * sizeof(uint64_t) + j) * MLX5_DBR_SIZE;\n }\n \n /**\ndiff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h\nindex 5b9b7bd..ef7b61b 100644\n--- a/drivers/common/mlx5/mlx5_common.h\n+++ b/drivers/common/mlx5/mlx5_common.h\n@@ -214,10 +214,12 @@ enum mlx5_class {\n \tMLX5_CLASS_VDPA = RTE_BIT64(1),\n };\n \n-#define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */\n-#define MLX5_DBR_SIZE 8\n-#define MLX5_DBR_PER_PAGE (MLX5_DBR_PAGE_SIZE / MLX5_DBR_SIZE)\n-#define MLX5_DBR_BITMAP_SIZE (MLX5_DBR_PER_PAGE / 64)\n+#define MLX5_DBR_SIZE RTE_CACHE_LINE_SIZE\n+#define MLX5_DBR_PER_PAGE 64\n+/* Must be >= CHAR_BIT * sizeof(uint64_t) */\n+#define MLX5_DBR_PAGE_SIZE (MLX5_DBR_PER_PAGE * MLX5_DBR_SIZE)\n+/* Page size must be >= 512. */\n+#define MLX5_DBR_BITMAP_SIZE (MLX5_DBR_PER_PAGE / (CHAR_BIT * sizeof(uint64_t)))\n \n struct mlx5_devx_dbr_page {\n \t/* Door-bell records, must be first member in structure. */\n", "prefixes": [ "v2" ] }