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GET /api/patches/74522/?format=api
{ "id": 74522, "url": "https://patches.dpdk.org/api/patches/74522/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200721072021.38243-1-junyux.jiang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200721072021.38243-1-junyux.jiang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200721072021.38243-1-junyux.jiang@intel.com", "date": "2020-07-21T07:20:21", "name": "[v3] net/ice: fix incorrect Rx/Tx bytes statistics", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "d9489ab7e21e22b928f631e0d182fce72733c65a", "submitter": { "id": 1408, "url": "https://patches.dpdk.org/api/people/1408/?format=api", "name": "Junyu Jiang", "email": "junyux.jiang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200721072021.38243-1-junyux.jiang@intel.com/mbox/", "series": [ { "id": 11192, "url": "https://patches.dpdk.org/api/series/11192/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11192", "date": "2020-07-21T07:20:21", "name": "[v3] net/ice: fix incorrect Rx/Tx bytes statistics", "version": 3, "mbox": "https://patches.dpdk.org/series/11192/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/74522/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/74522/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D0EF7A0526;\n\tTue, 21 Jul 2020 09:28:58 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8B5331C000;\n\tTue, 21 Jul 2020 09:28:57 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by dpdk.org (Postfix) with ESMTP id AA0E71BFFF;\n Tue, 21 Jul 2020 09:28:55 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Jul 2020 00:28:54 -0700", "from intel.sh.intel.com ([10.239.255.48])\n by orsmga002.jf.intel.com with ESMTP; 21 Jul 2020 00:28:50 -0700" ], "IronPort-SDR": [ "\n PL1LuMyLki5XQk640Q77pUiAl0hWnIC8Q9TwssxeR+iO54Q+dWy4CJg6qX3myN7k2L99ResX8X\n QHPZ2B9vq8LQ==", "\n HD3Pz4NPWdg+AjW3JZSawiv/KsjhsGufMKxojUHXh/oFbRAIdT37K8Lt9b+my/eD/YA88lfDfP\n GWlAnKLfoTsw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9688\"; a=\"234936589\"", "E=Sophos;i=\"5.75,378,1589266800\"; d=\"scan'208\";a=\"234936589\"", "E=Sophos;i=\"5.75,378,1589266800\"; d=\"scan'208\";a=\"301531334\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Junyu Jiang <junyux.jiang@intel.com>", "To": "dev@dpdk.org", "Cc": "Qi Zhang <qi.z.zhang@intel.com>, Qiming Yang <qiming.yang@intel.com>,\n Junyu Jiang <junyux.jiang@intel.com>, stable@dpdk.org", "Date": "Tue, 21 Jul 2020 07:20:21 +0000", "Message-Id": "<20200721072021.38243-1-junyux.jiang@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200715070307.36814-1-junyux.jiang@intel.com>", "References": "<20200715070307.36814-1-junyux.jiang@intel.com>", "Subject": "[dpdk-dev] [PATCH v3] net/ice: fix incorrect Rx/Tx bytes statistics", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch fixed the issue that rx/tx bytes overflowed\non 40 bit limitation by enlarging the limitation.\n\nFixes: a37bde56314d (\"net/ice: support statistics\")\nCc: stable@dpdk.org\n\nSigned-off-by: Junyu Jiang <junyux.jiang@intel.com>\n---\n drivers/net/ice/ice_ethdev.c | 28 ++++++++++++++++++++++++++++\n drivers/net/ice/ice_ethdev.h | 7 +++++++\n 2 files changed, 35 insertions(+)", "diff": "diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 3534d18ca..950c27094 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -4156,6 +4156,13 @@ ice_update_vsi_stats(struct ice_vsi *vsi)\n \tice_stat_update_40(hw, GLV_BPRCH(idx), GLV_BPRCL(idx),\n \t\t\t vsi->offset_loaded, &oes->rx_broadcast,\n \t\t\t &nes->rx_broadcast);\n+\t/* enlarge the limitation when rx_bytes overflowed */\n+\tif (vsi->offset_loaded) {\n+\t\tif (ICE_RXTX_BYTES_LOW(vsi->old_rx_bytes) > nes->rx_bytes)\n+\t\t\tnes->rx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH;\n+\t\tnes->rx_bytes += ICE_RXTX_BYTES_HIGH(vsi->old_rx_bytes);\n+\t}\n+\tvsi->old_rx_bytes = nes->rx_bytes;\n \t/* exclude CRC bytes */\n \tnes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +\n \t\t\t nes->rx_broadcast) * RTE_ETHER_CRC_LEN;\n@@ -4182,6 +4189,13 @@ ice_update_vsi_stats(struct ice_vsi *vsi)\n \t/* GLV_TDPC not supported */\n \tice_stat_update_32(hw, GLV_TEPC(idx), vsi->offset_loaded,\n \t\t\t &oes->tx_errors, &nes->tx_errors);\n+\t/* enlarge the limitation when tx_bytes overflowed */\n+\tif (vsi->offset_loaded) {\n+\t\tif (ICE_RXTX_BYTES_LOW(vsi->old_tx_bytes) > nes->tx_bytes)\n+\t\t\tnes->tx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH;\n+\t\tnes->tx_bytes += ICE_RXTX_BYTES_HIGH(vsi->old_tx_bytes);\n+\t}\n+\tvsi->old_tx_bytes = nes->tx_bytes;\n \tvsi->offset_loaded = true;\n \n \tPMD_DRV_LOG(DEBUG, \"************** VSI[%u] stats start **************\",\n@@ -4229,6 +4243,13 @@ ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw)\n \tice_stat_update_32(hw, PRTRPB_RDPC,\n \t\t\t pf->offset_loaded, &os->eth.rx_discards,\n \t\t\t &ns->eth.rx_discards);\n+\t/* enlarge the limitation when rx_bytes overflowed */\n+\tif (pf->offset_loaded) {\n+\t\tif (ICE_RXTX_BYTES_LOW(pf->old_rx_bytes) > ns->eth.rx_bytes)\n+\t\t\tns->eth.rx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH;\n+\t\tns->eth.rx_bytes += ICE_RXTX_BYTES_HIGH(pf->old_rx_bytes);\n+\t}\n+\tpf->old_rx_bytes = ns->eth.rx_bytes;\n \n \t/* Workaround: CRC size should not be included in byte statistics,\n \t * so subtract RTE_ETHER_CRC_LEN from the byte counter for each rx\n@@ -4259,6 +4280,13 @@ ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw)\n \t\t\t GLPRT_BPTCL(hw->port_info->lport),\n \t\t\t pf->offset_loaded, &os->eth.tx_broadcast,\n \t\t\t &ns->eth.tx_broadcast);\n+\t/* enlarge the limitation when tx_bytes overflowed */\n+\tif (pf->offset_loaded) {\n+\t\tif (ICE_RXTX_BYTES_LOW(pf->old_tx_bytes) > ns->eth.tx_bytes)\n+\t\t\tns->eth.tx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH;\n+\t\tns->eth.tx_bytes += ICE_RXTX_BYTES_HIGH(pf->old_tx_bytes);\n+\t}\n+\tpf->old_tx_bytes = ns->eth.tx_bytes;\n \tns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast +\n \t\t\t ns->eth.tx_broadcast) * RTE_ETHER_CRC_LEN;\n \ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex 2bff735ca..87984ef9e 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -133,6 +133,9 @@\n #define ICE_ETH_OVERHEAD \\\n \t(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + ICE_VLAN_TAG_SIZE * 2)\n \n+#define ICE_RXTX_BYTES_HIGH(bytes) ((bytes) & ~ICE_40_BIT_MASK)\n+#define ICE_RXTX_BYTES_LOW(bytes) ((bytes) & ICE_40_BIT_MASK)\n+\n /* DDP package type */\n enum ice_pkg_type {\n \tICE_PKG_TYPE_UNKNOWN,\n@@ -248,6 +251,8 @@ struct ice_vsi {\n \tstruct ice_eth_stats eth_stats_offset;\n \tstruct ice_eth_stats eth_stats;\n \tbool offset_loaded;\n+\tuint64_t old_rx_bytes;\n+\tuint64_t old_tx_bytes;\n };\n \n enum proto_xtr_type {\n@@ -391,6 +396,8 @@ struct ice_pf {\n \tstruct ice_parser_list perm_parser_list;\n \tstruct ice_parser_list dist_parser_list;\n \tbool init_link_up;\n+\tuint64_t old_rx_bytes;\n+\tuint64_t old_tx_bytes;\n };\n \n #define ICE_MAX_QUEUE_NUM 2048\n", "prefixes": [ "v3" ] }