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{
    "id": 74516,
    "url": "https://patches.dpdk.org/api/patches/74516/",
    "web_url": "https://patches.dpdk.org/patch/74516/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<20200721054920.29749-1-shougangx.wang@intel.com>",
    "date": "2020-07-21T05:49:20",
    "name": "[v2] net/i40e: fix incorrect hash look up table",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "d8f94e26633a7827ba27c198f252bf4f37e42779",
    "submitter": {
        "id": 1418,
        "url": "https://patches.dpdk.org/api/people/1418/",
        "name": "Shougang Wang",
        "email": "shougangx.wang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/patch/74516/mbox/",
    "series": [
        {
            "id": 11187,
            "url": "https://patches.dpdk.org/api/series/11187/",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11187",
            "date": "2020-07-21T05:49:20",
            "name": "[v2] net/i40e: fix incorrect hash look up table",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/11187/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/74516/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/74516/checks/",
    "tags": {},
    "headers": {
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "X-IronPort-AV": [
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        ],
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            "\n 68aDYteCOzI5KQgG0h1YTJMo355yjKSAMffvGx7S0g5qAdBqKYP4RD4GH+4rPreGo0rqBqu7UE\n XU2hOzVSXNuQ==",
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        "X-BeenThere": "dev@dpdk.org",
        "References": "<20200715063515.9262-1-shougangx.wang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2] net/i40e: fix incorrect hash look up table",
        "Content-Type": "text/plain; charset=UTF-8",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0B604A0527;\n\tTue, 21 Jul 2020 08:03:14 +0200 (CEST)",
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        "X-ExtLoop1": "1",
        "Date": "Tue, 21 Jul 2020 05:49:20 +0000",
        "Content-Transfer-Encoding": "8bit",
        "To": "dev@dpdk.org",
        "From": "Shougang Wang <shougangx.wang@intel.com>",
        "In-Reply-To": "<20200715063515.9262-1-shougangx.wang@intel.com>",
        "Cc": "beilei.xing@intel.com, jia.guo@intel.com,\n Shougang Wang <shougangx.wang@intel.com>, stable@dpdk.org",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Message-Id": "<20200721054920.29749-1-shougangx.wang@intel.com>",
        "Return-Path": "<dev-bounces@dpdk.org>"
    },
    "content": "The hash look up table(LUT) will not be initializing when starting\ntestpmd with --disable-rss. So that some invalid queue indexes may still\nin the LUT. When enable RSS by creating RSS rule, some packets will not\nbe into the valid queues.\nThis patch fixes this issue by initializing the LUT when creating an RSS\nrule.\n\nFixes: feaae285b342 (\"net/i40e: support hash configuration in RSS flow\")\nCc: stable@dpdk.org\n\nSigned-off-by: Shougang Wang <shougangx.wang@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 134 ++++++++++++++++-----------------\n 1 file changed, 63 insertions(+), 71 deletions(-)",
    "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 393b5320f..e56543393 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -13070,6 +13070,55 @@ i40e_rss_conf_init(struct i40e_rte_flow_rss_conf *out,\n \treturn 0;\n }\n \n+/* If conf is NULL, function will init hash LUT with default configration*/\n+static int\n+i40e_rss_set_lut(struct i40e_pf *pf,\n+\t\t struct i40e_rte_flow_rss_conf *conf)\n+{\n+\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n+\tuint32_t lut = 0;\n+\tuint16_t j, num;\n+\tuint32_t i;\n+\n+\t/* If both VMDQ and RSS enabled, not all of PF queues are configured.\n+\t * It's necessary to calculate the actual PF queues that are configured.\n+\t */\n+\tif (pf->dev_data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG)\n+\t\tnum = i40e_pf_calc_configured_queues_num(pf);\n+\telse\n+\t\tnum = pf->dev_data->nb_rx_queues;\n+\n+\tif (conf == NULL)\n+\t\tnum = RTE_MIN(num, I40E_MAX_Q_PER_TC);\n+\telse\n+\t\tnum = RTE_MIN(num, conf->conf.queue_num);\n+\tPMD_DRV_LOG(INFO, \"Max of contiguous %u PF queues are configured\",\n+\t\t\tnum);\n+\n+\tif (num == 0) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\"No PF queues are configured to enable RSS for port %u\",\n+\t\t\tpf->dev_data->port_id);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\t/* Fill in redirection table */\n+\tfor (i = 0, j = 0; i < hw->func_caps.rss_table_size; i++, j++) {\n+\t\tif (j == num)\n+\t\t\tj = 0;\n+\t\tif (conf == NULL)\n+\t\t\tlut = (lut << 8) | (j & ((0x1 <<\n+\t\t\t\thw->func_caps.rss_table_entry_width) - 1));\n+\t\telse\n+\t\t\tlut = (lut << 8) | (conf->conf.queue[j] & ((0x1 <<\n+\t\t\thw->func_caps.rss_table_entry_width) - 1));\n+\t\tif ((i & 3) == 3)\n+\t\t\tI40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut);\n+\t}\n+\n+\treturn 0;\n+}\n+\n /* Write HENA register to enable hash */\n static int\n i40e_rss_hash_set(struct i40e_pf *pf, struct i40e_rte_flow_rss_conf *rss_conf)\n@@ -13318,12 +13367,24 @@ static int\n i40e_rss_enable_hash(struct i40e_pf *pf,\n \t\tstruct i40e_rte_flow_rss_conf *conf)\n {\n+\tenum rte_eth_rx_mq_mode mq_mode = pf->dev_data->dev_conf.rxmode.mq_mode;\n \tstruct i40e_rte_flow_rss_conf *rss_info = &pf->rss_info;\n \tstruct i40e_rte_flow_rss_conf rss_conf;\n+\tint ret;\n \n \tif (!(conf->conf.types & pf->adapter->flow_types_mask))\n \t\treturn -ENOTSUP;\n \n+\t/* If the RSS is disabled before this, the LUT is uninitialized. \n+\t * So it is necessary to initialize it here.\n+\t */\n+\tif (!(mq_mode & ETH_MQ_RX_RSS_FLAG) && !pf->rss_info.conf.queue_num &&\n+\t    !pf->adapter->rss_reta_updated) {\n+\t\tret = i40e_rss_set_lut(pf, NULL);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n \tmemset(&rss_conf, 0, sizeof(rss_conf));\n \trte_memcpy(&rss_conf, conf, sizeof(rss_conf));\n \n@@ -13362,39 +13423,7 @@ static int\n i40e_rss_config_queue_region(struct i40e_pf *pf,\n \t\tstruct i40e_rte_flow_rss_conf *conf)\n {\n-\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n-\tuint32_t lut = 0;\n-\tuint16_t j, num;\n-\tuint32_t i;\n-\n-\t/* If both VMDQ and RSS enabled, not all of PF queues are configured.\n-\t * It's necessary to calculate the actual PF queues that are configured.\n-\t */\n-\tif (pf->dev_data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG)\n-\t\tnum = i40e_pf_calc_configured_queues_num(pf);\n-\telse\n-\t\tnum = pf->dev_data->nb_rx_queues;\n-\n-\tnum = RTE_MIN(num, conf->conf.queue_num);\n-\tPMD_DRV_LOG(INFO, \"Max of contiguous %u PF queues are configured\",\n-\t\t\tnum);\n-\n-\tif (num == 0) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\"No PF queues are configured to enable RSS for port %u\",\n-\t\t\tpf->dev_data->port_id);\n-\t\treturn -ENOTSUP;\n-\t}\n-\n-\t/* Fill in redirection table */\n-\tfor (i = 0, j = 0; i < hw->func_caps.rss_table_size; i++, j++) {\n-\t\tif (j == num)\n-\t\t\tj = 0;\n-\t\tlut = (lut << 8) | (conf->conf.queue[j] & ((0x1 <<\n-\t\t\thw->func_caps.rss_table_entry_width) - 1));\n-\t\tif ((i & 3) == 3)\n-\t\t\tI40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut);\n-\t}\n+\ti40e_rss_set_lut(pf, conf);\n \n \ti40e_rss_mark_invalid_rule(pf, conf);\n \n@@ -13491,46 +13520,9 @@ i40e_rss_disable_hash(struct i40e_pf *pf,\n static int\n i40e_rss_clear_queue_region(struct i40e_pf *pf)\n {\n-\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n \tstruct i40e_rte_flow_rss_conf *rss_info = &pf->rss_info;\n-\tuint16_t queue[I40E_MAX_Q_PER_TC];\n-\tuint32_t num_rxq, i;\n-\tuint32_t lut = 0;\n-\tuint16_t j, num;\n-\n-\tnum_rxq = RTE_MIN(pf->dev_data->nb_rx_queues, I40E_MAX_Q_PER_TC);\n \n-\tfor (j = 0; j < num_rxq; j++)\n-\t\tqueue[j] = j;\n-\n-\t/* If both VMDQ and RSS enabled, not all of PF queues are configured.\n-\t * It's necessary to calculate the actual PF queues that are configured.\n-\t */\n-\tif (pf->dev_data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_VMDQ_FLAG)\n-\t\tnum = i40e_pf_calc_configured_queues_num(pf);\n-\telse\n-\t\tnum = pf->dev_data->nb_rx_queues;\n-\n-\tnum = RTE_MIN(num, num_rxq);\n-\tPMD_DRV_LOG(INFO, \"Max of contiguous %u PF queues are configured\",\n-\t\t\tnum);\n-\n-\tif (num == 0) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\"No PF queues are configured to enable RSS for port %u\",\n-\t\t\tpf->dev_data->port_id);\n-\t\treturn -ENOTSUP;\n-\t}\n-\n-\t/* Fill in redirection table */\n-\tfor (i = 0, j = 0; i < hw->func_caps.rss_table_size; i++, j++) {\n-\t\tif (j == num)\n-\t\t\tj = 0;\n-\t\tlut = (lut << 8) | (queue[j] & ((0x1 <<\n-\t\t\thw->func_caps.rss_table_entry_width) - 1));\n-\t\tif ((i & 3) == 3)\n-\t\t\tI40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut);\n-\t}\n+\ti40e_rss_set_lut(pf, NULL);\n \n \trss_info->conf.queue_num = 0;\n \tmemset(&rss_info->conf.queue, 0, sizeof(uint16_t));\n",
    "prefixes": [
        "v2"
    ]
}