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GET /api/patches/74506/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 74506,
    "url": "https://patches.dpdk.org/api/patches/74506/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200720153707.18210-1-david.coyle@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200720153707.18210-1-david.coyle@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200720153707.18210-1-david.coyle@intel.com",
    "date": "2020-07-20T15:37:07",
    "name": "[v1] crypto/qat: add DOCSIS performance optimization",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "b84ef6e64cb2c5eaba10b69df90f23f63ece8b86",
    "submitter": {
        "id": 961,
        "url": "https://patches.dpdk.org/api/people/961/?format=api",
        "name": "Coyle, David",
        "email": "david.coyle@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200720153707.18210-1-david.coyle@intel.com/mbox/",
    "series": [
        {
            "id": 11177,
            "url": "https://patches.dpdk.org/api/series/11177/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11177",
            "date": "2020-07-20T15:37:07",
            "name": "[v1] crypto/qat: add DOCSIS performance optimization",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/11177/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/74506/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/74506/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id ED5E5A0527;\n\tMon, 20 Jul 2020 18:01:48 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E746A1BFBC;\n\tMon, 20 Jul 2020 18:01:47 +0200 (CEST)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id 38B681023\n for <dev@dpdk.org>; Mon, 20 Jul 2020 18:01:45 +0200 (CEST)",
            "from orsmga007.jf.intel.com ([10.7.209.58])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 20 Jul 2020 09:01:44 -0700",
            "from silpixa00399912.ir.intel.com (HELO\n silpixa00399912.ger.corp.intel.com) ([10.237.223.64])\n by orsmga007.jf.intel.com with ESMTP; 20 Jul 2020 09:01:42 -0700"
        ],
        "IronPort-SDR": [
            "\n XCxDF7sEpjvzRA1g5Q2S13KNqTzO7od7/uMvKRp2694U+PYNhxSr4ytou5QIMPcUBCdyZUXF36\n uoSYh0UXPErQ==",
            "\n 4/poHqaX88qzYrDEFYjDfJDdrNjtoSKQ49CRMo0SxUMc/epqqyLRnl//uMqVJK+Jngh3N52lMm\n MG8NznEtCZRg=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9688\"; a=\"147895653\"",
            "E=Sophos;i=\"5.75,375,1589266800\"; d=\"scan'208\";a=\"147895653\"",
            "E=Sophos;i=\"5.75,375,1589266800\"; d=\"scan'208\";a=\"327574130\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "David Coyle <david.coyle@intel.com>",
        "To": "fiona.trahe@intel.com,\n\takhil.goyal@nxp.com",
        "Cc": "dev@dpdk.org, brendan.ryan@intel.com, mairtin.oloingsigh@intel.com,\n declan.doherty@intel.com, pablo.de.lara.guarch@intel.com,\n David Coyle <david.coyle@intel.com>",
        "Date": "Mon, 20 Jul 2020 16:37:07 +0100",
        "Message-Id": "<20200720153707.18210-1-david.coyle@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "Subject": "[dpdk-dev] [PATCH v1] crypto/qat: add DOCSIS performance\n\toptimization",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "DOCSIS protocol performance in the downlink direction can be improved\nsignificantly in the QAT SYM PMD, especially for larger packets, by\npre-processing all CRC generations in a batch before building and\nenqueuing any requests to the HW. This patch adds this optimization.\n\nFixes: 6f0ef237404b (\"crypto/qat: support DOCSIS protocol\")\n\nSigned-off-by: David Coyle <david.coyle@intel.com>\n---\n drivers/common/qat/qat_qp.c  |  2 +\n drivers/crypto/qat/qat_sym.c | 75 ++++++++----------------------------\n drivers/crypto/qat/qat_sym.h | 57 +++++++++++++++++++++++++++\n 3 files changed, 76 insertions(+), 58 deletions(-)",
    "diff": "diff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c\nindex aacd4ab21..6fd836fdb 100644\n--- a/drivers/common/qat/qat_qp.c\n+++ b/drivers/common/qat/qat_qp.c\n@@ -627,6 +627,8 @@ qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops)\n \t\t}\n \t}\n \n+\tif (tmp_qp->service_type == QAT_SERVICE_SYMMETRIC)\n+\t\tqat_sym_preprocess_requests(ops, nb_ops_possible);\n \n \twhile (nb_ops_sent != nb_ops_possible) {\n \t\tif (tmp_qp->service_type == QAT_SERVICE_SYMMETRIC) {\ndiff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c\nindex e6bf11523..e3f98a76b 100644\n--- a/drivers/crypto/qat/qat_sym.c\n+++ b/drivers/crypto/qat/qat_sym.c\n@@ -9,9 +9,6 @@\n #include <rte_crypto_sym.h>\n #include <rte_bus_pci.h>\n #include <rte_byteorder.h>\n-#ifdef RTE_LIBRTE_SECURITY\n-#include <rte_net_crc.h>\n-#endif\n \n #include \"qat_sym.h\"\n \n@@ -102,29 +99,6 @@ qat_bpicipher_preprocess(struct qat_sym_session *ctx,\n \treturn sym_op->cipher.data.length - last_block_len;\n }\n \n-#ifdef RTE_LIBRTE_SECURITY\n-static inline void\n-qat_crc_generate(struct qat_sym_session *ctx,\n-\t\t\tstruct rte_crypto_op *op)\n-{\n-\tstruct rte_crypto_sym_op *sym_op = op->sym;\n-\tuint32_t *crc, crc_data_len;\n-\tuint8_t *crc_data;\n-\n-\tif (ctx->qat_dir == ICP_QAT_HW_CIPHER_ENCRYPT &&\n-\t\t\tsym_op->auth.data.length != 0) {\n-\n-\t\tcrc_data_len = sym_op->auth.data.length;\n-\t\tcrc_data = rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *,\n-\t\t\t\tsym_op->auth.data.offset);\n-\t\tcrc = (uint32_t *)(crc_data + crc_data_len);\n-\n-\t\t*crc = rte_net_crc_calc(crc_data, crc_data_len,\n-\t\t\t\tRTE_NET_CRC32_ETH);\n-\t}\n-}\n-#endif\n-\n static inline void\n set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,\n \t\tstruct icp_qat_fw_la_cipher_req_params *cipher_param,\n@@ -187,7 +161,6 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,\n \tuint64_t auth_data_end = 0;\n \tuint8_t do_sgl = 0;\n \tuint8_t in_place = 1;\n-\tuint8_t is_docsis_sec = 0;\n \tint alignment_adjustment = 0;\n \tstruct rte_crypto_op *op = (struct rte_crypto_op *)in_op;\n \tstruct qat_sym_op_cookie *cookie =\n@@ -211,13 +184,23 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,\n \t} else {\n \t\tctx = (struct qat_sym_session *)get_sec_session_private_data(\n \t\t\t\top->sym->sec_session);\n-\t\tif (ctx && ctx->bpi_ctx == NULL) {\n-\t\t\tQAT_DP_LOG(ERR, \"QAT PMD only supports security\"\n-\t\t\t\t\t\" operation requests for DOCSIS, op\"\n-\t\t\t\t\t\" (%p) is not for DOCSIS.\", op);\n-\t\t\treturn -EINVAL;\n+\t\tif (likely(ctx)) {\n+\t\t\tif (unlikely(ctx->bpi_ctx == NULL)) {\n+\t\t\t\tQAT_DP_LOG(ERR, \"QAT PMD only supports security\"\n+\t\t\t\t\t\t\" operation requests for\"\n+\t\t\t\t\t\t\" DOCSIS, op (%p) is not for\"\n+\t\t\t\t\t\t\" DOCSIS.\", op);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t} else if (unlikely(((op->sym->m_dst != NULL) &&\n+\t\t\t\t\t(op->sym->m_dst != op->sym->m_src)) ||\n+\t\t\t\t\top->sym->m_src->nb_segs > 1)) {\n+\t\t\t\tQAT_DP_LOG(ERR, \"OOP and/or multi-segment\"\n+\t\t\t\t\t\t\" buffers not supported for\"\n+\t\t\t\t\t\t\" DOCSIS security.\");\n+\t\t\t\top->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n \t\t}\n-\t\tis_docsis_sec = 1;\n #endif\n \t}\n \n@@ -281,31 +264,7 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,\n \t\t\tcipher_ofs = op->sym->cipher.data.offset >> 3;\n \n \t\t} else if (ctx->bpi_ctx) {\n-\t\t\t/* DOCSIS processing */\n-#ifdef RTE_LIBRTE_SECURITY\n-\t\t\tif (is_docsis_sec) {\n-\t\t\t\t/* Check for OOP or multi-segment buffers */\n-\t\t\t\tif (unlikely(((op->sym->m_dst != NULL) &&\n-\t\t\t\t\t\t(op->sym->m_dst !=\n-\t\t\t\t\t\top->sym->m_src)) ||\n-\t\t\t\t\t\top->sym->m_src->nb_segs > 1)) {\n-\t\t\t\t\tQAT_DP_LOG(ERR,\n-\t\t\t\t\t\t\"OOP and/or multi-segment \"\n-\t\t\t\t\t\t\"buffers are not supported for \"\n-\t\t\t\t\t\t\"DOCSIS security\");\n-\t\t\t\t\top->status =\n-\t\t\t\t\tRTE_CRYPTO_OP_STATUS_INVALID_ARGS;\n-\t\t\t\t\treturn -EINVAL;\n-\t\t\t\t}\n-\n-\t\t\t\t/* Calculate CRC */\n-\t\t\t\tqat_crc_generate(ctx, op);\n-\t\t\t}\n-#else\n-\t\t\tRTE_SET_USED(is_docsis_sec);\n-#endif\n-\n-\t\t\t/* Only send complete blocks to device.\n+\t\t\t/* DOCSIS - only send complete blocks to device.\n \t\t\t * Process any partial block using CFB mode.\n \t\t\t * Even if 0 complete blocks, still send this to device\n \t\t\t * to get into rx queue for post-process and dequeuing\ndiff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h\nindex 7934dd478..1a9748849 100644\n--- a/drivers/crypto/qat/qat_sym.h\n+++ b/drivers/crypto/qat/qat_sym.h\n@@ -158,6 +158,57 @@ qat_crc_verify(struct qat_sym_session *ctx, struct rte_crypto_op *op)\n \t\t\top->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n \t}\n }\n+\n+static inline void\n+qat_crc_generate(struct qat_sym_session *ctx,\n+\t\t\tstruct rte_crypto_op *op)\n+{\n+\tstruct rte_crypto_sym_op *sym_op = op->sym;\n+\tuint32_t *crc, crc_data_len;\n+\tuint8_t *crc_data;\n+\n+\tif (ctx->qat_dir == ICP_QAT_HW_CIPHER_ENCRYPT &&\n+\t\t\tsym_op->auth.data.length != 0 &&\n+\t\t\tsym_op->m_src->nb_segs == 1) {\n+\n+\t\tcrc_data_len = sym_op->auth.data.length;\n+\t\tcrc_data = rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *,\n+\t\t\t\tsym_op->auth.data.offset);\n+\t\tcrc = (uint32_t *)(crc_data + crc_data_len);\n+\t\t*crc = rte_net_crc_calc(crc_data, crc_data_len,\n+\t\t\t\tRTE_NET_CRC32_ETH);\n+\t}\n+}\n+\n+static inline void\n+qat_sym_preprocess_requests(void **ops, uint16_t nb_ops)\n+{\n+\tstruct rte_crypto_op *op;\n+\tstruct qat_sym_session *ctx;\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < nb_ops; i++) {\n+\t\top = (struct rte_crypto_op *)ops[i];\n+\n+\t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n+\t\t\tctx = (struct qat_sym_session *)\n+\t\t\t\tget_sec_session_private_data(\n+\t\t\t\t\top->sym->sec_session);\n+\n+\t\t\tif (ctx == NULL || ctx->bpi_ctx == NULL)\n+\t\t\t\tcontinue;\n+\n+\t\t\tqat_crc_generate(ctx, op);\n+\t\t}\n+\t}\n+}\n+#else\n+\n+static inline void\n+qat_sym_preprocess_requests(void **ops __rte_unused,\n+\t\t\t\tuint16_t nb_ops __rte_unused)\n+{\n+}\n #endif\n \n static inline void\n@@ -215,6 +266,12 @@ qat_sym_process_response(void **op, uint8_t *resp)\n }\n #else\n \n+static inline void\n+qat_sym_preprocess_requests(void **ops __rte_unused,\n+\t\t\t\tuint16_t nb_ops __rte_unused)\n+{\n+}\n+\n static inline void\n qat_sym_process_response(void **op __rte_unused, uint8_t *resp __rte_unused)\n {\n",
    "prefixes": [
        "v1"
    ]
}