Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/74452/?format=api
{ "id": 74452, "url": "https://patches.dpdk.org/api/patches/74452/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1595182154-36508-11-git-send-email-orika@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1595182154-36508-11-git-send-email-orika@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1595182154-36508-11-git-send-email-orika@mellanox.com", "date": "2020-07-19T18:09:10", "name": "[v5,10/13] regex/mlx5: fastpath setup", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fdaeff833ef62b34c610ca41571e30082fa37c90", "submitter": { "id": 795, "url": "https://patches.dpdk.org/api/people/795/?format=api", "name": "Ori Kam", "email": "orika@mellanox.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1595182154-36508-11-git-send-email-orika@mellanox.com/mbox/", "series": [ { "id": 11154, "url": "https://patches.dpdk.org/api/series/11154/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11154", "date": "2020-07-19T18:09:00", "name": "add Mellanox RegEx PMD", "version": 5, "mbox": "https://patches.dpdk.org/series/11154/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/74452/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/74452/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 12516A0540;\n\tSun, 19 Jul 2020 20:11:21 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id F29261C1B4;\n\tSun, 19 Jul 2020 20:10:13 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id ABBDC1C1A2\n for <dev@dpdk.org>; Sun, 19 Jul 2020 20:10:03 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n orika@mellanox.com) with SMTP; 19 Jul 2020 21:10:02 +0300", "from pegasus04.mtr.labs.mlnx. (pegasus04.mtr.labs.mlnx\n [10.210.16.126])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06JI9ISN009919;\n Sun, 19 Jul 2020 21:10:02 +0300" ], "From": "Ori Kam <orika@mellanox.com>", "To": "jerinj@marvell.com, xiang.w.wang@intel.com, matan@mellanox.com,\n viacheslavo@mellanox.com, Shahaf Shuler <shahafs@mellanox.com>", "Cc": "guyk@marvell.com, dev@dpdk.org, pbhagavatula@marvell.com,\n hemant.agrawal@nxp.com, opher@mellanox.com, alexr@mellanox.com,\n dovrat@marvell.com, pkapoor@marvell.com, nipun.gupta@nxp.com,\n bruce.richardson@intel.com, yang.a.hong@intel.com,\n harry.chang@intel.com, gu.jian1@zte.com.cn, shanjiangh@chinatelecom.cn,\n zhangy.yun@chinatelecom.cn, lixingfu@huachentel.com,\n wushuai@inspur.com, yuyingxia@yxlink.com, fanchenggang@sunyainfo.com,\n davidfgao@tencent.com, liuzhong1@chinaunicom.cn, zhaoyong11@huawei.com,\n oc@yunify.com, jim@netgate.com, hongjun.ni@intel.com, deri@ntop.org,\n fc@napatech.com, arthur.su@lionic.com, thomas@monjalon.net,\n orika@mellanox.com, rasland@mellanox.com,\n Yuval Avnery <yuvalav@mellanox.com>", "Date": "Sun, 19 Jul 2020 18:09:10 +0000", "Message-Id": "<1595182154-36508-11-git-send-email-orika@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1595182154-36508-1-git-send-email-orika@mellanox.com>", "References": "<1593941027-86651-1-git-send-email-orika@mellanox.com>\n <1595182154-36508-1-git-send-email-orika@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v5 10/13] regex/mlx5: fastpath setup", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Yuval Avnery <yuvalav@mellanox.com>\n\nAllocated and register input/output buffers and metadata.\n\nSigned-off-by: Yuval Avnery <yuvalav@mellanox.com>\nAcked-by: Ori Kam <orika@mellanox.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 36 ++++++\n drivers/regex/mlx5/Makefile | 1 +\n drivers/regex/mlx5/meson.build | 1 +\n drivers/regex/mlx5/mlx5_regex.h | 8 ++\n drivers/regex/mlx5/mlx5_regex_control.c | 2 +\n drivers/regex/mlx5/mlx5_regex_fastpath.c | 200 +++++++++++++++++++++++++++++++\n 6 files changed, 248 insertions(+)\n create mode 100644 drivers/regex/mlx5/mlx5_regex_fastpath.c", "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex a59acc7..6a3f22e 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -405,6 +405,42 @@ struct mlx5_cqe_ts {\n \tuint8_t op_own;\n };\n \n+/* MMO metadata segment */\n+\n+#define\tMLX5_OPCODE_MMO\t0x2f\n+#define\tMLX5_OPC_MOD_MMO_REGEX 0x4\n+\n+struct mlx5_wqe_metadata_seg {\n+\tuint32_t mmo_control_31_0; /* mmo_control_63_32 is in ctrl_seg.imm */\n+\tuint32_t lkey;\n+\tuint64_t addr;\n+};\n+\n+struct mlx5_ifc_regexp_mmo_control_bits {\n+\tuint8_t reserved_at_31[0x2];\n+\tuint8_t le[0x1];\n+\tuint8_t reserved_at_28[0x1];\n+\tuint8_t subset_id_0[0xc];\n+\tuint8_t reserved_at_16[0x4];\n+\tuint8_t subset_id_1[0xc];\n+\tuint8_t ctrl[0x4];\n+\tuint8_t subset_id_2[0xc];\n+\tuint8_t reserved_at_16_1[0x4];\n+\tuint8_t subset_id_3[0xc];\n+};\n+\n+struct mlx5_ifc_regexp_metadata_bits {\n+\tuint8_t rof_version[0x10];\n+\tuint8_t latency_count[0x10];\n+\tuint8_t instruction_count[0x10];\n+\tuint8_t primary_thread_count[0x10];\n+\tuint8_t match_count[0x8];\n+\tuint8_t detected_match_count[0x8];\n+\tuint8_t status[0x10];\n+\tuint8_t job_id[0x20];\n+\tuint8_t reserved[0x80];\n+};\n+\n /* Adding direct verbs to data-path. */\n \n /* CQ sequence number mask. */\ndiff --git a/drivers/regex/mlx5/Makefile b/drivers/regex/mlx5/Makefile\nindex 8918ebe..9e11926 100644\n--- a/drivers/regex/mlx5/Makefile\n+++ b/drivers/regex/mlx5/Makefile\n@@ -11,6 +11,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD) += mlx5_regex.c\n SRCS-$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD) += mlx5_rxp.c\n SRCS-$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD) += mlx5_regex_devx.c\n SRCS-$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD) += mlx5_regex_control.c\n+SRCS-$(CONFIG_RTE_LIBRTE_MLX5_REGEX_PMD) += mlx5_regex_fastpath.c\n \n # Basic CFLAGS.\n CFLAGS += -O3\ndiff --git a/drivers/regex/mlx5/meson.build b/drivers/regex/mlx5/meson.build\nindex 4495fa7..d0f8fcf 100644\n--- a/drivers/regex/mlx5/meson.build\n+++ b/drivers/regex/mlx5/meson.build\n@@ -14,6 +14,7 @@ sources = files(\n \t'mlx5_rxp.c',\n \t'mlx5_regex_devx.c',\n \t'mlx5_regex_control.c',\n+\t'mlx5_regex_fastpath.c',\n )\n cflags_options = [\n \t'-std=c11',\ndiff --git a/drivers/regex/mlx5/mlx5_regex.h b/drivers/regex/mlx5/mlx5_regex.h\nindex bf285a1..21bb02b 100644\n--- a/drivers/regex/mlx5/mlx5_regex.h\n+++ b/drivers/regex/mlx5/mlx5_regex.h\n@@ -40,6 +40,11 @@ struct mlx5_regex_qp {\n \tstruct mlx5_regex_sq *sqs; /* Pointer to sq array. */\n \tuint16_t nb_obj; /* Number of sq objects. */\n \tstruct mlx5_regex_cq cq; /* CQ struct. */\n+\tuint32_t free_sqs;\n+\tstruct mlx5_regex_job *jobs;\n+\tstruct ibv_mr *metadata;\n+\tstruct ibv_mr *inputs;\n+\tstruct ibv_mr *outputs;\n };\n \n struct mlx5_regex_db {\n@@ -91,4 +96,7 @@ int mlx5_devx_regex_database_program(void *ctx, uint8_t engine,\n /* mlx5_regex_control.c */\n int mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind,\n \t\t\tconst struct rte_regexdev_qp_conf *cfg);\n+\n+/* mlx5_regex_fastpath.c */\n+int mlx5_regexdev_setup_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id);\n #endif /* MLX5_REGEX_H */\ndiff --git a/drivers/regex/mlx5/mlx5_regex_control.c b/drivers/regex/mlx5/mlx5_regex_control.c\nindex 83d390a..ec57e24 100644\n--- a/drivers/regex/mlx5/mlx5_regex_control.c\n+++ b/drivers/regex/mlx5/mlx5_regex_control.c\n@@ -363,6 +363,8 @@\n \t\t\tgoto error;\n \t\t}\n \t}\n+\n+\tmlx5_regexdev_setup_fastpath(priv, qp_ind);\n \treturn 0;\n \n error:\ndiff --git a/drivers/regex/mlx5/mlx5_regex_fastpath.c b/drivers/regex/mlx5/mlx5_regex_fastpath.c\nnew file mode 100644\nindex 0000000..8d55bbc\n--- /dev/null\n+++ b/drivers/regex/mlx5/mlx5_regex_fastpath.c\n@@ -0,0 +1,200 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2020 Mellanox Technologies, Ltd\n+ */\n+#include <unistd.h>\n+#include <sys/mman.h>\n+\n+#include <rte_malloc.h>\n+#include <rte_log.h>\n+#include <rte_errno.h>\n+#include <rte_bus_pci.h>\n+#include <rte_pci.h>\n+#include <rte_regexdev_driver.h>\n+#include <rte_mbuf.h>\n+\n+\n+#include <infiniband/mlx5dv.h>\n+#include <mlx5_glue.h>\n+#include <mlx5_common.h>\n+#include <mlx5_prm.h>\n+#include <strings.h>\n+\n+#include \"mlx5_regex_utils.h\"\n+#include \"mlx5_rxp.h\"\n+#include \"mlx5_regex.h\"\n+\n+/* Verbs header. */\n+/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */\n+#include <infiniband/mlx5dv.h>\n+\n+#define MAX_WQE_INDEX 0xffff\n+#define MLX5_REGEX_METADATA_SIZE 64\n+#define MLX5_REGEX_MAX_INPUT (1 << 14)\n+#define MLX5_REGEX_MAX_OUTPUT (1 << 11)\n+\n+#define MLX5_REGEX_WQE_METADATA_OFFSET 16\n+#define MLX5_REGEX_WQE_GATHER_OFFSET 32\n+#define MLX5_REGEX_WQE_SCATTER_OFFSET 48\n+\n+static inline uint32_t\n+sq_size_get(struct mlx5_regex_sq *sq)\n+{\n+\treturn (1U << sq->log_nb_desc);\n+}\n+static inline uint32_t\n+cq_size_get(struct mlx5_regex_cq *cq)\n+{\n+\treturn (1U << cq->log_nb_desc);\n+}\n+\n+struct mlx5_regex_job {\n+\tuint64_t user_id;\n+\tuint8_t *input;\n+\tvolatile uint8_t *output;\n+\tvolatile uint8_t *metadata;\n+} __rte_cached_aligned;\n+\n+static inline void\n+set_data_seg(struct mlx5_wqe_data_seg *seg,\n+\t uint32_t length, uint32_t lkey,\n+\t uintptr_t address)\n+{\n+\tseg->byte_count = rte_cpu_to_be_32(length);\n+\tseg->lkey = rte_cpu_to_be_32(lkey);\n+\tseg->addr = rte_cpu_to_be_64(address);\n+}\n+\n+static inline void\n+set_metadata_seg(struct mlx5_wqe_metadata_seg *seg,\n+\t\t uint32_t mmo_control_31_0, uint32_t lkey,\n+\t\t uintptr_t address)\n+{\n+\tseg->mmo_control_31_0 = htobe32(mmo_control_31_0);\n+\tseg->lkey = rte_cpu_to_be_32(lkey);\n+\tseg->addr = rte_cpu_to_be_64(address);\n+}\n+\n+static void\n+setup_sqs(struct mlx5_regex_qp *queue)\n+{\n+\tsize_t sqid, entry;\n+\tuint32_t job_id;\n+\tfor (sqid = 0; sqid < queue->nb_obj; sqid++) {\n+\t\tstruct mlx5_regex_sq *sq = &queue->sqs[sqid];\n+\t\tuint8_t *wqe = (uint8_t *)sq->wqe;\n+\t\tfor (entry = 0 ; entry < sq_size_get(sq); entry++) {\n+\t\t\tjob_id = sqid * sq_size_get(sq) + entry;\n+\t\t\tstruct mlx5_regex_job *job = &queue->jobs[job_id];\n+\n+\t\t\tset_metadata_seg((struct mlx5_wqe_metadata_seg *)\n+\t\t\t\t\t (wqe + MLX5_REGEX_WQE_METADATA_OFFSET),\n+\t\t\t\t\t 0, queue->metadata->lkey,\n+\t\t\t\t\t (uintptr_t)job->metadata);\n+\t\t\tset_data_seg((struct mlx5_wqe_data_seg *)\n+\t\t\t\t (wqe + MLX5_REGEX_WQE_GATHER_OFFSET),\n+\t\t\t\t 0, queue->inputs->lkey,\n+\t\t\t\t (uintptr_t)job->input);\n+\t\t\tset_data_seg((struct mlx5_wqe_data_seg *)\n+\t\t\t\t (wqe + MLX5_REGEX_WQE_SCATTER_OFFSET),\n+\t\t\t\t MLX5_REGEX_MAX_OUTPUT,\n+\t\t\t\t queue->outputs->lkey,\n+\t\t\t\t (uintptr_t)job->output);\n+\t\t\twqe += 64;\n+\t\t}\n+\t\tqueue->free_sqs |= 1 << sqid;\n+\t}\n+}\n+\n+static int\n+setup_buffers(struct mlx5_regex_qp *qp, struct ibv_pd *pd)\n+{\n+\tuint32_t i;\n+\tint err;\n+\n+\tvoid *ptr = rte_calloc(__func__, qp->nb_desc,\n+\t\t\t MLX5_REGEX_METADATA_SIZE,\n+\t\t\t MLX5_REGEX_METADATA_SIZE);\n+\tif (!ptr)\n+\t\treturn -ENOMEM;\n+\n+\tqp->metadata = mlx5_glue->reg_mr(pd, ptr,\n+\t\t\t\t\t MLX5_REGEX_METADATA_SIZE*qp->nb_desc,\n+\t\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n+\tif (!qp->metadata) {\n+\t\trte_free(ptr);\n+\t\treturn -EINVAL;\n+\t}\n+\tptr = rte_calloc(__func__, qp->nb_desc,\n+\t\t\t MLX5_REGEX_MAX_INPUT,\n+\t\t\t MLX5_REGEX_MAX_INPUT);\n+\n+\tif (!ptr) {\n+\t\terr = -ENOMEM;\n+\t\tgoto err_input;\n+\t}\n+\tqp->inputs = mlx5_glue->reg_mr(pd, ptr,\n+\t\t\t\t MLX5_REGEX_MAX_INPUT*qp->nb_desc,\n+\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n+\tif (!qp->inputs) {\n+\t\trte_free(ptr);\n+\t\terr = -EINVAL;\n+\t\tgoto err_input;\n+\t}\n+\n+\tptr = rte_calloc(__func__, qp->nb_desc,\n+\t\t\t MLX5_REGEX_MAX_OUTPUT,\n+\t\t\t MLX5_REGEX_MAX_OUTPUT);\n+\tif (!ptr) {\n+\t\terr = -ENOMEM;\n+\t\tgoto err_output;\n+\t}\n+\tqp->outputs = mlx5_glue->reg_mr(pd, ptr,\n+\t\t\t\t\tMLX5_REGEX_MAX_OUTPUT*qp->nb_desc,\n+\t\t\t\t\tIBV_ACCESS_LOCAL_WRITE);\n+\tif (!qp->outputs) {\n+\t\trte_free(ptr);\n+\t\terr = -EINVAL;\n+\t\tgoto err_output;\n+\t}\n+\n+\t/* distribute buffers to jobs */\n+\tfor (i = 0; i < qp->nb_desc; i++) {\n+\t\tqp->jobs[i].input =\n+\t\t\t(uint8_t *)qp->inputs->addr +\n+\t\t\t(i % qp->nb_desc) * MLX5_REGEX_MAX_INPUT;\n+\t\tqp->jobs[i].output =\n+\t\t\t(uint8_t *)qp->outputs->addr +\n+\t\t\t(i % qp->nb_desc) * MLX5_REGEX_MAX_OUTPUT;\n+\t\tqp->jobs[i].metadata =\n+\t\t\t(uint8_t *)qp->metadata->addr +\n+\t\t\t(i % qp->nb_desc) * MLX5_REGEX_METADATA_SIZE;\n+\t}\n+\treturn 0;\n+\n+err_output:\n+\tptr = qp->inputs->addr;\n+\trte_free(ptr);\n+\tmlx5_glue->dereg_mr(qp->inputs);\n+err_input:\n+\tptr = qp->metadata->addr;\n+\trte_free(ptr);\n+\tmlx5_glue->dereg_mr(qp->metadata);\n+\treturn err;\n+}\n+\n+int\n+mlx5_regexdev_setup_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id)\n+{\n+\tstruct mlx5_regex_qp *qp = &priv->qps[qp_id];\n+\tint err;\n+\n+\tqp->jobs = rte_calloc(__func__, qp->nb_desc, sizeof(*qp->jobs),\n+\t\t\t sizeof(*qp->jobs));\n+\tif (!qp->jobs)\n+\t\treturn -ENOMEM;\n+\terr = setup_buffers(qp, priv->pd);\n+\tif (err)\n+\t\treturn err;\n+\tsetup_sqs(qp);\n+\treturn 0;\n+}\n", "prefixes": [ "v5", "10/13" ] }