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GET /api/patches/73540/?format=api
{ "id": 73540, "url": "https://patches.dpdk.org/api/patches/73540/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/98b10e12eb46cff65494a94eaf0f04b2dcefd245.1594238610.git.vladimir.medvedkin@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<98b10e12eb46cff65494a94eaf0f04b2dcefd245.1594238610.git.vladimir.medvedkin@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/98b10e12eb46cff65494a94eaf0f04b2dcefd245.1594238610.git.vladimir.medvedkin@intel.com", "date": "2020-07-08T20:16:06", "name": "[v4,1/8] eal: introduce zmm type for AVX 512-bit", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8ee40953e322e5415413f130611a049591c02d80", "submitter": { "id": 1216, "url": "https://patches.dpdk.org/api/people/1216/?format=api", "name": "Vladimir Medvedkin", "email": "vladimir.medvedkin@intel.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/98b10e12eb46cff65494a94eaf0f04b2dcefd245.1594238610.git.vladimir.medvedkin@intel.com/mbox/", "series": [ { "id": 10896, "url": "https://patches.dpdk.org/api/series/10896/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10896", "date": "2020-07-08T20:16:05", "name": "fib: implement AVX512 vector lookup", "version": 4, "mbox": "https://patches.dpdk.org/series/10896/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/73540/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/73540/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 11262A0526;\n\tWed, 8 Jul 2020 22:17:01 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2D09C1DC5E;\n\tWed, 8 Jul 2020 22:16:54 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id B38F31D942\n for <dev@dpdk.org>; Wed, 8 Jul 2020 22:16:50 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 08 Jul 2020 13:16:49 -0700", "from silpixa00400322.ir.intel.com ([10.237.214.86])\n by fmsmga002.fm.intel.com with ESMTP; 08 Jul 2020 13:16:48 -0700" ], "IronPort-SDR": [ "\n twM7Ag+45Z/2ENwQns+F/URVIilJspymfl5Dt0OQczzevZGLhJliv49HQSVNBvPBn+E/Jhyo2g\n incgczbfmAYQ==", "\n BMw/eumzXmBqf5s/JwQRS/s7kOc7+SFvi9UsG18fpirs+AaXVeGfnkcLthLOGZHYWVZSfgbGf+\n 2pFsix93KMPg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9676\"; a=\"135346078\"", "E=Sophos;i=\"5.75,329,1589266800\"; d=\"scan'208\";a=\"135346078\"", "E=Sophos;i=\"5.75,329,1589266800\"; d=\"scan'208\";a=\"315988579\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Vladimir Medvedkin <vladimir.medvedkin@intel.com>", "To": "dev@dpdk.org", "Cc": "konstantin.ananyev@intel.com,\n\tbruce.richardson@intel.com", "Date": "Wed, 8 Jul 2020 21:16:06 +0100", "Message-Id": "\n <98b10e12eb46cff65494a94eaf0f04b2dcefd245.1594238610.git.vladimir.medvedkin@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": [ "<cover.1594238609.git.vladimir.medvedkin@intel.com>", "<cover.1594238609.git.vladimir.medvedkin@intel.com>" ], "References": [ "<cover.1594238609.git.vladimir.medvedkin@intel.com>", "<cover.1589890262.git.vladimir.medvedkin@intel.com>\n <cover.1594238609.git.vladimir.medvedkin@intel.com>" ], "Subject": "[dpdk-dev] [PATCH v4 1/8] eal: introduce zmm type for AVX 512-bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "New data type to manipulate 512 bit AVX values.\n\nSigned-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>\nAcked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\n---\n lib/librte_eal/x86/include/rte_vect.h | 21 +++++++++++++++++++++\n 1 file changed, 21 insertions(+)", "diff": "diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h\nindex df5a60762..ae59126bc 100644\n--- a/lib/librte_eal/x86/include/rte_vect.h\n+++ b/lib/librte_eal/x86/include/rte_vect.h\n@@ -13,6 +13,7 @@\n \n #include <stdint.h>\n #include <rte_config.h>\n+#include <rte_common.h>\n #include \"generic/rte_vect.h\"\n \n #if (defined(__ICC) || \\\n@@ -90,6 +91,26 @@ __extension__ ({ \\\n })\n #endif /* (defined(__ICC) && __ICC < 1210) */\n \n+#ifdef __AVX512F__\n+\n+typedef __m512i __x86_zmm_t;\n+\n+#define\tZMM_SIZE\t(sizeof(__x86_zmm_t))\n+#define\tZMM_MASK\t(ZMM_SIZE - 1)\n+\n+typedef union __rte_x86_zmm {\n+\t__x86_zmm_t\t z;\n+\tymm_t y[ZMM_SIZE / sizeof(ymm_t)];\n+\txmm_t x[ZMM_SIZE / sizeof(xmm_t)];\n+\tuint8_t u8[ZMM_SIZE / sizeof(uint8_t)];\n+\tuint16_t u16[ZMM_SIZE / sizeof(uint16_t)];\n+\tuint32_t u32[ZMM_SIZE / sizeof(uint32_t)];\n+\tuint64_t u64[ZMM_SIZE / sizeof(uint64_t)];\n+\tdouble pd[ZMM_SIZE / sizeof(double)];\n+} __rte_aligned(ZMM_SIZE) __rte_x86_zmm_t;\n+\n+#endif /* __AVX512F__ */\n+\n #ifdef __cplusplus\n }\n #endif\n", "prefixes": [ "v4", "1/8" ] }