Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/7346/?format=api
{ "id": 7346, "url": "https://patches.dpdk.org/api/patches/7346/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1443700690-16524-1-git-send-email-rkerur@gmail.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1443700690-16524-1-git-send-email-rkerur@gmail.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1443700690-16524-1-git-send-email-rkerur@gmail.com", "date": "2015-10-01T11:58:10", "name": "[dpdk-dev,v4] Move rte_mbuf macros to common header file", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b9d0bbb0cb96bf1e1480dd85614ea5cab5c2668e", "submitter": { "id": 134, "url": "https://patches.dpdk.org/api/people/134/?format=api", "name": "Ravi Kerur", "email": "rkerur@gmail.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1443700690-16524-1-git-send-email-rkerur@gmail.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/7346/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/7346/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 173118DAC;\n\tThu, 1 Oct 2015 13:58:16 +0200 (CEST)", "from mail-pa0-f54.google.com (mail-pa0-f54.google.com\n\t[209.85.220.54]) by dpdk.org (Postfix) with ESMTP id B31A38D36\n\tfor <dev@dpdk.org>; Thu, 1 Oct 2015 13:58:14 +0200 (CEST)", "by padhy16 with SMTP id hy16so73063543pad.1\n\tfor <dev@dpdk.org>; Thu, 01 Oct 2015 04:58:14 -0700 (PDT)", "from user-PC.hsd1.ca.comcast.net\n\t(c-24-4-155-27.hsd1.ca.comcast.net. [24.4.155.27])\n\tby smtp.gmail.com with ESMTPSA id\n\tol3sm6310978pbb.49.2015.10.01.04.58.12\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tThu, 01 Oct 2015 04:58:13 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113;\n\th=from:to:cc:subject:date:message-id;\n\tbh=vT4jbMB5QDytBvIxOF6YTwUYA1V6J5wgb8+A6PSgAi8=;\n\tb=tVff0SZxRk0V2SJQOEPS2kzcUSU9vegNn1jB0jT4KoHVRl+tbcGdqdE5P/fbhuIajp\n\tdId7qvMP4C19MmLE9jn7Wf7lyLyjPrCVkN75XEyOe5bfUF+9HzulITGCP2WZRA198ebq\n\tX93IPLKPPc59/mGvOsXr9N6GX/tTSD1p1mFzoN18hcRboeIS3c5w6++09o7mduPqnMpC\n\tyG8vxK0kRyQwtW/s0k/pGvyQ6fvZUQVmlQLmRfhTXwSwkagEWQggnGO5eNEZz2PyAb55\n\tEgOcvzEp+suClOQ1ZuZrJYJV07RgX+h7AkNtaeIh1Z6Oq0O/3Xw/e6gxKfNp66mUMKGV\n\tiBog==", "X-Received": "by 10.66.252.35 with SMTP id zp3mr11595527pac.43.1443700694020; \n\tThu, 01 Oct 2015 04:58:14 -0700 (PDT)", "From": "Ravi Kerur <rkerur@gmail.com>", "To": "dev@dpdk.org", "Date": "Thu, 1 Oct 2015 04:58:10 -0700", "Message-Id": "<1443700690-16524-1-git-send-email-rkerur@gmail.com>", "X-Mailer": "git-send-email 1.9.1", "Subject": "[dpdk-dev] [PATCH v4] Move rte_mbuf macros to common header file", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Macros RTE_MBUF_DATA_DMA_ADDR and RTE_MBUF_DATA_DMA_ADDR_DEFAULT\nare defined in each PMD driver file. Convert macros to inline\nfunctions and move them to common lib/librte_mbuf/rte_mbuf.h file.\nPMD drivers include rte_mbuf.h file directly/indirectly hence no\nadditionl header file inclusion is necessary.\n\nv4:\n > Remove un-necessary cast and braces in inline functions.\n\t> Add 'const' for function parameters\n\nv3:\n > Changed converted macro->inline names to lower-case\n > Fix checkpatch.pl errors and warnings\n (camelcase warning is not fixed)\n\n > Compiled following targets\n > x86_64-native-linuxapp-clang\n > x86_64-native-linuxapp-gcc\n > i686-native-linuxapp-gcc\n > x86_64-native-bsdapp-gcc\n > x86_64-native-bsdapp-clang\n\n > Tested on:\n > x86_64 ubuntu 14.04, make test\n\nv2:\n > Changed both macros to inline functions in all PMD\n > Changed macro to rte_pktmbuf_mtod in xenvirt module\n\n > Compiled following targets:\n > x86_64-native-linuxapp-clang\n > x86_64-native-linuxapp-gcc\n > i686-native-linuxapp-gcc\n\n > Tested on:\n > x86_64 ubuntu 14.04, testpmd and make test\n\nv1:\n > Move macros into common rte_mbuf header file.\n\n > Compiled following targets:\n > x86_64-native-linuxapp-clang\n > x86_64-native-linuxapp-gcc\n > i686-native-linuxapp-gcc\n > x86_64-native-bsdapp-gcc\n > x86_64-native-bsdapp-clang\n\n Tested on:\n > x86_64 Ubuntu 14.04, testpmd and make test\n > FreeBSD 10.1, testpmd\n\nSigned-off-by: Ravi Kerur <rkerur@gmail.com>\n---\n drivers/net/bnx2x/bnx2x.c | 2 +-\n drivers/net/bnx2x/bnx2x.h | 3 ---\n drivers/net/cxgbe/sge.c | 3 ---\n drivers/net/e1000/em_rxtx.c | 15 +++++----------\n drivers/net/e1000/igb_rxtx.c | 14 ++++----------\n drivers/net/i40e/i40e_rxtx.c | 20 +++++++-------------\n drivers/net/ixgbe/ixgbe_rxtx.c | 14 +++++++-------\n drivers/net/ixgbe/ixgbe_rxtx.h | 6 ------\n drivers/net/virtio/virtio_rxtx.c | 2 +-\n drivers/net/virtio/virtqueue.h | 3 ---\n drivers/net/vmxnet3/vmxnet3_rxtx.c | 11 +++--------\n drivers/net/xenvirt/virtqueue.h | 5 +----\n lib/librte_mbuf/rte_mbuf.h | 12 ++++++++++++\n 13 files changed, 41 insertions(+), 69 deletions(-)", "diff": "diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c\nindex fed7a06..a3f118c 100644\n--- a/drivers/net/bnx2x/bnx2x.c\n+++ b/drivers/net/bnx2x/bnx2x.c\n@@ -2147,7 +2147,7 @@ int bnx2x_tx_encap(struct bnx2x_tx_queue *txq, struct rte_mbuf **m_head, int m_p\n \t\ttx_start_bd = &txq->tx_ring[TX_BD(bd_prod, txq)].start_bd;\n \n \t\ttx_start_bd->addr =\n-\t\t rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR(m0));\n+\t\t rte_cpu_to_le_64(rte_mbuf_data_dma_addr(m0));\n \t\ttx_start_bd->nbytes = rte_cpu_to_le_16(m0->data_len);\n \t\ttx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;\n \t\ttx_start_bd->general_data =\ndiff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h\nindex 867b92a..28bd83f 100644\n--- a/drivers/net/bnx2x/bnx2x.h\n+++ b/drivers/net/bnx2x/bnx2x.h\n@@ -141,9 +141,6 @@ struct bnx2x_device_type {\n \tchar *bnx2x_name;\n };\n \n-#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n-\t((uint64_t)((mb)->buf_physaddr + (mb)->data_off))\n-\n #define BNX2X_PAGE_SHIFT 12\n #define BNX2X_PAGE_SIZE (1 << BNX2X_PAGE_SHIFT)\n #define BNX2X_PAGE_MASK (~(BNX2X_PAGE_SIZE - 1))\ndiff --git a/drivers/net/cxgbe/sge.c b/drivers/net/cxgbe/sge.c\nindex 6eb1244..8f4c025 100644\n--- a/drivers/net/cxgbe/sge.c\n+++ b/drivers/net/cxgbe/sge.c\n@@ -1267,9 +1267,6 @@ static struct rte_mbuf *t4_pktgl_to_mbuf(const struct pkt_gl *gl)\n \treturn t4_pktgl_to_mbuf_usembufs(gl);\n }\n \n-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \\\n-\t((dma_addr_t) ((mb)->buf_physaddr + (mb)->data_off))\n-\n /**\n * t4_ethrx_handler - process an ingress ethernet packet\n * @q: the response queue that received the packet\ndiff --git a/drivers/net/e1000/em_rxtx.c b/drivers/net/e1000/em_rxtx.c\nindex 3b8776d..39c9744 100644\n--- a/drivers/net/e1000/em_rxtx.c\n+++ b/drivers/net/e1000/em_rxtx.c\n@@ -88,12 +88,6 @@ rte_rxmbuf_alloc(struct rte_mempool *mp)\n \treturn (m);\n }\n \n-#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + (mb)->data_off)\n-\n-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)\n-\n /**\n * Structure associated with each descriptor of the RX ring of a RX queue.\n */\n@@ -585,7 +579,7 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t * Set up Transmit Data Descriptor.\n \t\t\t */\n \t\t\tslen = m_seg->data_len;\n-\t\t\tbuf_dma_addr = RTE_MBUF_DATA_DMA_ADDR(m_seg);\n+\t\t\tbuf_dma_addr = rte_mbuf_data_dma_addr(m_seg);\n \n \t\t\ttxd->buffer_addr = rte_cpu_to_le_64(buf_dma_addr);\n \t\t\ttxd->lower.data = rte_cpu_to_le_32(cmd_type_len | slen);\n@@ -769,7 +763,7 @@ eth_em_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm = rxe->mbuf;\n \t\trxe->mbuf = nmb;\n \t\tdma_addr =\n-\t\t\trte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(nmb));\n \t\trxdp->buffer_addr = dma_addr;\n \t\trxdp->status = 0;\n \n@@ -949,7 +943,7 @@ eth_em_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t */\n \t\trxm = rxe->mbuf;\n \t\trxe->mbuf = nmb;\n-\t\tdma = rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));\n+\t\tdma = rte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(nmb));\n \t\trxdp->buffer_addr = dma;\n \t\trxdp->status = 0;\n \n@@ -1623,7 +1617,8 @@ em_alloc_rx_queue_mbufs(struct em_rx_queue *rxq)\n \t\t\treturn (-ENOMEM);\n \t\t}\n \n-\t\tdma_addr = rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf));\n+\t\tdma_addr =\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(mbuf));\n \n \t\t/* Clear HW ring memory */\n \t\trxq->rx_ring[i] = rxd_init;\ndiff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c\nindex 19905fd..eb09bca 100644\n--- a/drivers/net/e1000/igb_rxtx.c\n+++ b/drivers/net/e1000/igb_rxtx.c\n@@ -88,12 +88,6 @@ rte_rxmbuf_alloc(struct rte_mempool *mp)\n \treturn (m);\n }\n \n-#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + (mb)->data_off)\n-\n-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)\n-\n /**\n * Structure associated with each descriptor of the RX ring of a RX queue.\n */\n@@ -550,7 +544,7 @@ eth_igb_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t * Set up transmit descriptor.\n \t\t\t */\n \t\t\tslen = (uint16_t) m_seg->data_len;\n-\t\t\tbuf_dma_addr = RTE_MBUF_DATA_DMA_ADDR(m_seg);\n+\t\t\tbuf_dma_addr = rte_mbuf_data_dma_addr(m_seg);\n \t\t\ttxd->read.buffer_addr =\n \t\t\t\trte_cpu_to_le_64(buf_dma_addr);\n \t\t\ttxd->read.cmd_type_len =\n@@ -820,7 +814,7 @@ eth_igb_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm = rxe->mbuf;\n \t\trxe->mbuf = nmb;\n \t\tdma_addr =\n-\t\t\trte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(nmb));\n \t\trxdp->read.hdr_addr = 0;\n \t\trxdp->read.pkt_addr = dma_addr;\n \n@@ -1006,7 +1000,7 @@ eth_igb_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t */\n \t\trxm = rxe->mbuf;\n \t\trxe->mbuf = nmb;\n-\t\tdma = rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));\n+\t\tdma = rte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(nmb));\n \t\trxdp->read.pkt_addr = dma;\n \t\trxdp->read.hdr_addr = 0;\n \n@@ -1954,7 +1948,7 @@ igb_alloc_rx_queue_mbufs(struct igb_rx_queue *rxq)\n \t\t\treturn (-ENOMEM);\n \t\t}\n \t\tdma_addr =\n-\t\t\trte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf));\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(mbuf));\n \t\trxd = &rxq->rx_ring[i];\n \t\trxd->read.hdr_addr = 0;\n \t\trxd->read.pkt_addr = dma_addr;\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex fd656d5..1abe898 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -78,12 +78,6 @@\n \t\tPKT_TX_L4_MASK |\t\t \\\n \t\tPKT_TX_OUTER_IP_CKSUM)\n \n-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)\n-\n-#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n-\t((uint64_t)((mb)->buf_physaddr + (mb)->data_off))\n-\n static const struct rte_memzone *\n i40e_ring_dma_zone_reserve(struct rte_eth_dev *dev,\n \t\t\t const char *ring_name,\n@@ -1104,7 +1098,7 @@ i40e_rx_alloc_bufs(struct i40e_rx_queue *rxq)\n \t\tmb->nb_segs = 1;\n \t\tmb->port = rxq->port_id;\n \t\tdma_addr = rte_cpu_to_le_64(\\\n-\t\t\tRTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb));\n+\t\t\trte_mbuf_data_dma_addr_default(mb));\n \t\trxdp[i].read.hdr_addr = 0;\n \t\trxdp[i].read.pkt_addr = dma_addr;\n \t}\n@@ -1251,7 +1245,7 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \t\trxm = rxe->mbuf;\n \t\trxe->mbuf = nmb;\n \t\tdma_addr =\n-\t\t\trte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(nmb));\n \t\trxdp->read.hdr_addr = 0;\n \t\trxdp->read.pkt_addr = dma_addr;\n \n@@ -1362,7 +1356,7 @@ i40e_recv_scattered_pkts(void *rx_queue,\n \t\trxm = rxe->mbuf;\n \t\trxe->mbuf = nmb;\n \t\tdma_addr =\n-\t\t\trte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(nmb));\n \n \t\t/* Set data buffer address and data length of the mbuf */\n \t\trxdp->read.hdr_addr = 0;\n@@ -1697,7 +1691,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \n \t\t\t/* Setup TX Descriptor */\n \t\t\tslen = m_seg->data_len;\n-\t\t\tbuf_dma_addr = RTE_MBUF_DATA_DMA_ADDR(m_seg);\n+\t\t\tbuf_dma_addr = rte_mbuf_data_dma_addr(m_seg);\n \n \t\t\tPMD_TX_LOG(DEBUG, \"mbuf: %p, TDD[%u]:\\n\"\n \t\t\t\t\"buf_dma_addr: %#\"PRIx64\";\\n\"\n@@ -1799,7 +1793,7 @@ tx4(volatile struct i40e_tx_desc *txdp, struct rte_mbuf **pkts)\n \tuint32_t i;\n \n \tfor (i = 0; i < 4; i++, txdp++, pkts++) {\n-\t\tdma_addr = RTE_MBUF_DATA_DMA_ADDR(*pkts);\n+\t\tdma_addr = rte_mbuf_data_dma_addr(*pkts);\n \t\ttxdp->buffer_addr = rte_cpu_to_le_64(dma_addr);\n \t\ttxdp->cmd_type_offset_bsz =\n \t\t\ti40e_build_ctob((uint32_t)I40E_TD_CMD, 0,\n@@ -1813,7 +1807,7 @@ tx1(volatile struct i40e_tx_desc *txdp, struct rte_mbuf **pkts)\n {\n \tuint64_t dma_addr;\n \n-\tdma_addr = RTE_MBUF_DATA_DMA_ADDR(*pkts);\n+\tdma_addr = rte_mbuf_data_dma_addr(*pkts);\n \ttxdp->buffer_addr = rte_cpu_to_le_64(dma_addr);\n \ttxdp->cmd_type_offset_bsz =\n \t\ti40e_build_ctob((uint32_t)I40E_TD_CMD, 0,\n@@ -2754,7 +2748,7 @@ i40e_alloc_rx_queue_mbufs(struct i40e_rx_queue *rxq)\n \t\tmbuf->port = rxq->port_id;\n \n \t\tdma_addr =\n-\t\t\trte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf));\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(mbuf));\n \n \t\trxd = &rxq->rx_ring[i];\n \t\trxd->read.pkt_addr = dma_addr;\ndiff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c\nindex a598a72..a1483a6 100644\n--- a/drivers/net/ixgbe/ixgbe_rxtx.c\n+++ b/drivers/net/ixgbe/ixgbe_rxtx.c\n@@ -171,7 +171,7 @@ tx4(volatile union ixgbe_adv_tx_desc *txdp, struct rte_mbuf **pkts)\n \tint i;\n \n \tfor (i = 0; i < 4; ++i, ++txdp, ++pkts) {\n-\t\tbuf_dma_addr = RTE_MBUF_DATA_DMA_ADDR(*pkts);\n+\t\tbuf_dma_addr = rte_mbuf_data_dma_addr(*pkts);\n \t\tpkt_len = (*pkts)->data_len;\n \n \t\t/* write data to descriptor */\n@@ -194,7 +194,7 @@ tx1(volatile union ixgbe_adv_tx_desc *txdp, struct rte_mbuf **pkts)\n \tuint64_t buf_dma_addr;\n \tuint32_t pkt_len;\n \n-\tbuf_dma_addr = RTE_MBUF_DATA_DMA_ADDR(*pkts);\n+\tbuf_dma_addr = rte_mbuf_data_dma_addr(*pkts);\n \tpkt_len = (*pkts)->data_len;\n \n \t/* write data to descriptor */\n@@ -810,7 +810,7 @@ ixgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t * Set up Transmit Data Descriptor.\n \t\t\t */\n \t\t\tslen = m_seg->data_len;\n-\t\t\tbuf_dma_addr = RTE_MBUF_DATA_DMA_ADDR(m_seg);\n+\t\t\tbuf_dma_addr = rte_mbuf_data_dma_addr(m_seg);\n \t\t\ttxd->read.buffer_addr =\n \t\t\t\trte_cpu_to_le_64(buf_dma_addr);\n \t\t\ttxd->read.cmd_type_len =\n@@ -1138,7 +1138,7 @@ ixgbe_rx_alloc_bufs(struct ixgbe_rx_queue *rxq, bool reset_mbuf)\n \t\tmb->data_off = RTE_PKTMBUF_HEADROOM;\n \n \t\t/* populate the descriptors */\n-\t\tdma_addr = rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb));\n+\t\tdma_addr = rte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(mb));\n \t\trxdp[i].read.hdr_addr = 0;\n \t\trxdp[i].read.pkt_addr = dma_addr;\n \t}\n@@ -1365,7 +1365,7 @@ ixgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm = rxe->mbuf;\n \t\trxe->mbuf = nmb;\n \t\tdma_addr =\n-\t\t\trte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(nmb));\n \t\trxdp->read.hdr_addr = 0;\n \t\trxdp->read.pkt_addr = dma_addr;\n \n@@ -1658,7 +1658,7 @@ next_desc:\n \n \t\tif (!bulk_alloc) {\n \t\t\t__le64 dma =\n-\t\t\t rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb));\n+\t\t\t rte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(nmb));\n \t\t\t/*\n \t\t\t * Update RX descriptor with the physical address of the\n \t\t\t * new data buffer of the new allocated mbuf.\n@@ -3596,7 +3596,7 @@ ixgbe_alloc_rx_queue_mbufs(struct ixgbe_rx_queue *rxq)\n \t\tmbuf->port = rxq->port_id;\n \n \t\tdma_addr =\n-\t\t\trte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf));\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_dma_addr_default(mbuf));\n \t\trxd = &rxq->rx_ring[i];\n \t\trxd->read.hdr_addr = 0;\n \t\trxd->read.pkt_addr = dma_addr;\ndiff --git a/drivers/net/ixgbe/ixgbe_rxtx.h b/drivers/net/ixgbe/ixgbe_rxtx.h\nindex b9eca67..dbb9f00 100644\n--- a/drivers/net/ixgbe/ixgbe_rxtx.h\n+++ b/drivers/net/ixgbe/ixgbe_rxtx.h\n@@ -40,12 +40,6 @@\n \n #define RTE_IXGBE_DESCS_PER_LOOP 4\n \n-#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + (mb)->data_off)\n-\n-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)\n-\n #ifdef RTE_IXGBE_INC_VECTOR\n #define RTE_IXGBE_RXQ_REARM_THRESH 32\n #define RTE_IXGBE_MAX_RX_BURST RTE_IXGBE_RXQ_REARM_THRESH\ndiff --git a/drivers/net/virtio/virtio_rxtx.c b/drivers/net/virtio/virtio_rxtx.c\nindex c5b53bb..09f5d9d 100644\n--- a/drivers/net/virtio/virtio_rxtx.c\n+++ b/drivers/net/virtio/virtio_rxtx.c\n@@ -229,7 +229,7 @@ virtqueue_enqueue_xmit(struct virtqueue *txvq, struct rte_mbuf *cookie)\n \n \tfor (; ((seg_num > 0) && (cookie != NULL)); seg_num--) {\n \t\tidx = start_dp[idx].next;\n-\t\tstart_dp[idx].addr = RTE_MBUF_DATA_DMA_ADDR(cookie);\n+\t\tstart_dp[idx].addr = rte_mbuf_data_dma_addr(cookie);\n \t\tstart_dp[idx].len = cookie->data_len;\n \t\tstart_dp[idx].flags = VRING_DESC_F_NEXT;\n \t\tcookie = cookie->next;\ndiff --git a/drivers/net/virtio/virtqueue.h b/drivers/net/virtio/virtqueue.h\nindex 7789411..9ea9b96 100644\n--- a/drivers/net/virtio/virtqueue.h\n+++ b/drivers/net/virtio/virtqueue.h\n@@ -68,9 +68,6 @@ struct rte_mbuf;\n \n #define VIRTQUEUE_MAX_NAME_SZ 32\n \n-#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + (mb)->data_off)\n-\n #define VTNET_SQ_RQ_QUEUE_IDX 0\n #define VTNET_SQ_TQ_QUEUE_IDX 1\n #define VTNET_SQ_CQ_QUEUE_IDX 2\ndiff --git a/drivers/net/vmxnet3/vmxnet3_rxtx.c b/drivers/net/vmxnet3/vmxnet3_rxtx.c\nindex 4de5d89..8385478 100644\n--- a/drivers/net/vmxnet3/vmxnet3_rxtx.c\n+++ b/drivers/net/vmxnet3/vmxnet3_rxtx.c\n@@ -77,12 +77,6 @@\n #include \"vmxnet3_logs.h\"\n #include \"vmxnet3_ethdev.h\"\n \n-#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + (mb)->data_off)\n-\n-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \\\n-\t(uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)\n-\n static const uint32_t rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};\n \n static int vmxnet3_post_rx_bufs(vmxnet3_rx_queue_t*, uint8_t);\n@@ -377,7 +371,7 @@ vmxnet3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t transmit buffer size (16K) is greater than\n \t\t\t maximum sizeof mbuf segment size. */\n \t\t\tgdesc = txq->cmd_ring.base + txq->cmd_ring.next2fill;\n-\t\t\tgdesc->txd.addr = RTE_MBUF_DATA_DMA_ADDR(m_seg);\n+\t\t\tgdesc->txd.addr = rte_mbuf_data_dma_addr(m_seg);\n \t\t\tgdesc->dword[2] = dw2 | m_seg->data_len;\n \t\t\tgdesc->dword[3] = 0;\n \n@@ -475,7 +469,8 @@ vmxnet3_post_rx_bufs(vmxnet3_rx_queue_t *rxq, uint8_t ring_id)\n \t\tbuf_info->m = mbuf;\n \t\tbuf_info->len = (uint16_t)(mbuf->buf_len -\n \t\t\t\t\t RTE_PKTMBUF_HEADROOM);\n-\t\tbuf_info->bufPA = RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf);\n+\t\tbuf_info->bufPA =\n+\t\t\trte_mbuf_data_dma_addr_default(mbuf);\n \n \t\t/* Load Rx Descriptor with the buffer's GPA */\n \t\trxd->addr = buf_info->bufPA;\ndiff --git a/drivers/net/xenvirt/virtqueue.h b/drivers/net/xenvirt/virtqueue.h\nindex eff6208..c38288e 100644\n--- a/drivers/net/xenvirt/virtqueue.h\n+++ b/drivers/net/xenvirt/virtqueue.h\n@@ -54,9 +54,6 @@ struct rte_mbuf;\n * Address translatio is between gva<->hva,\n * rather than gpa<->hva in virito spec.\n */\n-#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n-\trte_pktmbuf_mtod(mb, uint64_t)\n-\n enum { VTNET_RQ = 0, VTNET_TQ = 1, VTNET_CQ = 2 };\n \n /**\n@@ -238,7 +235,7 @@ virtqueue_enqueue_xmit(struct virtqueue *txvq, struct rte_mbuf *cookie)\n \tstart_dp[idx].flags = VRING_DESC_F_NEXT;\n \tstart_dp[idx].addr = (uintptr_t)NULL;\n \tidx = start_dp[idx].next;\n-\tstart_dp[idx].addr = RTE_MBUF_DATA_DMA_ADDR(cookie);\n+\tstart_dp[idx].addr = rte_pktmbuf_mtod(cookie, uint64_t);\n \tstart_dp[idx].len = cookie->data_len;\n \tstart_dp[idx].flags = 0;\n \tidx = start_dp[idx].next;\ndiff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h\nindex d7c9030..e2cfabb 100644\n--- a/lib/librte_mbuf/rte_mbuf.h\n+++ b/lib/librte_mbuf/rte_mbuf.h\n@@ -845,6 +845,18 @@ struct rte_mbuf {\n \n static inline uint16_t rte_pktmbuf_priv_size(struct rte_mempool *mp);\n \n+static inline uint64_t\n+rte_mbuf_data_dma_addr(const struct rte_mbuf *mb)\n+{\n+\treturn mb->buf_physaddr + mb->data_off;\n+}\n+\n+static inline uint64_t\n+rte_mbuf_data_dma_addr_default(const struct rte_mbuf *mb)\n+{\n+\treturn mb->buf_physaddr + RTE_PKTMBUF_HEADROOM;\n+}\n+\n /**\n * Return the mbuf owning the data buffer address of an indirect mbuf.\n *\n", "prefixes": [ "dpdk-dev", "v4" ] }