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Content-Type: application/json
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    "id": 73458,
    "url": "",
    "web_url": "",
    "project": {
        "id": 1,
        "url": "",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "",
        "list_email": "",
        "web_url": "",
        "scm_url": "git://",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "{}",
        "commit_url_format": ""
    "msgid": "<>",
    "list_archive_url": "",
    "date": "2020-07-07T15:54:51",
    "name": "[v4,2/4] eventdev: use C11 atomics for lcore timer armed flag",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "3962afa3c13ffaf3688782e10977350a28f497c3",
    "submitter": {
        "id": 833,
        "url": "",
        "name": "Phil Yang",
        "email": ""
    "delegate": {
        "id": 310,
        "url": "",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": ""
    "mbox": "",
    "series": [
            "id": 10861,
            "url": "",
            "web_url": "",
            "date": "2020-07-07T15:54:50",
            "name": "[v4,1/4] eventdev: fix race condition on timer list counter",
            "version": 4,
            "mbox": ""
    "comments": "",
    "check": "fail",
    "checks": "",
    "tags": {},
    "related": [],
    "headers": {
        "Subject": "[dpdk-dev] [PATCH v4 2/4] eventdev: use C11 atomics for lcore timer\n\tarmed flag",
        "List-Post": "<>",
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        "Cc": ",,\n,,,\n,,,\n,,,",
        "List-Subscribe": "<>,\n <>",
        "From": "Phil Yang <>",
        "Return-Path": "<>",
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        "List-Archive": "<>",
        "Date": "Tue,  7 Jul 2020 23:54:51 +0800",
        "Precedence": "list",
        "In-Reply-To": "<>",
        "Message-Id": "<>",
        "X-Mailman-Version": "2.1.15",
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        "List-Id": "DPDK patches and discussions <>",
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            "from ( [])\n\tby (Postfix) with ESMTP id 20827A00BE;\n\tTue,  7 Jul 2020 17:55:32 +0200 (CEST)",
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    "content": "The in_use flag is a per core variable which is not shared between\nlcores in the normal case and the access of this variable should be\nordered on the same core. However, if non-EAL thread pick the highest\nlcore to insert timers into, there is the possibility of conflicts\non this flag between threads. Then the atomic compare-and-swap\noperation is needed.\n\nUse the C11 atomics instead of the generic rte_atomic operations to\navoid the unnecessary barrier on aarch64.\n\nCc:\n\nSigned-off-by: Phil Yang <>\nReviewed-by: Dharmik Thakkar <>\nReviewed-by: Ruifeng Wang <>\nAcked-by: Erik Gabriel Carrillo <>\n---\nv4:\n1.Change 'CAS' to 'compare-and-swap' to pass the coding style check.\n2.Cc to stable release. (Honnappa)\n\nv2:\n1. Make the code comments more accurate. (Erik)\n2. Define the in_use flag as an unsigned type. (Stephen)\n\n lib/librte_eventdev/rte_event_timer_adapter.c | 15 +++++++++++----\n 1 file changed, 11 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/lib/librte_eventdev/rte_event_timer_adapter.c b/lib/librte_eventdev/rte_event_timer_adapter.c\nindex 370ea40..4ed3013 100644\n--- a/lib/librte_eventdev/rte_event_timer_adapter.c\n+++ b/lib/librte_eventdev/rte_event_timer_adapter.c\n@@ -554,7 +554,7 @@ struct swtim {\n \tuint32_t timer_data_id;\n \t/* Track which cores have actually armed a timer */\n \tstruct {\n-\t\trte_atomic16_t v;\n+\t\tuint16_t v;\n \t} __rte_cache_aligned in_use[RTE_MAX_LCORE];\n \t/* Track which cores' timer lists should be polled */\n \tunsigned int poll_lcores[RTE_MAX_LCORE];\n@@ -606,7 +606,8 @@ swtim_callback(struct rte_timer *tim)\n \t\t\t\t      \"with immediate expiry value\");\n \t\t}\n \n-\t\tif (unlikely(rte_atomic16_test_and_set(&sw->in_use[lcore].v))) {\n+\t\tif (unlikely(sw->in_use[lcore].v == 0)) {\n+\t\t\tsw->in_use[lcore].v = 1;\n \t\t\tn_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1,\n \t\t\t\t\t\t     __ATOMIC_RELAXED);\n \t\t\t__atomic_store_n(&sw->poll_lcores[n_lcores], lcore,\n@@ -834,7 +835,7 @@ swtim_init(struct rte_event_timer_adapter *adapter)\n \n \t/* Initialize the variables that track in-use timer lists */\n \tfor (i = 0; i < RTE_MAX_LCORE; i++)\n-\t\trte_atomic16_init(&sw->in_use[i].v);\n+\t\tsw->in_use[i].v = 0;\n \n \t/* Initialize the timer subsystem and allocate timer data instance */\n \tret = rte_timer_subsystem_init();\n@@ -1017,6 +1018,8 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n \tstruct rte_timer *tim, *tims[nb_evtims];\n \tuint64_t cycles;\n \tint n_lcores;\n+\t/* Timer list for this lcore is not in use. */\n+\tuint16_t exp_state = 0;\n \n #ifdef RTE_LIBRTE_EVENTDEV_DEBUG\n \t/* Check that the service is running. */\n@@ -1035,8 +1038,12 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n \t/* If this is the first time we're arming an event timer on this lcore,\n \t * mark this lcore as \"in use\"; this will cause the service\n \t * function to process the timer list that corresponds to this lcore.\n+\t * The atomic compare-and-swap operation can prevent the race condition\n+\t * on in_use flag between multiple non-EAL threads.\n \t */\n-\tif (unlikely(rte_atomic16_test_and_set(&sw->in_use[lcore_id].v))) {\n+\tif (unlikely(__atomic_compare_exchange_n(&sw->in_use[lcore_id].v,\n+\t\t\t&exp_state, 1, 0,\n+\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))) {\n \t\tEVTIM_LOG_DBG(\"Adding lcore id = %u to list of lcores to poll\",\n \t\t\t      lcore_id);\n \t\tn_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1,\n",
    "prefixes": [