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GET /api/patches/73455/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 73455,
    "url": "https://patches.dpdk.org/api/patches/73455/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1594136219-133336-2-git-send-email-bingz@mellanox.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1594136219-133336-2-git-send-email-bingz@mellanox.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1594136219-133336-2-git-send-email-bingz@mellanox.com",
    "date": "2020-07-07T15:36:58",
    "name": "[v4,1/2] rte_flow: add eCPRI key fields to flow API",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "9de138ad3db8fbb42eb906d89fd534c8cb6ca571",
    "submitter": {
        "id": 1357,
        "url": "https://patches.dpdk.org/api/people/1357/?format=api",
        "name": "Bing Zhao",
        "email": "bingz@mellanox.com"
    },
    "delegate": {
        "id": 319,
        "url": "https://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1594136219-133336-2-git-send-email-bingz@mellanox.com/mbox/",
    "series": [
        {
            "id": 10860,
            "url": "https://patches.dpdk.org/api/series/10860/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10860",
            "date": "2020-07-07T15:36:57",
            "name": "rte_flow: introduce eCPRI item for rte_flow",
            "version": 4,
            "mbox": "https://patches.dpdk.org/series/10860/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/73455/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/73455/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 90902A00BE;\n\tTue,  7 Jul 2020 17:37:18 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 258391DEB5;\n\tTue,  7 Jul 2020 17:37:16 +0200 (CEST)",
            "from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130])\n by dpdk.org (Postfix) with ESMTP id 5ADDE1DEB3\n for <dev@dpdk.org>; Tue,  7 Jul 2020 17:37:14 +0200 (CEST)"
        ],
        "From": "Bing Zhao <bingz@mellanox.com>",
        "To": "orika@mellanox.com, john.mcnamara@intel.com, marko.kovacevic@intel.com,\n thomas@monjalon.net, ferruh.yigit@intel.com, arybchenko@solarflare.com,\n olivier.matz@6wind.com",
        "Cc": "dev@dpdk.org, wenzhuo.lu@intel.com, beilei.xing@intel.com,\n bernard.iremonger@intel.com",
        "Date": "Tue,  7 Jul 2020 23:36:58 +0800",
        "Message-Id": "<1594136219-133336-2-git-send-email-bingz@mellanox.com>",
        "X-Mailer": "git-send-email 2.5.5",
        "In-Reply-To": "<1594136219-133336-1-git-send-email-bingz@mellanox.com>",
        "References": "<1593694422-299952-1-git-send-email-bingz@mellanox.com>\n <1594136219-133336-1-git-send-email-bingz@mellanox.com>",
        "Subject": "[dpdk-dev] [PATCH v4 1/2] rte_flow: add eCPRI key fields to flow API",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add a new item \"rte_flow_item_ecpri\" in order to match eCRPI header.\n\neCPRI is a packet based protocol used in the fronthaul interface of\n5G networks. Header format definition could be found in the\nspecification via the link below:\nhttps://www.gigalight.com/downloads/standards/ecpri-specification.pdf\n\neCPRI message can be over Ethernet layer (.1Q supported also) or over\nUDP layer. Message header formats are the same in these two variants.\n\nSigned-off-by: Bing Zhao <bingz@mellanox.com>\nAcked-by: Ori Kam <orika@mellanox.com>\n---\n doc/guides/prog_guide/rte_flow.rst     |   8 ++\n doc/guides/rel_notes/release_20_08.rst |   5 +\n lib/librte_ethdev/rte_flow.c           |   1 +\n lib/librte_ethdev/rte_flow.h           |  31 +++++++\n lib/librte_net/Makefile                |   1 +\n lib/librte_net/meson.build             |   3 +-\n lib/librte_net/rte_ecpri.h             | 163 +++++++++++++++++++++++++++++++++\n lib/librte_net/rte_ether.h             |   1 +\n 8 files changed, 212 insertions(+), 1 deletion(-)\n create mode 100644 lib/librte_net/rte_ecpri.h",
    "diff": "diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst\nindex d5dd18c..669d519 100644\n--- a/doc/guides/prog_guide/rte_flow.rst\n+++ b/doc/guides/prog_guide/rte_flow.rst\n@@ -1362,6 +1362,14 @@ Matches a PFCP Header.\n - ``seid``: session endpoint identifier.\n - Default ``mask`` matches s_field and seid.\n \n+Item: ``ECPRI``\n+^^^^^^^^^^^^^\n+\n+Matches a eCPRI header.\n+\n+- ``hdr``: eCPRI header definition (``rte_ecpri.h``).\n+- Default ``mask`` matches message type of common header only.\n+\n Actions\n ~~~~~~~\n \ndiff --git a/doc/guides/rel_notes/release_20_08.rst b/doc/guides/rel_notes/release_20_08.rst\nindex 5cbc4ce..2140891 100644\n--- a/doc/guides/rel_notes/release_20_08.rst\n+++ b/doc/guides/rel_notes/release_20_08.rst\n@@ -98,6 +98,11 @@ New Features\n   which are used to access packet data in a safe manner. Currently JIT support\n   for these instructions is implemented for x86 only.\n \n+* **Added eCPRI protocol support in rte_flow.**\n+\n+  The ``ECPRI`` item have been added to support eCPRI packet offloading for\n+  5G network.\n+\n * **Added flow performance test application.**\n \n   Added new application to test ``rte_flow`` performance, including:\ndiff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c\nindex 1685be5..f8fdd68 100644\n--- a/lib/librte_ethdev/rte_flow.c\n+++ b/lib/librte_ethdev/rte_flow.c\n@@ -95,6 +95,7 @@ struct rte_flow_desc_data {\n \tMK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_item_higig2_hdr)),\n \tMK_FLOW_ITEM(L2TPV3OIP, sizeof(struct rte_flow_item_l2tpv3oip)),\n \tMK_FLOW_ITEM(PFCP, sizeof(struct rte_flow_item_pfcp)),\n+\tMK_FLOW_ITEM(ECPRI, sizeof(struct rte_flow_item_ecpri)),\n };\n \n /** Generate flow_action[] entry. */\ndiff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h\nindex b0e4199..8a90226 100644\n--- a/lib/librte_ethdev/rte_flow.h\n+++ b/lib/librte_ethdev/rte_flow.h\n@@ -28,6 +28,7 @@\n #include <rte_byteorder.h>\n #include <rte_esp.h>\n #include <rte_higig.h>\n+#include <rte_ecpri.h>\n #include <rte_mbuf.h>\n #include <rte_mbuf_dyn.h>\n \n@@ -527,6 +528,15 @@ enum rte_flow_item_type {\n \t */\n \tRTE_FLOW_ITEM_TYPE_PFCP,\n \n+\t/**\n+\t * Matches eCPRI Header.\n+\t *\n+\t * Configure flow for eCPRI over ETH or UDP packets.\n+\t *\n+\t * See struct rte_flow_item_ecpri.\n+\t */\n+\tRTE_FLOW_ITEM_TYPE_ECPRI,\n+\n };\n \n /**\n@@ -1547,6 +1557,27 @@ struct rte_flow_item_pfcp {\n #endif\n \n /**\n+ * @warning\n+ * @b EXPERIMENTAL: this structure may change without prior notice\n+ *\n+ * RTE_FLOW_ITEM_TYPE_ECPRI\n+ *\n+ * Match eCPRI Header\n+ */\n+struct rte_flow_item_ecpri {\n+\tstruct rte_ecpri_msg_hdr hdr;\n+};\n+\n+/** Default mask for RTE_FLOW_ITEM_TYPE_ECPRI. */\n+#ifndef __cplusplus\n+static const struct rte_flow_item_ecpri rte_flow_item_ecpri_mask = {\n+\t.hdr = {\n+\t\t.dw0 = 0x0,\n+\t},\n+};\n+#endif\n+\n+/**\n  * Matching pattern item definition.\n  *\n  * A pattern is formed by stacking items starting from the lowest protocol\ndiff --git a/lib/librte_net/Makefile b/lib/librte_net/Makefile\nindex aa1d6fe..9830e77 100644\n--- a/lib/librte_net/Makefile\n+++ b/lib/librte_net/Makefile\n@@ -20,5 +20,6 @@ SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_sctp.h rte_icmp.h rte_arp.h\n SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_ether.h rte_gre.h rte_net.h\n SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_net_crc.h rte_mpls.h rte_higig.h\n SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_gtp.h rte_vxlan.h\n+SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_ecpri.h\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/lib/librte_net/meson.build b/lib/librte_net/meson.build\nindex f799349..24ed825 100644\n--- a/lib/librte_net/meson.build\n+++ b/lib/librte_net/meson.build\n@@ -15,7 +15,8 @@ headers = files('rte_ip.h',\n \t'rte_net.h',\n \t'rte_net_crc.h',\n \t'rte_mpls.h',\n-\t'rte_higig.h')\n+\t'rte_higig.h',\n+\t'rte_ecpri.h')\n \n sources = files('rte_arp.c', 'rte_ether.c', 'rte_net.c', 'rte_net_crc.c')\n deps += ['mbuf']\ndiff --git a/lib/librte_net/rte_ecpri.h b/lib/librte_net/rte_ecpri.h\nnew file mode 100644\nindex 0000000..31974b2\n--- /dev/null\n+++ b/lib/librte_net/rte_ecpri.h\n@@ -0,0 +1,163 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2020 Mellanox Technologies, Ltd\n+ */\n+\n+#ifndef _RTE_ECPRI_H_\n+#define _RTE_ECPRI_H_\n+\n+#include <stdint.h>\n+#include <rte_byteorder.h>\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+/**\n+ * eCPRI Protocol Revision 1.0, 1.1, 1.2, 2.0: 0001b\n+ * Other values are reserved for future\n+ */\n+#define RTE_ECPRI_REV_UPTO_20\t\t1\n+\n+/**\n+ * eCPRI message types in specifications\n+ * IWF* types will only be supported from rev.2\n+ */\n+#define RTE_ECPRI_MSG_TYPE_IQ_DATA\t0\n+#define RTE_ECPRI_MSG_TYPE_BIT_SEQ\t1\n+#define RTE_ECPRI_MSG_TYPE_RTC_CTRL\t2\n+#define RTE_ECPRI_MSG_TYPE_GEN_DATA\t3\n+#define RTE_ECPRI_MSG_TYPE_RM_ACC\t4\n+#define RTE_ECPRI_MSG_TYPE_DLY_MSR\t5\n+#define RTE_ECPRI_MSG_TYPE_RMT_RST\t6\n+#define RTE_ECPRI_MSG_TYPE_EVT_IND\t7\n+#define RTE_ECPRI_MSG_TYPE_IWF_UP\t8\n+#define RTE_ECPRI_MSG_TYPE_IWF_OPT\t9\n+#define RTE_ECPRI_MSG_TYPE_IWF_MAP\t10\n+#define RTE_ECPRI_MSG_TYPE_IWF_DCTRL\t11\n+\n+/**\n+ * eCPRI Common Header\n+ */\n+RTE_STD_C11\n+struct rte_ecpri_common_hdr {\n+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN\n+\tuint32_t size:16;\t\t/**< Payload Size */\n+\tuint32_t type:8;\t\t/**< Message Type */\n+\tuint32_t c:1;\t\t\t/**< Concatenation Indicator */\n+\tuint32_t res:3;\t\t\t/**< Reserved */\n+\tuint32_t revision:4;\t\t/**< Protocol Revision */\n+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN\n+\tuint32_t revision:4;\t\t/**< Protocol Revision */\n+\tuint32_t res:3;\t\t\t/**< Reserved */\n+\tuint32_t c:1;\t\t\t/**< Concatenation Indicator */\n+\tuint32_t type:8;\t\t/**< Message Type */\n+\tuint32_t size:16;\t\t/**< Payload Size */\n+#endif\n+} __rte_packed;\n+\n+/**\n+ * eCPRI Message Header of Type #0: IQ Data\n+ */\n+struct rte_ecpri_msg_iq_data {\n+\trte_be16_t pc_id;\t\t/**< Physical channel ID */\n+\trte_be16_t seq_id;\t\t/**< Sequence ID */\n+};\n+\n+/**\n+ * eCPRI Message Header of Type #1: Bit Sequence\n+ */\n+struct rte_ecpri_msg_bit_seq {\n+\trte_be16_t pc_id;\t\t/**< Physical channel ID */\n+\trte_be16_t seq_id;\t\t/**< Sequence ID */\n+};\n+\n+/**\n+ * eCPRI Message Header of Type #2: Real-Time Control Data\n+ */\n+struct rte_ecpri_msg_rtc_ctrl {\n+\trte_be16_t rtc_id;\t\t/**< Real-Time Control Data ID */\n+\trte_be16_t seq_id;\t\t/**< Sequence ID */\n+};\n+\n+/**\n+ * eCPRI Message Header of Type #3: Generic Data Transfer\n+ */\n+struct rte_ecpri_msg_gen_data {\n+\trte_be32_t pc_id;\t\t/**< Physical channel ID */\n+\trte_be32_t seq_id;\t\t/**< Sequence ID */\n+};\n+\n+/**\n+ * eCPRI Message Header of Type #4: Remote Memory Access\n+ */\n+RTE_STD_C11\n+struct rte_ecpri_msg_rm_access {\n+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN\n+\tuint32_t ele_id:16;\t\t/**< Element ID */\n+\tuint32_t rr:4;\t\t\t/**< Req/Resp */\n+\tuint32_t rw:4;\t\t\t/**< Read/Write */\n+\tuint32_t rma_id:8;\t\t/**< Remote Memory Access ID */\n+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN\n+\tuint32_t rma_id:8;\t\t/**< Remote Memory Access ID */\n+\tuint32_t rw:4;\t\t\t/**< Read/Write */\n+\tuint32_t rr:4;\t\t\t/**< Req/Resp */\n+\tuint32_t ele_id:16;\t\t/**< Element ID */\n+#endif\n+\trte_be16_t addr_m;\t\t/**< 48-bits address (16 MSB) */\n+\trte_be32_t addr_l;\t\t/**< 48-bits address (32 LSB) */\n+\trte_be16_t length;\t\t/**< number of bytes */\n+} __rte_packed;\n+\n+/**\n+ * eCPRI Message Header of Type #5: One-Way Delay Measurement\n+ */\n+struct rte_ecpri_msg_delay_measure {\n+\tuint8_t msr_id;\t\t\t/**< Measurement ID */\n+\tuint8_t act_type;\t\t/**< Action Type */\n+};\n+\n+/**\n+ * eCPRI Message Header of Type #6: Remote Reset\n+ */\n+struct rte_ecpri_msg_remote_reset {\n+\tuint8_t msr_id;\t\t\t/**< Measurement ID */\n+\tuint8_t act_type;\t\t/**< Action Type */\n+};\n+\n+/**\n+ * eCPRI Message Header of Type #7: Event Indication\n+ */\n+struct rte_ecpri_msg_event_ind {\n+\tuint8_t evt_id;\t\t\t/**< Event ID */\n+\tuint8_t evt_type;\t\t/**< Event Type */\n+\tuint8_t seq;\t\t\t/**< Sequence Number */\n+\tuint8_t number;\t\t\t/**< Number of Faults/Notif */\n+};\n+\n+/**\n+ * eCPRI Message Header Format: Common Header + Message Types\n+ */\n+RTE_STD_C11\n+struct rte_ecpri_msg_hdr {\n+\tunion {\n+\t\tstruct rte_ecpri_common_hdr common;\n+\t\tuint32_t dw0;\n+\t};\n+\tunion {\n+\t\tstruct rte_ecpri_msg_iq_data type0;\n+\t\tstruct rte_ecpri_msg_bit_seq type1;\n+\t\tstruct rte_ecpri_msg_rtc_ctrl type2;\n+\t\tstruct rte_ecpri_msg_bit_seq type3;\n+\t\tstruct rte_ecpri_msg_rm_access type4;\n+\t\tstruct rte_ecpri_msg_delay_measure type5;\n+\t\tstruct rte_ecpri_msg_remote_reset type6;\n+\t\tstruct rte_ecpri_msg_event_ind type7;\n+\t\tuint32_t dummy[3];\n+\t};\n+};\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_ECPRI_H_ */\ndiff --git a/lib/librte_net/rte_ether.h b/lib/librte_net/rte_ether.h\nindex 0ae4e75..184a3f9 100644\n--- a/lib/librte_net/rte_ether.h\n+++ b/lib/librte_net/rte_ether.h\n@@ -304,6 +304,7 @@ struct rte_vlan_hdr {\n #define RTE_ETHER_TYPE_LLDP 0x88CC /**< LLDP Protocol. */\n #define RTE_ETHER_TYPE_MPLS 0x8847 /**< MPLS ethertype. */\n #define RTE_ETHER_TYPE_MPLSM 0x8848 /**< MPLS multicast ethertype. */\n+#define RTE_ETHER_TYPE_ECPRI 0xAEFE /**< eCPRI ethertype (.1Q supported). */\n \n /**\n  * Extract VLAN tag information into mbuf\n",
    "prefixes": [
        "v4",
        "1/2"
    ]
}