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{
    "id": 73445,
    "url": "https://patches.dpdk.org/api/patches/73445/",
    "web_url": "https://patches.dpdk.org/patch/73445/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<20200707150239.13400-4-arkadiuszx.kusztal@intel.com>",
    "date": "2020-07-07T15:02:39",
    "name": "[v5,3/3] drivers/qat: add handling of capabilities in multi process",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "e54e7c53b5222c681d3e6a23fe5a696c5fe590dc",
    "submitter": {
        "id": 452,
        "url": "https://patches.dpdk.org/api/people/452/",
        "name": "Kusztal, ArkadiuszX",
        "email": "arkadiuszx.kusztal@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "akhil.goyal@nxp.com"
    },
    "mbox": "https://patches.dpdk.org/patch/73445/mbox/",
    "series": [
        {
            "id": 10855,
            "url": "https://patches.dpdk.org/api/series/10855/",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10855",
            "date": "2020-07-07T15:02:36",
            "name": "drivers/qat: improve handling of multi process",
            "version": 5,
            "mbox": "https://patches.dpdk.org/series/10855/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/73445/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/73445/checks/",
    "tags": {},
    "headers": {
        "X-Mailman-Version": "2.1.15",
        "X-ExtLoop1": "1",
        "Errors-To": "dev-bounces@dpdk.org",
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Mailer": "git-send-email 2.19.1.windows.1",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DE356A00BE;\n\tTue,  7 Jul 2020 17:03:54 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9FAEF1DE90;\n\tTue,  7 Jul 2020 17:03:27 +0200 (CEST)",
            "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by dpdk.org (Postfix) with ESMTP id D1C941DE98\n for <dev@dpdk.org>; Tue,  7 Jul 2020 17:03:23 +0200 (CEST)",
            "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Jul 2020 08:03:23 -0700",
            "from akusztax-mobl.ger.corp.intel.com ([10.104.121.84])\n by orsmga002.jf.intel.com with ESMTP; 07 Jul 2020 08:03:21 -0700"
        ],
        "References": "<20200707150239.13400-1-arkadiuszx.kusztal@intel.com>",
        "X-Amp-File-Uploaded": "False",
        "MIME-Version": "1.0",
        "Message-Id": "<20200707150239.13400-4-arkadiuszx.kusztal@intel.com>",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9675\"; a=\"127204250\"",
            "E=Sophos;i=\"5.75,324,1589266800\"; d=\"scan'208\";a=\"127204250\"",
            "E=Sophos;i=\"5.75,324,1589266800\"; d=\"scan'208\";a=\"297415607\""
        ],
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Content-Transfer-Encoding": "8bit",
        "From": "Arek Kusztal <arkadiuszx.kusztal@intel.com>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "List-Post": "<mailto:dev@dpdk.org>",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "In-Reply-To": "<20200707150239.13400-1-arkadiuszx.kusztal@intel.com>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "To": "dev@dpdk.org",
        "IronPort-SDR": [
            "\n Km+jL+E7d00k91gpJ/Jgqi3N3n6/ogDto+B8bXEbRxeoYHVDuDl4LvPrf6Rb4OVIg/HqgOrMOr\n 8lGh/i+PV75w==",
            "\n 9A+Bz9cGCWd6xTZdXkpyojBKBnO07C8kFZFppXRnmGQXkQfvBtP5IH74sNlOQmfIuc+sfj46yO\n lPPNFEWAEK8g=="
        ],
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "X-BeenThere": "dev@dpdk.org",
        "Date": "Tue,  7 Jul 2020 17:02:39 +0200",
        "Cc": "akhil.goyal@nxp.com, fiona.trahe@intel.com,\n Arek Kusztal <arkadiuszx.kusztal@intel.com>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "Subject": "[dpdk-dev] [PATCH v5 3/3] drivers/qat: add handling of capabilities\n\tin multi process"
    },
    "content": "Move qat capabilities data into a memzone where it can be\nshared by primary and secondary processes.\n\nSigned-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>\n---\n drivers/compress/qat/qat_comp_pmd.c | 31 +++++++++++++++++++++-\n drivers/compress/qat/qat_comp_pmd.h |  2 ++\n drivers/crypto/qat/qat_asym_pmd.c   | 27 +++++++++++++++++++\n drivers/crypto/qat/qat_asym_pmd.h   |  2 ++\n drivers/crypto/qat/qat_sym_pmd.c    | 52 +++++++++++++++++++++++++++++++++----\n drivers/crypto/qat/qat_sym_pmd.h    |  2 ++\n 6 files changed, 110 insertions(+), 6 deletions(-)",
    "diff": "diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c\nindex 47c10e2..ecf972a 100644\n--- a/drivers/compress/qat/qat_comp_pmd.c\n+++ b/drivers/compress/qat/qat_comp_pmd.c\n@@ -667,8 +667,11 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\t.socket_id = qat_dev_instance->pci_dev->device.numa_node,\n \t};\n \tchar name[RTE_COMPRESSDEV_NAME_MAX_LEN];\n+\tchar capa_memz_name[RTE_COMPRESSDEV_NAME_MAX_LEN];\n \tstruct rte_compressdev *compressdev;\n \tstruct qat_comp_dev_private *comp_dev;\n+\tconst struct rte_compressdev_capabilities *capabilities;\n+\tuint64_t capa_size;\n \n \tsnprintf(name, RTE_COMPRESSDEV_NAME_MAX_LEN, \"%s_%s\",\n \t\t\tqat_pci_dev->name, \"comp\");\n@@ -699,6 +702,10 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \n+\tsnprintf(capa_memz_name, RTE_COMPRESSDEV_NAME_MAX_LEN,\n+\t\t\t\"QAT_COMP_CAPA_GEN_%d\",\n+\t\t\tqat_pci_dev->qat_dev_gen);\n+\n \tcomp_dev = compressdev->data->dev_private;\n \tcomp_dev->qat_dev = qat_pci_dev;\n \tcomp_dev->compressdev = compressdev;\n@@ -707,15 +714,34 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \tcase QAT_GEN1:\n \tcase QAT_GEN2:\n \tcase QAT_GEN3:\n-\t\tcomp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;\n+\t\tcapabilities = qat_comp_gen_capabilities;\n+\t\tcapa_size = sizeof(qat_comp_gen_capabilities);\n \t\tbreak;\n \tdefault:\n+\t\tcapabilities = qat_comp_gen_capabilities;\n+\t\tcapa_size = sizeof(qat_comp_gen_capabilities);\n \t\tQAT_LOG(DEBUG,\n \t\t\t\"QAT gen %d capabilities unknown, default to GEN1\",\n \t\t\t\t\tqat_pci_dev->qat_dev_gen);\n \t\tbreak;\n \t}\n \n+\tcomp_dev->capa_mz = rte_memzone_reserve(capa_memz_name,\n+\t\tcapa_size,\n+\t\trte_socket_id(), 0);\n+\tif (comp_dev->capa_mz == NULL) {\n+\t\tQAT_LOG(DEBUG,\n+\t\t\t\"Error allocating memzone for capabilities, destroying PMD for %s\",\n+\t\t\tname);\n+\t\tmemset(&qat_dev_instance->comp_rte_dev, 0,\n+\t\t\tsizeof(qat_dev_instance->comp_rte_dev));\n+\t\trte_compressdev_pmd_destroy(compressdev);\n+\t\treturn -EFAULT;\n+\t}\n+\n+\tmemcpy(comp_dev->capa_mz->addr, capabilities, capa_size);\n+\tcomp_dev->qat_dev_capabilities = comp_dev->capa_mz->addr;\n+\n \twhile (1) {\n \t\tif (qat_dev_cmd_param[i].name == NULL)\n \t\t\tbreak;\n@@ -744,6 +770,9 @@ qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev)\n \tif (comp_dev == NULL)\n \t\treturn 0;\n \n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n+\t\trte_memzone_free(qat_pci_dev->comp_dev->capa_mz);\n+\n \t/* clean up any resources used by the device */\n \tqat_comp_dev_close(comp_dev->compressdev);\n \ndiff --git a/drivers/compress/qat/qat_comp_pmd.h b/drivers/compress/qat/qat_comp_pmd.h\nindex 5c7fa9f..ed27120 100644\n--- a/drivers/compress/qat/qat_comp_pmd.h\n+++ b/drivers/compress/qat/qat_comp_pmd.h\n@@ -32,6 +32,8 @@ struct qat_comp_dev_private {\n \t/**< The device's pool for qat_comp_xforms */\n \tstruct rte_mempool *streampool;\n \t/**< The device's pool for qat_comp_streams */\n+\tconst struct rte_memzone *capa_mz;\n+\t/* Shared memzone for storing capabilities */\n \tuint16_t min_enq_burst_threshold;\n };\n \ndiff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c\nindex d584ac7..968ec54 100644\n--- a/drivers/crypto/qat/qat_asym_pmd.c\n+++ b/drivers/crypto/qat/qat_asym_pmd.c\n@@ -248,6 +248,7 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\t\t.private_data_size = sizeof(struct qat_asym_dev_private)\n \t};\n \tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tchar capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];\n \tstruct rte_cryptodev *cryptodev;\n \tstruct qat_asym_dev_private *internals;\n \n@@ -296,11 +297,35 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \n+\tsnprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,\n+\t\t\t\"QAT_ASYM_CAPA_GEN_%d\",\n+\t\t\tqat_pci_dev->qat_dev_gen);\n+\n \tinternals = cryptodev->data->dev_private;\n \tinternals->qat_dev = qat_pci_dev;\n \tinternals->asym_dev_id = cryptodev->data->dev_id;\n \tinternals->qat_dev_capabilities = qat_gen1_asym_capabilities;\n \n+\tinternals->capa_mz = rte_memzone_lookup(capa_memz_name);\n+\tif (internals->capa_mz == NULL) {\n+\t\tinternals->capa_mz = rte_memzone_reserve(capa_memz_name,\n+\t\t\tsizeof(qat_gen1_asym_capabilities),\n+\t\t\trte_socket_id(), 0);\n+\t}\n+\tif (internals->capa_mz == NULL) {\n+\t\tQAT_LOG(DEBUG,\n+\t\t\t\"Error allocating memzone for capabilities, destroying PMD for %s\",\n+\t\t\tname);\n+\t\trte_cryptodev_pmd_destroy(cryptodev);\n+\t\tmemset(&qat_dev_instance->asym_rte_dev, 0,\n+\t\t\tsizeof(qat_dev_instance->asym_rte_dev));\n+\t\treturn -EFAULT;\n+\t}\n+\n+\tmemcpy(internals->capa_mz->addr, qat_gen1_asym_capabilities,\n+\t\t\tsizeof(qat_gen1_asym_capabilities));\n+\tinternals->qat_dev_capabilities = internals->capa_mz->addr;\n+\n \twhile (1) {\n \t\tif (qat_dev_cmd_param[i].name == NULL)\n \t\t\tbreak;\n@@ -325,6 +350,8 @@ qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev)\n \t\treturn -ENODEV;\n \tif (qat_pci_dev->asym_dev == NULL)\n \t\treturn 0;\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n+\t\trte_memzone_free(qat_pci_dev->asym_dev->capa_mz);\n \n \t/* free crypto device */\n \tcryptodev = rte_cryptodev_pmd_get_dev(\ndiff --git a/drivers/crypto/qat/qat_asym_pmd.h b/drivers/crypto/qat/qat_asym_pmd.h\nindex ddf413f..3b5abdd 100644\n--- a/drivers/crypto/qat/qat_asym_pmd.h\n+++ b/drivers/crypto/qat/qat_asym_pmd.h\n@@ -26,6 +26,8 @@ struct qat_asym_dev_private {\n \t/**< Device instance for this rte_cryptodev */\n \tconst struct rte_cryptodev_capabilities *qat_dev_capabilities;\n \t/* QAT device asymmetric crypto capabilities */\n+\tconst struct rte_memzone *capa_mz;\n+\t/* Shared memzone for storing capabilities */\n \tuint16_t min_enq_burst_threshold;\n };\n \ndiff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c\nindex 6ef9a34..2dcda4a 100644\n--- a/drivers/crypto/qat/qat_sym_pmd.c\n+++ b/drivers/crypto/qat/qat_sym_pmd.c\n@@ -32,6 +32,12 @@ static const struct rte_cryptodev_capabilities qat_gen2_sym_capabilities[] = {\n \tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n };\n \n+static const struct rte_cryptodev_capabilities qat_gen3_sym_capabilities[] = {\n+\tQAT_BASE_GEN1_SYM_CAPABILITIES,\n+\tQAT_EXTRA_GEN2_SYM_CAPABILITIES,\n+\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n+};\n+\n #ifdef RTE_LIBRTE_SECURITY\n static const struct rte_cryptodev_capabilities\n \t\t\t\t\tqat_security_sym_capabilities[] = {\n@@ -314,8 +320,11 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\t\t.private_data_size = sizeof(struct qat_sym_dev_private)\n \t};\n \tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tchar capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];\n \tstruct rte_cryptodev *cryptodev;\n \tstruct qat_sym_dev_private *internals;\n+\tconst struct rte_cryptodev_capabilities *capabilities;\n+\tuint64_t capa_size;\n \n \t/*\n \t * All processes must use same driver id so they can share sessions.\n@@ -377,6 +386,10 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \n+\tsnprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,\n+\t\t\t\"QAT_SYM_CAPA_GEN_%d\",\n+\t\t\tqat_pci_dev->qat_dev_gen);\n+\n #ifdef RTE_LIBRTE_SECURITY\n \tsecurity_instance = rte_malloc(\"qat_sec\",\n \t\t\t\tsizeof(struct rte_security_ctx),\n@@ -399,18 +412,45 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \tinternals->sym_dev_id = cryptodev->data->dev_id;\n \tswitch (qat_pci_dev->qat_dev_gen) {\n \tcase QAT_GEN1:\n-\t\tinternals->qat_dev_capabilities = qat_gen1_sym_capabilities;\n+\t\tcapabilities = qat_gen1_sym_capabilities;\n+\t\tcapa_size = sizeof(qat_gen1_sym_capabilities);\n \t\tbreak;\n \tcase QAT_GEN2:\n+\t\tcapabilities = qat_gen2_sym_capabilities;\n+\t\tcapa_size = sizeof(qat_gen2_sym_capabilities);\n+\t\tbreak;\n \tcase QAT_GEN3:\n-\t\tinternals->qat_dev_capabilities = qat_gen2_sym_capabilities;\n+\t\tcapabilities = qat_gen3_sym_capabilities;\n+\t\tcapa_size = sizeof(qat_gen3_sym_capabilities);\n \t\tbreak;\n \tdefault:\n \t\tQAT_LOG(DEBUG,\n-\t\t\t\"QAT gen %d capabilities unknown, default to GEN2\",\n-\t\t\t\t\tqat_pci_dev->qat_dev_gen);\n-\t\tbreak;\n+\t\t\t\"QAT gen %d capabilities unknown\",\n+\t\t\tqat_pci_dev->qat_dev_gen);\n+\t\trte_cryptodev_pmd_destroy(cryptodev);\n+\t\tmemset(&qat_dev_instance->sym_rte_dev, 0,\n+\t\t\tsizeof(qat_dev_instance->sym_rte_dev));\n+\t\treturn -(EINVAL);\n+\t}\n+\n+\tinternals->capa_mz = rte_memzone_lookup(capa_memz_name);\n+\tif (internals->capa_mz == NULL) {\n+\tinternals->capa_mz = rte_memzone_reserve(capa_memz_name,\n+\t\tcapa_size,\n+\t\trte_socket_id(), 0);\n \t}\n+\tif (internals->capa_mz == NULL) {\n+\tQAT_LOG(DEBUG,\n+\t\t\"Error allocating memzone for capabilities, destroying PMD for %s\",\n+\t\tname);\n+\trte_cryptodev_pmd_destroy(cryptodev);\n+\tmemset(&qat_dev_instance->sym_rte_dev, 0,\n+\t\tsizeof(qat_dev_instance->sym_rte_dev));\n+\treturn -EFAULT;\n+\t}\n+\n+\tmemcpy(internals->capa_mz->addr, capabilities, capa_size);\n+\tinternals->qat_dev_capabilities = internals->capa_mz->addr;\n \n \twhile (1) {\n \t\tif (qat_dev_cmd_param[i].name == NULL)\n@@ -437,6 +477,8 @@ qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)\n \t\treturn -ENODEV;\n \tif (qat_pci_dev->sym_dev == NULL)\n \t\treturn 0;\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n+\t\trte_memzone_free(qat_pci_dev->sym_dev->capa_mz);\n \n \t/* free crypto device */\n \tcryptodev = rte_cryptodev_pmd_get_dev(qat_pci_dev->sym_dev->sym_dev_id);\ndiff --git a/drivers/crypto/qat/qat_sym_pmd.h b/drivers/crypto/qat/qat_sym_pmd.h\nindex cf4e1a0..f32a77e 100644\n--- a/drivers/crypto/qat/qat_sym_pmd.h\n+++ b/drivers/crypto/qat/qat_sym_pmd.h\n@@ -36,6 +36,8 @@ struct qat_sym_dev_private {\n \t/**< Device instance for this rte_cryptodev */\n \tconst struct rte_cryptodev_capabilities *qat_dev_capabilities;\n \t/* QAT device symmetric crypto capabilities */\n+\tconst struct rte_memzone *capa_mz;\n+\t/* Shared memzone for storing capabilities */\n \tuint16_t min_enq_burst_threshold;\n \tuint32_t internal_capabilities; /* see flags QAT_SYM_CAP_xxx */\n };\n",
    "prefixes": [
        "v5",
        "3/3"
    ]
}