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GET /api/patches/73443/?format=api
{ "id": 73443, "url": "https://patches.dpdk.org/api/patches/73443/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200707150239.13400-2-arkadiuszx.kusztal@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200707150239.13400-2-arkadiuszx.kusztal@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200707150239.13400-2-arkadiuszx.kusztal@intel.com", "date": "2020-07-07T15:02:37", "name": "[v5,1/3] drivers/qat: improve handling of multi process", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "00d739b0eaa18028e410c5a0c81780c1faa4ebfc", "submitter": { "id": 452, "url": "https://patches.dpdk.org/api/people/452/?format=api", "name": "Arkadiusz Kusztal", "email": "arkadiuszx.kusztal@intel.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200707150239.13400-2-arkadiuszx.kusztal@intel.com/mbox/", "series": [ { "id": 10855, "url": "https://patches.dpdk.org/api/series/10855/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10855", "date": "2020-07-07T15:02:36", "name": "drivers/qat: improve handling of multi process", "version": 5, "mbox": "https://patches.dpdk.org/series/10855/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/73443/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/73443/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D4B85A00BE;\n\tTue, 7 Jul 2020 17:03:23 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9B62B1DE85;\n\tTue, 7 Jul 2020 17:03:19 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by dpdk.org (Postfix) with ESMTP id 523491DE8C\n for <dev@dpdk.org>; Tue, 7 Jul 2020 17:03:17 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Jul 2020 08:03:16 -0700", "from akusztax-mobl.ger.corp.intel.com ([10.104.121.84])\n by orsmga002.jf.intel.com with ESMTP; 07 Jul 2020 08:03:13 -0700" ], "IronPort-SDR": [ "\n IRjtsdh0fQz/p2asDU7hH2B9qPZvz8Dua9m09ggVThX6fylAtMCul88y5lS/2qdYVCM/87gpC7\n bPIUZvlzApsA==", "\n gyLB9lgJw59nUZY7hxTsNyCPRYeOY1D+yGAu+/2iGA2fh/Eqaj07CekJGT1C/DYgMXzT5jB98Y\n jkDmw5gxJLcg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9675\"; a=\"127204221\"", "E=Sophos;i=\"5.75,324,1589266800\"; d=\"scan'208\";a=\"127204221\"", "E=Sophos;i=\"5.75,324,1589266800\"; d=\"scan'208\";a=\"297415554\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Arek Kusztal <arkadiuszx.kusztal@intel.com>", "To": "dev@dpdk.org", "Cc": "akhil.goyal@nxp.com, fiona.trahe@intel.com,\n Arek Kusztal <arkadiuszx.kusztal@intel.com>", "Date": "Tue, 7 Jul 2020 17:02:37 +0200", "Message-Id": "<20200707150239.13400-2-arkadiuszx.kusztal@intel.com>", "X-Mailer": "git-send-email 2.19.1.windows.1", "In-Reply-To": "<20200707150239.13400-1-arkadiuszx.kusztal@intel.com>", "References": "<20200707150239.13400-1-arkadiuszx.kusztal@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v5 1/3] drivers/qat: improve handling of multi\n\tprocess", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch refactors qat data into structures which are local to the process and\nstructures which are intended to be shared by primary and secondary processes.\nThis enables qat devices to be used by multi process applications.\n\nSigned-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>\n---\n doc/guides/rel_notes/release_20_08.rst | 5 ++\n drivers/common/qat/qat_device.c | 111 +++++++++++++++++++++++----------\n drivers/common/qat/qat_device.h | 65 ++++++++++---------\n drivers/common/qat/qat_qp.c | 26 ++++++--\n drivers/compress/qat/qat_comp_pmd.c | 20 +++---\n drivers/crypto/qat/qat_asym_pmd.c | 26 +++++---\n drivers/crypto/qat/qat_sym_pmd.c | 28 ++++++---\n 7 files changed, 183 insertions(+), 98 deletions(-)", "diff": "diff --git a/doc/guides/rel_notes/release_20_08.rst b/doc/guides/rel_notes/release_20_08.rst\nindex 159da34..3ca2eb2 100644\n--- a/doc/guides/rel_notes/release_20_08.rst\n+++ b/doc/guides/rel_notes/release_20_08.rst\n@@ -107,6 +107,11 @@ New Features\n Added support for lookaside protocol offload for DOCSIS through the\n ``rte_security`` API.\n \n+* **Updated the Intel QuickAssist Technology (QAT) crypto and compression PMDs.**\n+\n+ Implemented improvements in handling multi process applications\n+ using QAT symmetric/asymmetric crypto and compression services.\n+\n * **Updated the OCTEON TX2 crypto PMD.**\n \n Added Chacha20-Poly1305 AEAD algorithm support in OCTEON TX2 crypto PMD.\ndiff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c\nindex 2b41d9a..a6ab29f 100644\n--- a/drivers/common/qat/qat_device.c\n+++ b/drivers/common/qat/qat_device.c\n@@ -32,8 +32,8 @@ struct qat_gen_hw_data qat_gen_config[] = {\n \t},\n };\n \n-\n-static struct qat_pci_device qat_pci_devices[RTE_PMD_QAT_MAX_PCI_DEVICES];\n+/* per-process array of device data */\n+struct qat_device_info qat_pci_devs[RTE_PMD_QAT_MAX_PCI_DEVICES];\n static int qat_nb_pci_devices;\n \n /*\n@@ -60,26 +60,20 @@ static const struct rte_pci_id pci_id_qat_map[] = {\n };\n \n static struct qat_pci_device *\n-qat_pci_get_dev(uint8_t dev_id)\n-{\n-\treturn &qat_pci_devices[dev_id];\n-}\n-\n-static struct qat_pci_device *\n qat_pci_get_named_dev(const char *name)\n {\n-\tstruct qat_pci_device *dev;\n \tunsigned int i;\n \n \tif (name == NULL)\n \t\treturn NULL;\n \n \tfor (i = 0; i < RTE_PMD_QAT_MAX_PCI_DEVICES; i++) {\n-\t\tdev = &qat_pci_devices[i];\n-\n-\t\tif ((dev->attached == QAT_ATTACHED) &&\n-\t\t\t\t(strcmp(dev->name, name) == 0))\n-\t\t\treturn dev;\n+\t\tif (qat_pci_devs[i].mz &&\n+\t\t\t\t(strcmp(((struct qat_pci_device *)\n+\t\t\t\tqat_pci_devs[i].mz->addr)->name, name)\n+\t\t\t\t== 0))\n+\t\t\treturn (struct qat_pci_device *)\n+\t\t\t\tqat_pci_devs[i].mz->addr;\n \t}\n \n \treturn NULL;\n@@ -88,13 +82,14 @@ qat_pci_get_named_dev(const char *name)\n static uint8_t\n qat_pci_find_free_device_index(void)\n {\n-\tuint8_t dev_id;\n+\t\tuint8_t dev_id;\n \n-\tfor (dev_id = 0; dev_id < RTE_PMD_QAT_MAX_PCI_DEVICES; dev_id++) {\n-\t\tif (qat_pci_devices[dev_id].attached == QAT_DETACHED)\n-\t\t\tbreak;\n-\t}\n-\treturn dev_id;\n+\t\tfor (dev_id = 0; dev_id < RTE_PMD_QAT_MAX_PCI_DEVICES;\n+\t\t\t\tdev_id++) {\n+\t\t\tif (qat_pci_devs[dev_id].mz == NULL)\n+\t\t\t\tbreak;\n+\t\t}\n+\t\treturn dev_id;\n }\n \n struct qat_pci_device *\n@@ -169,12 +164,31 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev,\n \t\tstruct qat_dev_cmd_param *qat_dev_cmd_param)\n {\n \tstruct qat_pci_device *qat_dev;\n-\tuint8_t qat_dev_id;\n+\tuint8_t qat_dev_id = 0;\n \tchar name[QAT_DEV_NAME_MAX_LEN];\n \tstruct rte_devargs *devargs = pci_dev->device.devargs;\n \n \trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n \tsnprintf(name+strlen(name), QAT_DEV_NAME_MAX_LEN-strlen(name), \"_qat\");\n+\n+\tif (rte_eal_process_type() == RTE_PROC_SECONDARY) {\n+\t\tconst struct rte_memzone *mz = rte_memzone_lookup(name);\n+\n+\t\tif (mz == NULL) {\n+\t\t\tQAT_LOG(ERR,\n+\t\t\t\t\"Secondary can't find %s mz, did primary create device?\",\n+\t\t\t\tname);\n+\t\t\treturn NULL;\n+\t\t}\n+\t\tqat_dev = mz->addr;\n+\t\tqat_pci_devs[qat_dev->qat_dev_id].mz = mz;\n+\t\tqat_pci_devs[qat_dev->qat_dev_id].pci_dev = pci_dev;\n+\t\tqat_nb_pci_devices++;\n+\t\tQAT_LOG(DEBUG, \"QAT device %d found, name %s, total QATs %d\",\n+\t\t\tqat_dev->qat_dev_id, qat_dev->name, qat_nb_pci_devices);\n+\t\treturn qat_dev;\n+\t}\n+\n \tif (qat_pci_get_named_dev(name) != NULL) {\n \t\tQAT_LOG(ERR, \"QAT device with name %s already allocated!\",\n \t\t\t\tname);\n@@ -187,12 +201,22 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev,\n \t\treturn NULL;\n \t}\n \n-\tqat_dev = qat_pci_get_dev(qat_dev_id);\n+\tqat_pci_devs[qat_dev_id].mz = rte_memzone_reserve(name,\n+\t\tsizeof(struct qat_pci_device),\n+\t\trte_socket_id(), 0);\n+\n+\tif (qat_pci_devs[qat_dev_id].mz == NULL) {\n+\t\tQAT_LOG(ERR, \"Error when allocating memzone for QAT_%d\",\n+\t\t\tqat_dev_id);\n+\t\treturn NULL;\n+\t}\n+\n+\tqat_dev = qat_pci_devs[qat_dev_id].mz->addr;\n \tmemset(qat_dev, 0, sizeof(*qat_dev));\n \tstrlcpy(qat_dev->name, name, QAT_DEV_NAME_MAX_LEN);\n \tqat_dev->qat_dev_id = qat_dev_id;\n-\tqat_dev->pci_dev = pci_dev;\n-\tswitch (qat_dev->pci_dev->id.device_id) {\n+\tqat_pci_devs[qat_dev_id].pci_dev = pci_dev;\n+\tswitch (pci_dev->id.device_id) {\n \tcase 0x0443:\n \t\tqat_dev->qat_dev_gen = QAT_GEN1;\n \t\tbreak;\n@@ -206,6 +230,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev,\n \t\tbreak;\n \tdefault:\n \t\tQAT_LOG(ERR, \"Invalid dev_id, can't determine generation\");\n+\t\trte_memzone_free(qat_pci_devs[qat_dev->qat_dev_id].mz);\n \t\treturn NULL;\n \t}\n \n@@ -213,22 +238,20 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev,\n \t\tqat_dev_parse_cmd(devargs->drv_str, qat_dev_cmd_param);\n \n \trte_spinlock_init(&qat_dev->arb_csr_lock);\n-\n-\tqat_dev->attached = QAT_ATTACHED;\n-\n \tqat_nb_pci_devices++;\n \n-\tQAT_LOG(DEBUG, \"QAT device %d allocated, name %s, total QATs %d\",\n+\tQAT_LOG(DEBUG, \"QAT device %d found, name %s, total QATs %d\",\n \t\t\tqat_dev->qat_dev_id, qat_dev->name, qat_nb_pci_devices);\n \n \treturn qat_dev;\n }\n \n-int\n+static int\n qat_pci_device_release(struct rte_pci_device *pci_dev)\n {\n \tstruct qat_pci_device *qat_dev;\n \tchar name[QAT_DEV_NAME_MAX_LEN];\n+\tint busy = 0;\n \n \tif (pci_dev == NULL)\n \t\treturn -EINVAL;\n@@ -238,15 +261,35 @@ qat_pci_device_release(struct rte_pci_device *pci_dev)\n \tqat_dev = qat_pci_get_named_dev(name);\n \tif (qat_dev != NULL) {\n \n+\t\tstruct qat_device_info *inst =\n+\t\t\t\t&qat_pci_devs[qat_dev->qat_dev_id];\n \t\t/* Check that there are no service devs still on pci device */\n-\t\tif (qat_dev->sym_dev != NULL)\n-\t\t\treturn -EBUSY;\n \n-\t\tqat_dev->attached = QAT_DETACHED;\n+\t\tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n+\t\t\tif (qat_dev->sym_dev != NULL) {\n+\t\t\t\tQAT_LOG(DEBUG, \"QAT sym device %s is busy\",\n+\t\t\t\t\tname);\n+\t\t\t\tbusy = 1;\n+\t\t\t}\n+\t\t\tif (qat_dev->asym_dev != NULL) {\n+\t\t\t\tQAT_LOG(DEBUG, \"QAT asym device %s is busy\",\n+\t\t\t\t\tname);\n+\t\t\t\tbusy = 1;\n+\t\t\t}\n+\t\t\tif (qat_dev->comp_dev != NULL) {\n+\t\t\t\tQAT_LOG(DEBUG, \"QAT comp device %s is busy\",\n+\t\t\t\t\tname);\n+\t\t\t\tbusy = 1;\n+\t\t\t}\n+\t\t\tif (busy)\n+\t\t\t\treturn -EBUSY;\n+\t\t\trte_memzone_free(inst->mz);\n+\t\t}\n+\t\tmemset(inst, 0, sizeof(struct qat_device_info));\n \t\tqat_nb_pci_devices--;\n+\t\tQAT_LOG(DEBUG, \"QAT device %s released, total QATs %d\",\n+\t\t\t\t\tname, qat_nb_pci_devices);\n \t}\n-\tQAT_LOG(DEBUG, \"QAT device %s released, total QATs %d\",\n-\t\t\t\tname, qat_nb_pci_devices);\n \treturn 0;\n }\n \ndiff --git a/drivers/common/qat/qat_device.h b/drivers/common/qat/qat_device.h\nindex 09a4c55..b5fe394 100644\n--- a/drivers/common/qat/qat_device.h\n+++ b/drivers/common/qat/qat_device.h\n@@ -32,6 +32,37 @@ enum qat_comp_num_im_buffers {\n \tQAT_NUM_INTERM_BUFS_GEN3 = 20\n };\n \n+struct qat_device_info {\n+\tconst struct rte_memzone *mz;\n+\t/**< mz to store the qat_pci_device so it can be\n+\t * shared across processes\n+\t */\n+\tstruct rte_pci_device *pci_dev;\n+\tstruct rte_device sym_rte_dev;\n+\t/**< This represents the crypto sym subset of this pci device.\n+\t * Register with this rather than with the one in\n+\t * pci_dev so that its driver can have a crypto-specific name\n+\t */\n+\n+\tstruct rte_device asym_rte_dev;\n+\t/**< This represents the crypto asym subset of this pci device.\n+\t * Register with this rather than with the one in\n+\t * pci_dev so that its driver can have a crypto-specific name\n+\t */\n+\n+\tstruct rte_device comp_rte_dev;\n+\t/**< This represents the compression subset of this pci device.\n+\t * Register with this rather than with the one in\n+\t * pci_dev so that its driver can have a compression-specific name\n+\t */\n+};\n+\n+extern struct qat_device_info qat_pci_devs[];\n+\n+struct qat_sym_dev_private;\n+struct qat_asym_dev_private;\n+struct qat_comp_dev_private;\n+\n /*\n * This struct holds all the data about a QAT pci device\n * including data about all services it supports.\n@@ -39,27 +70,20 @@ enum qat_comp_num_im_buffers {\n * - hw_data\n * - config data\n * - runtime data\n+ * Note: as this data can be shared in a multi-process scenario,\n+ * any pointers in it must also point to shared memory.\n */\n-struct qat_sym_dev_private;\n-struct qat_asym_dev_private;\n-struct qat_comp_dev_private;\n-\n struct qat_pci_device {\n \n \t/* Data used by all services */\n \tchar name[QAT_DEV_NAME_MAX_LEN];\n \t/**< Name of qat pci device */\n \tuint8_t qat_dev_id;\n-\t/**< Device instance for this qat pci device */\n-\tstruct rte_pci_device *pci_dev;\n-\t/**< PCI information. */\n+\t/**< Id of device instance for this qat pci device */\n \tenum qat_device_gen qat_dev_gen;\n \t/**< QAT device generation */\n \trte_spinlock_t arb_csr_lock;\n \t/**< lock to protect accesses to the arbiter CSR */\n-\t__extension__\n-\tuint8_t attached : 1;\n-\t/**< Flag indicating the device is attached */\n \n \tstruct qat_qp *qps_in_use[QAT_MAX_SERVICES][ADF_MAX_QPS_ON_ANY_SERVICE];\n \t/**< links to qps set up for each service, index same as on API */\n@@ -67,32 +91,14 @@ struct qat_pci_device {\n \t/* Data relating to symmetric crypto service */\n \tstruct qat_sym_dev_private *sym_dev;\n \t/**< link back to cryptodev private data */\n-\tstruct rte_device sym_rte_dev;\n-\t/**< This represents the crypto sym subset of this pci device.\n-\t * Register with this rather than with the one in\n-\t * pci_dev so that its driver can have a crypto-specific name\n-\t */\n \n \t/* Data relating to asymmetric crypto service */\n \tstruct qat_asym_dev_private *asym_dev;\n \t/**< link back to cryptodev private data */\n-\tstruct rte_device asym_rte_dev;\n-\t/**< This represents the crypto asym subset of this pci device.\n-\t * Register with this rather than with the one in\n-\t * pci_dev so that its driver can have a crypto-specific name\n-\t */\n \n \t/* Data relating to compression service */\n \tstruct qat_comp_dev_private *comp_dev;\n \t/**< link back to compressdev private data */\n-\tstruct rte_device comp_rte_dev;\n-\t/**< This represents the compression subset of this pci device.\n-\t * Register with this rather than with the one in\n-\t * pci_dev so that its driver can have a compression-specific name\n-\t */\n-\n-\t/* Data relating to asymmetric crypto service */\n-\n };\n \n struct qat_gen_hw_data {\n@@ -107,9 +113,6 @@ struct qat_pci_device *\n qat_pci_device_allocate(struct rte_pci_device *pci_dev,\n \t\tstruct qat_dev_cmd_param *qat_dev_cmd_param);\n \n-int\n-qat_pci_device_release(struct rte_pci_device *pci_dev);\n-\n struct qat_pci_device *\n qat_get_qat_dev_from_pci_dev(struct rte_pci_device *pci_dev);\n \ndiff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c\nindex 8e6dd04..aacd4ab 100644\n--- a/drivers/common/qat/qat_qp.c\n+++ b/drivers/common/qat/qat_qp.c\n@@ -193,7 +193,8 @@ int qat_qp_setup(struct qat_pci_device *qat_dev,\n \n {\n \tstruct qat_qp *qp;\n-\tstruct rte_pci_device *pci_dev = qat_dev->pci_dev;\n+\tstruct rte_pci_device *pci_dev =\n+\t\t\tqat_pci_devs[qat_dev->qat_dev_id].pci_dev;\n \tchar op_cookie_pool_name[RTE_RING_NAMESIZE];\n \tuint32_t i;\n \n@@ -274,7 +275,7 @@ int qat_qp_setup(struct qat_pci_device *qat_dev,\n \t\t\t\tqp->nb_descriptors,\n \t\t\t\tqat_qp_conf->cookie_size, 64, 0,\n \t\t\t\tNULL, NULL, NULL, NULL,\n-\t\t\t\tqat_dev->pci_dev->device.numa_node,\n+\t\t\t\tpci_dev->device.numa_node,\n \t\t\t\t0);\n \tif (!qp->op_cookie_pool) {\n \t\tQAT_LOG(ERR, \"QAT PMD Cannot create\"\n@@ -379,7 +380,8 @@ qat_queue_create(struct qat_pci_device *qat_dev, struct qat_queue *queue,\n \tuint64_t queue_base;\n \tvoid *io_addr;\n \tconst struct rte_memzone *qp_mz;\n-\tstruct rte_pci_device *pci_dev = qat_dev->pci_dev;\n+\tstruct rte_pci_device *pci_dev =\n+\t\t\tqat_pci_devs[qat_dev->qat_dev_id].pci_dev;\n \tint ret = 0;\n \tuint16_t desc_size = (dir == ADF_RING_DIR_TX ?\n \t\t\tqp_conf->hw->tx_msg_size : qp_conf->hw->rx_msg_size);\n@@ -403,7 +405,7 @@ qat_queue_create(struct qat_pci_device *qat_dev, struct qat_queue *queue,\n \t\tqp_conf->service_str, \"qp_mem\",\n \t\tqueue->hw_bundle_number, queue->hw_queue_number);\n \tqp_mz = queue_dma_zone_reserve(queue->memz_name, queue_size_bytes,\n-\t\t\tqat_dev->pci_dev->device.numa_node);\n+\t\t\tpci_dev->device.numa_node);\n \tif (qp_mz == NULL) {\n \t\tQAT_LOG(ERR, \"Failed to allocate ring memzone\");\n \t\treturn -ENOMEM;\n@@ -627,9 +629,23 @@ qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops)\n \n \n \twhile (nb_ops_sent != nb_ops_possible) {\n-\t\tret = tmp_qp->build_request(*ops, base_addr + tail,\n+\t\tif (tmp_qp->service_type == QAT_SERVICE_SYMMETRIC) {\n+#ifdef BUILD_QAT_SYM\n+\t\t\tret = qat_sym_build_request(*ops, base_addr + tail,\n \t\t\t\ttmp_qp->op_cookies[tail >> queue->trailz],\n \t\t\t\ttmp_qp->qat_dev_gen);\n+#endif\n+\t\t} else if (tmp_qp->service_type == QAT_SERVICE_COMPRESSION) {\n+\t\t\tret = qat_comp_build_request(*ops, base_addr + tail,\n+\t\t\t\ttmp_qp->op_cookies[tail >> queue->trailz],\n+\t\t\t\ttmp_qp->qat_dev_gen);\n+\t\t} else if (tmp_qp->service_type == QAT_SERVICE_ASYMMETRIC) {\n+#ifdef BUILD_QAT_ASYM\n+\t\t\tret = qat_asym_build_request(*ops, base_addr + tail,\n+\t\t\t\ttmp_qp->op_cookies[tail >> queue->trailz],\n+\t\t\t\ttmp_qp->qat_dev_gen);\n+#endif\n+\t\t}\n \t\tif (ret != 0) {\n \t\t\ttmp_qp->stats.enqueue_err_count++;\n \t\t\t/* This message cannot be enqueued */\ndiff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c\nindex fe62de5..47c10e2 100644\n--- a/drivers/compress/qat/qat_comp_pmd.c\n+++ b/drivers/compress/qat/qat_comp_pmd.c\n@@ -655,6 +655,8 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\tstruct qat_dev_cmd_param *qat_dev_cmd_param)\n {\n \tint i = 0;\n+\tstruct qat_device_info *qat_dev_instance =\n+\t\t\t&qat_pci_devs[qat_pci_dev->qat_dev_id];\n \tif (qat_pci_dev->qat_dev_gen == QAT_GEN3) {\n \t\tQAT_LOG(ERR, \"Compression PMD not supported on QAT P5xxx\");\n \t\treturn 0;\n@@ -662,7 +664,7 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \n \tstruct rte_compressdev_pmd_init_params init_params = {\n \t\t.name = \"\",\n-\t\t.socket_id = qat_pci_dev->pci_dev->device.numa_node,\n+\t\t.socket_id = qat_dev_instance->pci_dev->device.numa_node,\n \t};\n \tchar name[RTE_COMPRESSDEV_NAME_MAX_LEN];\n \tstruct rte_compressdev *compressdev;\n@@ -673,13 +675,13 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \tQAT_LOG(DEBUG, \"Creating QAT COMP device %s\", name);\n \n \t/* Populate subset device to use in compressdev device creation */\n-\tqat_pci_dev->comp_rte_dev.driver = &compdev_qat_driver;\n-\tqat_pci_dev->comp_rte_dev.numa_node =\n-\t\t\t\t\tqat_pci_dev->pci_dev->device.numa_node;\n-\tqat_pci_dev->comp_rte_dev.devargs = NULL;\n+\tqat_dev_instance->comp_rte_dev.driver = &compdev_qat_driver;\n+\tqat_dev_instance->comp_rte_dev.numa_node =\n+\t\t\tqat_dev_instance->pci_dev->device.numa_node;\n+\tqat_dev_instance->comp_rte_dev.devargs = NULL;\n \n \tcompressdev = rte_compressdev_pmd_create(name,\n-\t\t\t&(qat_pci_dev->comp_rte_dev),\n+\t\t\t&(qat_dev_instance->comp_rte_dev),\n \t\t\tsizeof(struct qat_comp_dev_private),\n \t\t\t&init_params);\n \n@@ -694,10 +696,12 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \n \tcompressdev->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n \tcomp_dev = compressdev->data->dev_private;\n \tcomp_dev->qat_dev = qat_pci_dev;\n \tcomp_dev->compressdev = compressdev;\n-\tqat_pci_dev->comp_dev = comp_dev;\n \n \tswitch (qat_pci_dev->qat_dev_gen) {\n \tcase QAT_GEN1:\n@@ -706,7 +710,6 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\tcomp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;\n \t\tbreak;\n \tdefault:\n-\t\tcomp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;\n \t\tQAT_LOG(DEBUG,\n \t\t\t\"QAT gen %d capabilities unknown, default to GEN1\",\n \t\t\t\t\tqat_pci_dev->qat_dev_gen);\n@@ -721,6 +724,7 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\t\t\t\tqat_dev_cmd_param[i].val;\n \t\ti++;\n \t}\n+\tqat_pci_dev->comp_dev = comp_dev;\n \n \tQAT_LOG(DEBUG,\n \t\t \"Created QAT COMP device %s as compressdev instance %d\",\ndiff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c\nindex af3cc25..cc448cd 100644\n--- a/drivers/crypto/qat/qat_asym_pmd.c\n+++ b/drivers/crypto/qat/qat_asym_pmd.c\n@@ -239,9 +239,12 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\tstruct qat_dev_cmd_param *qat_dev_cmd_param)\n {\n \tint i = 0;\n+\tstruct qat_device_info *qat_dev_instance =\n+\t\t\t&qat_pci_devs[qat_pci_dev->qat_dev_id];\n \tstruct rte_cryptodev_pmd_init_params init_params = {\n \t\t\t.name = \"\",\n-\t\t\t.socket_id = qat_pci_dev->pci_dev->device.numa_node,\n+\t\t\t.socket_id =\n+\t\t\t\tqat_dev_instance->pci_dev->device.numa_node,\n \t\t\t.private_data_size = sizeof(struct qat_asym_dev_private)\n \t};\n \tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n@@ -253,18 +256,18 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,\n \tQAT_LOG(DEBUG, \"Creating QAT ASYM device %s\\n\", name);\n \n \t/* Populate subset device to use in cryptodev device creation */\n-\tqat_pci_dev->asym_rte_dev.driver = &cryptodev_qat_asym_driver;\n-\tqat_pci_dev->asym_rte_dev.numa_node =\n-\t\t\t\tqat_pci_dev->pci_dev->device.numa_node;\n-\tqat_pci_dev->asym_rte_dev.devargs = NULL;\n+\tqat_dev_instance->asym_rte_dev.driver = &cryptodev_qat_asym_driver;\n+\tqat_dev_instance->asym_rte_dev.numa_node =\n+\t\t\tqat_dev_instance->pci_dev->device.numa_node;\n+\tqat_dev_instance->asym_rte_dev.devargs = NULL;\n \n \tcryptodev = rte_cryptodev_pmd_create(name,\n-\t\t\t&(qat_pci_dev->asym_rte_dev), &init_params);\n+\t\t\t&(qat_dev_instance->asym_rte_dev), &init_params);\n \n \tif (cryptodev == NULL)\n \t\treturn -ENODEV;\n \n-\tqat_pci_dev->asym_rte_dev.name = cryptodev->data->name;\n+\tqat_dev_instance->asym_rte_dev.name = cryptodev->data->name;\n \tcryptodev->driver_id = cryptodev_qat_asym_driver_id;\n \tcryptodev->dev_ops = &crypto_qat_ops;\n \n@@ -276,10 +279,12 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\t\tRTE_CRYPTODEV_FF_ASYM_SESSIONLESS |\n \t\t\tRTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP |\n \t\t\tRTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;\n+\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n \tinternals = cryptodev->data->dev_private;\n \tinternals->qat_dev = qat_pci_dev;\n-\tqat_pci_dev->asym_dev = internals;\n-\n \tinternals->asym_dev_id = cryptodev->data->dev_id;\n \tinternals->qat_dev_capabilities = qat_gen1_asym_capabilities;\n \n@@ -292,6 +297,7 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\ti++;\n \t}\n \n+\tqat_pci_dev->asym_dev = internals;\n \tQAT_LOG(DEBUG, \"Created QAT ASYM device %s as cryptodev instance %d\",\n \t\t\tcryptodev->data->name, internals->asym_dev_id);\n \treturn 0;\n@@ -311,7 +317,7 @@ qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev)\n \tcryptodev = rte_cryptodev_pmd_get_dev(\n \t\t\tqat_pci_dev->asym_dev->asym_dev_id);\n \trte_cryptodev_pmd_destroy(cryptodev);\n-\tqat_pci_dev->asym_rte_dev.name = NULL;\n+\tqat_pci_devs[qat_pci_dev->qat_dev_id].asym_rte_dev.name = NULL;\n \tqat_pci_dev->asym_dev = NULL;\n \n \treturn 0;\ndiff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c\nindex 1561752..bdcb42e 100644\n--- a/drivers/crypto/qat/qat_sym_pmd.c\n+++ b/drivers/crypto/qat/qat_sym_pmd.c\n@@ -304,14 +304,19 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\tstruct qat_dev_cmd_param *qat_dev_cmd_param __rte_unused)\n {\n \tint i = 0;\n+\tstruct qat_device_info *qat_dev_instance =\n+\t\t\t&qat_pci_devs[qat_pci_dev->qat_dev_id];\n+\n \tstruct rte_cryptodev_pmd_init_params init_params = {\n \t\t\t.name = \"\",\n-\t\t\t.socket_id = qat_pci_dev->pci_dev->device.numa_node,\n+\t\t\t.socket_id =\n+\t\t\t\tqat_dev_instance->pci_dev->device.numa_node,\n \t\t\t.private_data_size = sizeof(struct qat_sym_dev_private)\n \t};\n \tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n \tstruct rte_cryptodev *cryptodev;\n \tstruct qat_sym_dev_private *internals;\n+\n #ifdef RTE_LIBRTE_SECURITY\n \tstruct rte_security_ctx *security_instance;\n #endif\n@@ -321,18 +326,18 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \tQAT_LOG(DEBUG, \"Creating QAT SYM device %s\", name);\n \n \t/* Populate subset device to use in cryptodev device creation */\n-\tqat_pci_dev->sym_rte_dev.driver = &cryptodev_qat_sym_driver;\n-\tqat_pci_dev->sym_rte_dev.numa_node =\n-\t\t\t\tqat_pci_dev->pci_dev->device.numa_node;\n-\tqat_pci_dev->sym_rte_dev.devargs = NULL;\n+\tqat_dev_instance->sym_rte_dev.driver = &cryptodev_qat_sym_driver;\n+\tqat_dev_instance->sym_rte_dev.numa_node =\n+\t\t\tqat_dev_instance->pci_dev->device.numa_node;\n+\tqat_dev_instance->sym_rte_dev.devargs = NULL;\n \n \tcryptodev = rte_cryptodev_pmd_create(name,\n-\t\t\t&(qat_pci_dev->sym_rte_dev), &init_params);\n+\t\t\t&(qat_dev_instance->sym_rte_dev), &init_params);\n \n \tif (cryptodev == NULL)\n \t\treturn -ENODEV;\n \n-\tqat_pci_dev->sym_rte_dev.name = cryptodev->data->name;\n+\tqat_dev_instance->sym_rte_dev.name = cryptodev->data->name;\n \tcryptodev->driver_id = cryptodev_qat_driver_id;\n \tcryptodev->dev_ops = &crypto_qat_ops;\n \n@@ -350,6 +355,9 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\t\tRTE_CRYPTODEV_FF_DIGEST_ENCRYPTED |\n \t\t\tRTE_CRYPTODEV_FF_SECURITY;\n \n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n #ifdef RTE_LIBRTE_SECURITY\n \tsecurity_instance = rte_malloc(\"qat_sec\",\n \t\t\t\tsizeof(struct rte_security_ctx),\n@@ -368,7 +376,6 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \n \tinternals = cryptodev->data->dev_private;\n \tinternals->qat_dev = qat_pci_dev;\n-\tqat_pci_dev->sym_dev = internals;\n \n \tinternals->sym_dev_id = cryptodev->data->dev_id;\n \tswitch (qat_pci_dev->qat_dev_gen) {\n@@ -380,7 +387,6 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\tinternals->qat_dev_capabilities = qat_gen2_sym_capabilities;\n \t\tbreak;\n \tdefault:\n-\t\tinternals->qat_dev_capabilities = qat_gen2_sym_capabilities;\n \t\tQAT_LOG(DEBUG,\n \t\t\t\"QAT gen %d capabilities unknown, default to GEN2\",\n \t\t\t\t\tqat_pci_dev->qat_dev_gen);\n@@ -396,8 +402,10 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\ti++;\n \t}\n \n+\tqat_pci_dev->sym_dev = internals;\n \tQAT_LOG(DEBUG, \"Created QAT SYM device %s as cryptodev instance %d\",\n \t\t\tcryptodev->data->name, internals->sym_dev_id);\n+\n \treturn 0;\n }\n \n@@ -417,7 +425,7 @@ qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)\n \trte_free(cryptodev->security_ctx);\n #endif\n \trte_cryptodev_pmd_destroy(cryptodev);\n-\tqat_pci_dev->sym_rte_dev.name = NULL;\n+\tqat_pci_devs[qat_pci_dev->qat_dev_id].sym_rte_dev.name = NULL;\n \tqat_pci_dev->sym_dev = NULL;\n \n \treturn 0;\n", "prefixes": [ "v5", "1/3" ] }