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{
    "id": 73434,
    "url": "https://patches.dpdk.org/api/patches/73434/?format=api",
    "web_url": "https://patches.dpdk.org/patch/73434/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<20200707144041.35498-2-ruifeng.wang@arm.com>",
    "date": "2020-07-07T14:40:38",
    "name": "[v6,1/3] lib/lpm: integrate RCU QSBR",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "4c1f4909f665aa5cf27bc554a1d8a4953ee1ed79",
    "submitter": {
        "id": 1198,
        "url": "https://patches.dpdk.org/api/people/1198/?format=api",
        "name": "Ruifeng Wang",
        "email": "ruifeng.wang@arm.com"
    },
    "delegate": {
        "id": 24651,
        "url": "https://patches.dpdk.org/api/users/24651/?format=api",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "https://patches.dpdk.org/patch/73434/mbox/",
    "series": [
        {
            "id": 10852,
            "url": "https://patches.dpdk.org/api/series/10852/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10852",
            "date": "2020-07-07T14:40:37",
            "name": "RCU integration with LPM library",
            "version": 6,
            "mbox": "https://patches.dpdk.org/series/10852/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/73434/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/73434/checks/",
    "tags": {},
    "headers": {
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "List-Post": "<mailto:dev@dpdk.org>",
        "References": "<20190906094534.36060-1-ruifeng.wang@arm.com>\n <20200707144041.35498-1-ruifeng.wang@arm.com>",
        "X-BeenThere": "dev@dpdk.org",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "Subject": "[dpdk-dev] [PATCH v6 1/3] lib/lpm: integrate RCU QSBR",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "From": "Ruifeng Wang <ruifeng.wang@arm.com>",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6B01FA00BE;\n\tTue,  7 Jul 2020 16:41:21 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 437551DE54;\n\tTue,  7 Jul 2020 16:41:21 +0200 (CEST)",
            "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id 2753E1DE53\n for <dev@dpdk.org>; Tue,  7 Jul 2020 16:41:19 +0200 (CEST)",
            "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8E5CBC0A;\n Tue,  7 Jul 2020 07:41:18 -0700 (PDT)",
            "from net-arm-thunderx2-02.shanghai.arm.com\n (net-arm-thunderx2-02.shanghai.arm.com [10.169.210.119])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 336C23F68F;\n Tue,  7 Jul 2020 07:41:14 -0700 (PDT)"
        ],
        "To": "Bruce Richardson <bruce.richardson@intel.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n John McNamara <john.mcnamara@intel.com>,\n Marko Kovacevic <marko.kovacevic@intel.com>, Ray Kinsella <mdr@ashroe.eu>,\n Neil Horman <nhorman@tuxdriver.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Date": "Tue,  7 Jul 2020 22:40:38 +0800",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "In-Reply-To": "<20200707144041.35498-1-ruifeng.wang@arm.com>",
        "Cc": "dev@dpdk.org, konstantin.ananyev@intel.com, honnappa.nagarahalli@arm.com,\n nd@arm.com, Ruifeng Wang <ruifeng.wang@arm.com>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Message-Id": "<20200707144041.35498-2-ruifeng.wang@arm.com>",
        "Return-Path": "<dev-bounces@dpdk.org>"
    },
    "content": "Currently, the tbl8 group is freed even though the readers might be\nusing the tbl8 group entries. The freed tbl8 group can be reallocated\nquickly. This results in incorrect lookup results.\n\nRCU QSBR process is integrated for safe tbl8 group reclaim.\nRefer to RCU documentation to understand various aspects of\nintegrating RCU library into other libraries.\n\nSigned-off-by: Ruifeng Wang <ruifeng.wang@arm.com>\nReviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\nAcked-by: Ray Kinsella <mdr@ashroe.eu>\n---\n doc/guides/prog_guide/lpm_lib.rst  |  32 ++++++++\n lib/librte_lpm/Makefile            |   2 +-\n lib/librte_lpm/meson.build         |   1 +\n lib/librte_lpm/rte_lpm.c           | 120 ++++++++++++++++++++++++++---\n lib/librte_lpm/rte_lpm.h           |  59 ++++++++++++++\n lib/librte_lpm/rte_lpm_version.map |   6 ++\n 6 files changed, 208 insertions(+), 12 deletions(-)",
    "diff": "diff --git a/doc/guides/prog_guide/lpm_lib.rst b/doc/guides/prog_guide/lpm_lib.rst\nindex 1609a57d0..6f5ccaadf 100644\n--- a/doc/guides/prog_guide/lpm_lib.rst\n+++ b/doc/guides/prog_guide/lpm_lib.rst\n@@ -145,6 +145,38 @@ depending on whether we need to move to the next table or not.\n Prefix expansion is one of the keys of this algorithm,\n since it improves the speed dramatically by adding redundancy.\n \n+Deletion\n+~~~~~~~~\n+\n+When deleting a rule, a replacement rule is searched for. Replacement rule is an existing rule that has\n+the longest prefix match with the rule to be deleted, but has shorter prefix.\n+\n+If a replacement rule is found, target tbl24 and tbl8 entries are updated to have the same depth and next hop\n+value with the replacement rule.\n+\n+If no replacement rule can be found, target tbl24 and tbl8 entries will be cleared.\n+\n+Prefix expansion is performed if the rule's depth is not exactly 24 bits or 32 bits.\n+\n+After deleting a rule, a group of tbl8s that belongs to the same tbl24 entry are freed in following cases:\n+\n+*   All tbl8s in the group are empty .\n+\n+*   All tbl8s in the group have the same values and with depth no greater than 24.\n+\n+Free of tbl8s have different behaviors:\n+\n+*   If RCU is not used, tbl8s are cleared and reclaimed immediately.\n+\n+*   If RCU is used, tbl8s are reclaimed when readers are in quiescent state.\n+\n+When the LPM is not using RCU, tbl8 group can be freed immediately even though the readers might be using\n+the tbl8 group entries. This might result in incorrect lookup results.\n+\n+RCU QSBR process is integrated for safe tbl8 group reclaimation. Application has certain responsibilities\n+while using this feature. Please refer to resource reclaimation framework of :ref:`RCU library <RCU_Library>`\n+for more details.\n+\n Lookup\n ~~~~~~\n \ndiff --git a/lib/librte_lpm/Makefile b/lib/librte_lpm/Makefile\nindex d682785b6..6f06c5c03 100644\n--- a/lib/librte_lpm/Makefile\n+++ b/lib/librte_lpm/Makefile\n@@ -8,7 +8,7 @@ LIB = librte_lpm.a\n \n CFLAGS += -O3\n CFLAGS += $(WERROR_FLAGS) -I$(SRCDIR)\n-LDLIBS += -lrte_eal -lrte_hash\n+LDLIBS += -lrte_eal -lrte_hash -lrte_rcu\n \n EXPORT_MAP := rte_lpm_version.map\n \ndiff --git a/lib/librte_lpm/meson.build b/lib/librte_lpm/meson.build\nindex 021ac6d8d..6cfc083c5 100644\n--- a/lib/librte_lpm/meson.build\n+++ b/lib/librte_lpm/meson.build\n@@ -7,3 +7,4 @@ headers = files('rte_lpm.h', 'rte_lpm6.h')\n # without worrying about which architecture we actually need\n headers += files('rte_lpm_altivec.h', 'rte_lpm_neon.h', 'rte_lpm_sse.h')\n deps += ['hash']\n+deps += ['rcu']\ndiff --git a/lib/librte_lpm/rte_lpm.c b/lib/librte_lpm/rte_lpm.c\nindex 38ab512a4..d498ba761 100644\n--- a/lib/librte_lpm/rte_lpm.c\n+++ b/lib/librte_lpm/rte_lpm.c\n@@ -1,5 +1,6 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n  * Copyright(c) 2010-2014 Intel Corporation\n+ * Copyright(c) 2020 Arm Limited\n  */\n \n #include <string.h>\n@@ -246,12 +247,82 @@ rte_lpm_free(struct rte_lpm *lpm)\n \n \trte_mcfg_tailq_write_unlock();\n \n+\tif (lpm->dq)\n+\t\trte_rcu_qsbr_dq_delete(lpm->dq);\n \trte_free(lpm->tbl8);\n \trte_free(lpm->rules_tbl);\n \trte_free(lpm);\n \trte_free(te);\n }\n \n+static void\n+__lpm_rcu_qsbr_free_resource(void *p, void *data, unsigned int n)\n+{\n+\tstruct rte_lpm_tbl_entry zero_tbl8_entry = {0};\n+\tuint32_t tbl8_group_index = *(uint32_t *)data;\n+\tstruct rte_lpm_tbl_entry *tbl8 = ((struct rte_lpm *)p)->tbl8;\n+\n+\tRTE_SET_USED(n);\n+\t/* Set tbl8 group invalid */\n+\t__atomic_store(&tbl8[tbl8_group_index], &zero_tbl8_entry,\n+\t\t__ATOMIC_RELAXED);\n+}\n+\n+/* Associate QSBR variable with an LPM object.\n+ */\n+int\n+rte_lpm_rcu_qsbr_add(struct rte_lpm *lpm, struct rte_lpm_rcu_config *cfg,\n+\tstruct rte_rcu_qsbr_dq **dq)\n+{\n+\tchar rcu_dq_name[RTE_RCU_QSBR_DQ_NAMESIZE];\n+\tstruct rte_rcu_qsbr_dq_parameters params = {0};\n+\n+\tif ((lpm == NULL) || (cfg == NULL)) {\n+\t\trte_errno = EINVAL;\n+\t\treturn 1;\n+\t}\n+\n+\tif (lpm->v) {\n+\t\trte_errno = EEXIST;\n+\t\treturn 1;\n+\t}\n+\n+\tif (cfg->mode == RTE_LPM_QSBR_MODE_SYNC) {\n+\t\t/* No other things to do. */\n+\t} else if (cfg->mode == RTE_LPM_QSBR_MODE_DQ) {\n+\t\t/* Init QSBR defer queue. */\n+\t\tsnprintf(rcu_dq_name, sizeof(rcu_dq_name),\n+\t\t\t\t\"LPM_RCU_%s\", lpm->name);\n+\t\tparams.name = rcu_dq_name;\n+\t\tparams.size = cfg->dq_size;\n+\t\tif (params.size == 0)\n+\t\t\tparams.size = lpm->number_tbl8s;\n+\t\tparams.trigger_reclaim_limit = cfg->reclaim_thd;\n+\t\tparams.max_reclaim_size = cfg->reclaim_max;\n+\t\tif (params.max_reclaim_size == 0)\n+\t\t\tparams.max_reclaim_size = RTE_LPM_RCU_DQ_RECLAIM_MAX;\n+\t\tparams.esize = sizeof(uint32_t);\t/* tbl8 group index */\n+\t\tparams.free_fn = __lpm_rcu_qsbr_free_resource;\n+\t\tparams.p = lpm;\n+\t\tparams.v = cfg->v;\n+\t\tlpm->dq = rte_rcu_qsbr_dq_create(&params);\n+\t\tif (lpm->dq == NULL) {\n+\t\t\tRTE_LOG(ERR, LPM,\n+\t\t\t\t\t\"LPM QS defer queue creation failed\\n\");\n+\t\t\treturn 1;\n+\t\t}\n+\t\tif (dq)\n+\t\t\t*dq = lpm->dq;\n+\t} else {\n+\t\trte_errno = EINVAL;\n+\t\treturn 1;\n+\t}\n+\tlpm->rcu_mode = cfg->mode;\n+\tlpm->v = cfg->v;\n+\n+\treturn 0;\n+}\n+\n /*\n  * Adds a rule to the rule table.\n  *\n@@ -394,14 +465,15 @@ rule_find(struct rte_lpm *lpm, uint32_t ip_masked, uint8_t depth)\n  * Find, clean and allocate a tbl8.\n  */\n static int32_t\n-tbl8_alloc(struct rte_lpm_tbl_entry *tbl8, uint32_t number_tbl8s)\n+_tbl8_alloc(struct rte_lpm *lpm)\n {\n \tuint32_t group_idx; /* tbl8 group index. */\n \tstruct rte_lpm_tbl_entry *tbl8_entry;\n \n \t/* Scan through tbl8 to find a free (i.e. INVALID) tbl8 group. */\n-\tfor (group_idx = 0; group_idx < number_tbl8s; group_idx++) {\n-\t\ttbl8_entry = &tbl8[group_idx * RTE_LPM_TBL8_GROUP_NUM_ENTRIES];\n+\tfor (group_idx = 0; group_idx < lpm->number_tbl8s; group_idx++) {\n+\t\ttbl8_entry = &lpm->tbl8[group_idx *\n+\t\t\t\t\tRTE_LPM_TBL8_GROUP_NUM_ENTRIES];\n \t\t/* If a free tbl8 group is found clean it and set as VALID. */\n \t\tif (!tbl8_entry->valid_group) {\n \t\t\tstruct rte_lpm_tbl_entry new_tbl8_entry = {\n@@ -427,14 +499,40 @@ tbl8_alloc(struct rte_lpm_tbl_entry *tbl8, uint32_t number_tbl8s)\n \treturn -ENOSPC;\n }\n \n+static int32_t\n+tbl8_alloc(struct rte_lpm *lpm)\n+{\n+\tint32_t group_idx; /* tbl8 group index. */\n+\n+\tgroup_idx = _tbl8_alloc(lpm);\n+\tif ((group_idx == -ENOSPC) && (lpm->dq != NULL)) {\n+\t\t/* If there are no tbl8 groups try to reclaim one. */\n+\t\tif (rte_rcu_qsbr_dq_reclaim(lpm->dq, 1, NULL, NULL, NULL) == 0)\n+\t\t\tgroup_idx = _tbl8_alloc(lpm);\n+\t}\n+\n+\treturn group_idx;\n+}\n+\n static void\n-tbl8_free(struct rte_lpm_tbl_entry *tbl8, uint32_t tbl8_group_start)\n+tbl8_free(struct rte_lpm *lpm, uint32_t tbl8_group_start)\n {\n-\t/* Set tbl8 group invalid*/\n \tstruct rte_lpm_tbl_entry zero_tbl8_entry = {0};\n \n-\t__atomic_store(&tbl8[tbl8_group_start], &zero_tbl8_entry,\n-\t\t\t__ATOMIC_RELAXED);\n+\tif (!lpm->v) {\n+\t\t/* Set tbl8 group invalid*/\n+\t\t__atomic_store(&lpm->tbl8[tbl8_group_start], &zero_tbl8_entry,\n+\t\t\t\t__ATOMIC_RELAXED);\n+\t} else if (lpm->rcu_mode == RTE_LPM_QSBR_MODE_SYNC) {\n+\t\t/* Wait for quiescent state change. */\n+\t\trte_rcu_qsbr_synchronize(lpm->v, RTE_QSBR_THRID_INVALID);\n+\t\t/* Set tbl8 group invalid*/\n+\t\t__atomic_store(&lpm->tbl8[tbl8_group_start], &zero_tbl8_entry,\n+\t\t\t\t__ATOMIC_RELAXED);\n+\t} else if (lpm->rcu_mode == RTE_LPM_QSBR_MODE_DQ) {\n+\t\t/* Push into QSBR defer queue. */\n+\t\trte_rcu_qsbr_dq_enqueue(lpm->dq, (void *)&tbl8_group_start);\n+\t}\n }\n \n static __rte_noinline int32_t\n@@ -523,7 +621,7 @@ add_depth_big(struct rte_lpm *lpm, uint32_t ip_masked, uint8_t depth,\n \n \tif (!lpm->tbl24[tbl24_index].valid) {\n \t\t/* Search for a free tbl8 group. */\n-\t\ttbl8_group_index = tbl8_alloc(lpm->tbl8, lpm->number_tbl8s);\n+\t\ttbl8_group_index = tbl8_alloc(lpm);\n \n \t\t/* Check tbl8 allocation was successful. */\n \t\tif (tbl8_group_index < 0) {\n@@ -569,7 +667,7 @@ add_depth_big(struct rte_lpm *lpm, uint32_t ip_masked, uint8_t depth,\n \t} /* If valid entry but not extended calculate the index into Table8. */\n \telse if (lpm->tbl24[tbl24_index].valid_group == 0) {\n \t\t/* Search for free tbl8 group. */\n-\t\ttbl8_group_index = tbl8_alloc(lpm->tbl8, lpm->number_tbl8s);\n+\t\ttbl8_group_index = tbl8_alloc(lpm);\n \n \t\tif (tbl8_group_index < 0) {\n \t\t\treturn tbl8_group_index;\n@@ -977,7 +1075,7 @@ delete_depth_big(struct rte_lpm *lpm, uint32_t ip_masked,\n \t\t */\n \t\tlpm->tbl24[tbl24_index].valid = 0;\n \t\t__atomic_thread_fence(__ATOMIC_RELEASE);\n-\t\ttbl8_free(lpm->tbl8, tbl8_group_start);\n+\t\ttbl8_free(lpm, tbl8_group_start);\n \t} else if (tbl8_recycle_index > -1) {\n \t\t/* Update tbl24 entry. */\n \t\tstruct rte_lpm_tbl_entry new_tbl24_entry = {\n@@ -993,7 +1091,7 @@ delete_depth_big(struct rte_lpm *lpm, uint32_t ip_masked,\n \t\t__atomic_store(&lpm->tbl24[tbl24_index], &new_tbl24_entry,\n \t\t\t\t__ATOMIC_RELAXED);\n \t\t__atomic_thread_fence(__ATOMIC_RELEASE);\n-\t\ttbl8_free(lpm->tbl8, tbl8_group_start);\n+\t\ttbl8_free(lpm, tbl8_group_start);\n \t}\n #undef group_idx\n \treturn 0;\ndiff --git a/lib/librte_lpm/rte_lpm.h b/lib/librte_lpm/rte_lpm.h\nindex b9d49ac87..7889f21b3 100644\n--- a/lib/librte_lpm/rte_lpm.h\n+++ b/lib/librte_lpm/rte_lpm.h\n@@ -1,5 +1,6 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n  * Copyright(c) 2010-2014 Intel Corporation\n+ * Copyright(c) 2020 Arm Limited\n  */\n \n #ifndef _RTE_LPM_H_\n@@ -20,6 +21,7 @@\n #include <rte_memory.h>\n #include <rte_common.h>\n #include <rte_vect.h>\n+#include <rte_rcu_qsbr.h>\n \n #ifdef __cplusplus\n extern \"C\" {\n@@ -62,6 +64,17 @@ extern \"C\" {\n /** Bitmask used to indicate successful lookup */\n #define RTE_LPM_LOOKUP_SUCCESS          0x01000000\n \n+/** @internal Default RCU defer queue entries to reclaim in one go. */\n+#define RTE_LPM_RCU_DQ_RECLAIM_MAX\t16\n+\n+/** RCU reclamation modes */\n+enum rte_lpm_qsbr_mode {\n+\t/** Create defer queue for reclaim. */\n+\tRTE_LPM_QSBR_MODE_DQ = 0,\n+\t/** Use blocking mode reclaim. No defer queue created. */\n+\tRTE_LPM_QSBR_MODE_SYNC\n+};\n+\n #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN\n /** @internal Tbl24 entry structure. */\n __extension__\n@@ -130,6 +143,28 @@ struct rte_lpm {\n \t\t\t__rte_cache_aligned; /**< LPM tbl24 table. */\n \tstruct rte_lpm_tbl_entry *tbl8; /**< LPM tbl8 table. */\n \tstruct rte_lpm_rule *rules_tbl; /**< LPM rules. */\n+#ifdef ALLOW_EXPERIMENTAL_API\n+\t/* RCU config. */\n+\tstruct rte_rcu_qsbr *v;\t\t/* RCU QSBR variable. */\n+\tenum rte_lpm_qsbr_mode rcu_mode;/* Blocking, defer queue. */\n+\tstruct rte_rcu_qsbr_dq *dq;\t/* RCU QSBR defer queue. */\n+#endif\n+};\n+\n+/** LPM RCU QSBR configuration structure. */\n+struct rte_lpm_rcu_config {\n+\tstruct rte_rcu_qsbr *v;\t/* RCU QSBR variable. */\n+\t/* Mode of RCU QSBR. RTE_LPM_QSBR_MODE_xxx\n+\t * '0' for default: create defer queue for reclaim.\n+\t */\n+\tenum rte_lpm_qsbr_mode mode;\n+\tuint32_t dq_size;\t/* RCU defer queue size.\n+\t\t\t\t * default: lpm->number_tbl8s.\n+\t\t\t\t */\n+\tuint32_t reclaim_thd;\t/* Threshold to trigger auto reclaim. */\n+\tuint32_t reclaim_max;\t/* Max entries to reclaim in one go.\n+\t\t\t\t * default: RTE_LPM_RCU_DQ_RECLAIM_MAX.\n+\t\t\t\t */\n };\n \n /**\n@@ -179,6 +214,30 @@ rte_lpm_find_existing(const char *name);\n void\n rte_lpm_free(struct rte_lpm *lpm);\n \n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice\n+ *\n+ * Associate RCU QSBR variable with an LPM object.\n+ *\n+ * @param lpm\n+ *   the lpm object to add RCU QSBR\n+ * @param cfg\n+ *   RCU QSBR configuration\n+ * @param dq\n+ *   handler of created RCU QSBR defer queue\n+ * @return\n+ *   On success - 0\n+ *   On error - 1 with error code set in rte_errno.\n+ *   Possible rte_errno codes are:\n+ *   - EINVAL - invalid pointer\n+ *   - EEXIST - already added QSBR\n+ *   - ENOMEM - memory allocation failure\n+ */\n+__rte_experimental\n+int rte_lpm_rcu_qsbr_add(struct rte_lpm *lpm, struct rte_lpm_rcu_config *cfg,\n+\tstruct rte_rcu_qsbr_dq **dq);\n+\n /**\n  * Add a rule to the LPM table.\n  *\ndiff --git a/lib/librte_lpm/rte_lpm_version.map b/lib/librte_lpm/rte_lpm_version.map\nindex 500f58b80..bfccd7eac 100644\n--- a/lib/librte_lpm/rte_lpm_version.map\n+++ b/lib/librte_lpm/rte_lpm_version.map\n@@ -21,3 +21,9 @@ DPDK_20.0 {\n \n \tlocal: *;\n };\n+\n+EXPERIMENTAL {\n+\tglobal:\n+\n+\trte_lpm_rcu_qsbr_add;\n+};\n",
    "prefixes": [
        "v6",
        "1/3"
    ]
}