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[ { "id": 115384, "web_url": "https://patches.dpdk.org/comment/115384/", "msgid": "<VE1PR08MB464017605A7E64CD8BF59EC1E9660@VE1PR08MB4640.eurprd08.prod.outlook.com>", "list_archive_url": "https://inbox.dpdk.org/dev/VE1PR08MB464017605A7E64CD8BF59EC1E9660@VE1PR08MB4640.eurprd08.prod.outlook.com", "date": "2020-07-07T15:56:53", "subject": "Re: [dpdk-dev] [PATCH v3 4/4] eventdev: relax smp barriers with C11\n atomics", "submitter": { "id": 833, "url": "https://patches.dpdk.org/api/people/833/?format=api", "name": "Phil Yang", "email": "phil.yang@arm.com" }, "content": "> -----Original Message-----\n> From: Jerin Jacob <jerinjacobk@gmail.com>\n> Sent: Tuesday, July 7, 2020 10:30 PM\n> To: Phil Yang <Phil.Yang@arm.com>\n> Cc: thomas@monjalon.net; Erik Gabriel Carrillo <erik.g.carrillo@intel.com>;\n> dpdk-dev <dev@dpdk.org>; jerinj@marvell.com; Honnappa Nagarahalli\n> <Honnappa.Nagarahalli@arm.com>; David Christensen\n> <drc@linux.vnet.ibm.com>; Ruifeng Wang <Ruifeng.Wang@arm.com>;\n> Dharmik Thakkar <Dharmik.Thakkar@arm.com>; nd <nd@arm.com>; David\n> Marchand <david.marchand@redhat.com>; Ray Kinsella <mdr@ashroe.eu>;\n> Neil Horman <nhorman@tuxdriver.com>; dodji@redhat.com\n> Subject: Re: [dpdk-dev] [PATCH v3 4/4] eventdev: relax smp barriers with\n> C11 atomics\n> \n> On Tue, Jul 7, 2020 at 4:45 PM Phil Yang <phil.yang@arm.com> wrote:\n> >\n> > The impl_opaque field is shared between the timer arm and cancel\n> > operations. Meanwhile, the state flag acts as a guard variable to\n> > make sure the update of impl_opaque is synchronized. The original\n> > code uses rte_smp barriers to achieve that. This patch uses C11\n> > atomics with an explicit one-way memory barrier instead of full\n> > barriers rte_smp_w/rmb() to avoid the unnecessary barrier on aarch64.\n> >\n> > Since compilers can generate the same instructions for volatile and\n> > non-volatile variable in C11 __atomics built-ins, so remain the volatile\n> > keyword in front of state enum to avoid the ABI break issue.\n> >\n> > Signed-off-by: Phil Yang <phil.yang@arm.com>\n> > Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>\n> > Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n> > Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>\n> \n> \n> Could you fix the following:\n> \n> WARNING:TYPO_SPELLING: 'opague' may be misspelled - perhaps 'opaque'?\n> #184: FILE: lib/librte_eventdev/rte_event_timer_adapter.c:1161:\n> + * specific opague data under the correct state.\nDone. \n\nThanks,\nPhil", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0014EA00BE;\n\tTue, 7 Jul 2020 17:57:04 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D67BC1DE99;\n\tTue, 7 Jul 2020 17:57:04 +0200 (CEST)", "from EUR03-VE1-obe.outbound.protection.outlook.com\n (mail-eopbgr50071.outbound.protection.outlook.com [40.107.5.71])\n by dpdk.org (Postfix) with ESMTP id 71EC81D664\n for <dev@dpdk.org>; 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mx.microsoft.com 1; spf=pass\n smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass\n header.d=arm.com; arc=none", "From": "Phil Yang <Phil.Yang@arm.com>", "To": "Jerin Jacob <jerinjacobk@gmail.com>", "CC": "\"thomas@monjalon.net\" <thomas@monjalon.net>, Erik Gabriel Carrillo\n <erik.g.carrillo@intel.com>, dpdk-dev <dev@dpdk.org>, \"jerinj@marvell.com\"\n <jerinj@marvell.com>, Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,\n David Christensen <drc@linux.vnet.ibm.com>, Ruifeng Wang\n <Ruifeng.Wang@arm.com>, Dharmik Thakkar <Dharmik.Thakkar@arm.com>, nd\n <nd@arm.com>, David Marchand <david.marchand@redhat.com>, Ray Kinsella\n <mdr@ashroe.eu>, Neil Horman <nhorman@tuxdriver.com>, \"dodji@redhat.com\"\n <dodji@redhat.com>", "Thread-Topic": "[dpdk-dev] [PATCH v3 4/4] eventdev: relax smp barriers with C11\n atomics", "Thread-Index": "AQHWVGstz2Ufalxq2EOENxAbsu7jbaj8RTnA", "Date": "Tue, 7 Jul 2020 15:56:53 +0000", "Message-ID": "\n <VE1PR08MB464017605A7E64CD8BF59EC1E9660@VE1PR08MB4640.eurprd08.prod.outlook.com>", "References": "<1593667604-12029-1-git-send-email-phil.yang@arm.com>\n <1594120403-17643-1-git-send-email-phil.yang@arm.com>\n <1594120403-17643-4-git-send-email-phil.yang@arm.com>\n <CALBAE1NnD_Ye3-fgPVjW-L_t8fEuhktJVf_-W3Sbj-tOiJAWOw@mail.gmail.com>", "In-Reply-To": "\n <CALBAE1NnD_Ye3-fgPVjW-L_t8fEuhktJVf_-W3Sbj-tOiJAWOw@mail.gmail.com>", "Accept-Language": "zh-CN, en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "x-ts-tracking-id": "32e7a13d-08e0-4e35-80d9-17324a59edc9.0", "x-checkrecipientchecked": "true", "Authentication-Results-Original": "gmail.com; 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Ip=[63.35.35.123];\n Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n AM5EUR03FT062.eop-EUR03.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "Subject": "Re: [dpdk-dev] [PATCH v3 4/4] eventdev: relax smp barriers with C11\n atomics", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "addressed": null }, { "id": 115372, "web_url": "https://patches.dpdk.org/comment/115372/", "msgid": "<CALBAE1NnD_Ye3-fgPVjW-L_t8fEuhktJVf_-W3Sbj-tOiJAWOw@mail.gmail.com>", "list_archive_url": "https://inbox.dpdk.org/dev/CALBAE1NnD_Ye3-fgPVjW-L_t8fEuhktJVf_-W3Sbj-tOiJAWOw@mail.gmail.com", "date": "2020-07-07T14:29:30", "subject": "Re: [dpdk-dev] [PATCH v3 4/4] eventdev: relax smp barriers with C11\n\tatomics", "submitter": { "id": 1270, "url": "https://patches.dpdk.org/api/people/1270/?format=api", "name": "Jerin Jacob", "email": "jerinjacobk@gmail.com" }, "content": "On Tue, Jul 7, 2020 at 4:45 PM Phil Yang <phil.yang@arm.com> wrote:\n>\n> The impl_opaque field is shared between the timer arm and cancel\n> operations. Meanwhile, the state flag acts as a guard variable to\n> make sure the update of impl_opaque is synchronized. The original\n> code uses rte_smp barriers to achieve that. This patch uses C11\n> atomics with an explicit one-way memory barrier instead of full\n> barriers rte_smp_w/rmb() to avoid the unnecessary barrier on aarch64.\n>\n> Since compilers can generate the same instructions for volatile and\n> non-volatile variable in C11 __atomics built-ins, so remain the volatile\n> keyword in front of state enum to avoid the ABI break issue.\n>\n> Signed-off-by: Phil Yang <phil.yang@arm.com>\n> Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>\n> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\n> Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>\n\n\nCould you fix the following:\n\nWARNING:TYPO_SPELLING: 'opague' may be misspelled - perhaps 'opaque'?\n#184: FILE: lib/librte_eventdev/rte_event_timer_adapter.c:1161:\n+ * specific opague data under the correct state.\n\ntotal: 0 errors, 1 warnings, 124 lines checked\n\n\n> ---\n> v3:\n> Fix ABI issue: revert to 'volatile enum rte_event_timer_state type state'.\n>\n> v2:\n> 1. Removed implementation-specific opaque data cleanup code.\n> 2. Replaced thread fence with atomic ACQURE/RELEASE ordering on state access.\n>\n> lib/librte_eventdev/rte_event_timer_adapter.c | 55 ++++++++++++++++++---------\n> 1 file changed, 37 insertions(+), 18 deletions(-)\n>\n> diff --git a/lib/librte_eventdev/rte_event_timer_adapter.c b/lib/librte_eventdev/rte_event_timer_adapter.c\n> index d75415c..eb2c93a 100644\n> --- a/lib/librte_eventdev/rte_event_timer_adapter.c\n> +++ b/lib/librte_eventdev/rte_event_timer_adapter.c\n> @@ -629,7 +629,8 @@ swtim_callback(struct rte_timer *tim)\n> sw->expired_timers[sw->n_expired_timers++] = tim;\n> sw->stats.evtim_exp_count++;\n>\n> - evtim->state = RTE_EVENT_TIMER_NOT_ARMED;\n> + __atomic_store_n(&evtim->state, RTE_EVENT_TIMER_NOT_ARMED,\n> + __ATOMIC_RELEASE);\n> }\n>\n> if (event_buffer_batch_ready(&sw->buffer)) {\n> @@ -1020,6 +1021,7 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n> int n_lcores;\n> /* Timer list for this lcore is not in use. */\n> uint16_t exp_state = 0;\n> + enum rte_event_timer_state n_state;\n>\n> #ifdef RTE_LIBRTE_EVENTDEV_DEBUG\n> /* Check that the service is running. */\n> @@ -1060,30 +1062,36 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n> }\n>\n> for (i = 0; i < nb_evtims; i++) {\n> - /* Don't modify the event timer state in these cases */\n> - if (evtims[i]->state == RTE_EVENT_TIMER_ARMED) {\n> + n_state = __atomic_load_n(&evtims[i]->state, __ATOMIC_ACQUIRE);\n> + if (n_state == RTE_EVENT_TIMER_ARMED) {\n> rte_errno = EALREADY;\n> break;\n> - } else if (!(evtims[i]->state == RTE_EVENT_TIMER_NOT_ARMED ||\n> - evtims[i]->state == RTE_EVENT_TIMER_CANCELED)) {\n> + } else if (!(n_state == RTE_EVENT_TIMER_NOT_ARMED ||\n> + n_state == RTE_EVENT_TIMER_CANCELED)) {\n> rte_errno = EINVAL;\n> break;\n> }\n>\n> ret = check_timeout(evtims[i], adapter);\n> if (unlikely(ret == -1)) {\n> - evtims[i]->state = RTE_EVENT_TIMER_ERROR_TOOLATE;\n> + __atomic_store_n(&evtims[i]->state,\n> + RTE_EVENT_TIMER_ERROR_TOOLATE,\n> + __ATOMIC_RELAXED);\n> rte_errno = EINVAL;\n> break;\n> } else if (unlikely(ret == -2)) {\n> - evtims[i]->state = RTE_EVENT_TIMER_ERROR_TOOEARLY;\n> + __atomic_store_n(&evtims[i]->state,\n> + RTE_EVENT_TIMER_ERROR_TOOEARLY,\n> + __ATOMIC_RELAXED);\n> rte_errno = EINVAL;\n> break;\n> }\n>\n> if (unlikely(check_destination_event_queue(evtims[i],\n> adapter) < 0)) {\n> - evtims[i]->state = RTE_EVENT_TIMER_ERROR;\n> + __atomic_store_n(&evtims[i]->state,\n> + RTE_EVENT_TIMER_ERROR,\n> + __ATOMIC_RELAXED);\n> rte_errno = EINVAL;\n> break;\n> }\n> @@ -1099,13 +1107,18 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n> SINGLE, lcore_id, NULL, evtims[i]);\n> if (ret < 0) {\n> /* tim was in RUNNING or CONFIG state */\n> - evtims[i]->state = RTE_EVENT_TIMER_ERROR;\n> + __atomic_store_n(&evtims[i]->state,\n> + RTE_EVENT_TIMER_ERROR,\n> + __ATOMIC_RELEASE);\n> break;\n> }\n>\n> - rte_smp_wmb();\n> EVTIM_LOG_DBG(\"armed an event timer\");\n> - evtims[i]->state = RTE_EVENT_TIMER_ARMED;\n> + /* RELEASE ordering guarantees the adapter specific value\n> + * changes observed before the update of state.\n> + */\n> + __atomic_store_n(&evtims[i]->state, RTE_EVENT_TIMER_ARMED,\n> + __ATOMIC_RELEASE);\n> }\n>\n> if (i < nb_evtims)\n> @@ -1132,6 +1145,7 @@ swtim_cancel_burst(const struct rte_event_timer_adapter *adapter,\n> struct rte_timer *timp;\n> uint64_t opaque;\n> struct swtim *sw = swtim_pmd_priv(adapter);\n> + enum rte_event_timer_state n_state;\n>\n> #ifdef RTE_LIBRTE_EVENTDEV_DEBUG\n> /* Check that the service is running. */\n> @@ -1143,16 +1157,18 @@ swtim_cancel_burst(const struct rte_event_timer_adapter *adapter,\n>\n> for (i = 0; i < nb_evtims; i++) {\n> /* Don't modify the event timer state in these cases */\n> - if (evtims[i]->state == RTE_EVENT_TIMER_CANCELED) {\n> + /* ACQUIRE ordering guarantees the access of implementation\n> + * specific opague data under the correct state.\n> + */\n> + n_state = __atomic_load_n(&evtims[i]->state, __ATOMIC_ACQUIRE);\n> + if (n_state == RTE_EVENT_TIMER_CANCELED) {\n> rte_errno = EALREADY;\n> break;\n> - } else if (evtims[i]->state != RTE_EVENT_TIMER_ARMED) {\n> + } else if (n_state != RTE_EVENT_TIMER_ARMED) {\n> rte_errno = EINVAL;\n> break;\n> }\n>\n> - rte_smp_rmb();\n> -\n> opaque = evtims[i]->impl_opaque[0];\n> timp = (struct rte_timer *)(uintptr_t)opaque;\n> RTE_ASSERT(timp != NULL);\n> @@ -1166,9 +1182,12 @@ swtim_cancel_burst(const struct rte_event_timer_adapter *adapter,\n>\n> rte_mempool_put(sw->tim_pool, (void **)timp);\n>\n> - evtims[i]->state = RTE_EVENT_TIMER_CANCELED;\n> -\n> - rte_smp_wmb();\n> + /* The RELEASE ordering here pairs with atomic ordering\n> + * to make sure the state update data observed between\n> + * threads.\n> + */\n> + __atomic_store_n(&evtims[i]->state, RTE_EVENT_TIMER_CANCELED,\n> + __ATOMIC_RELEASE);\n> }\n>\n> return i;\n> --\n> 2.7.4\n>", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E8A69A00BE;\n\tTue, 7 Jul 2020 16:29:48 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6D8181DD8D;\n\tTue, 7 Jul 2020 16:29:48 +0200 (CEST)", "from mail-io1-f66.google.com (mail-io1-f66.google.com\n [209.85.166.66]) by dpdk.org (Postfix) with ESMTP id 6A8B81DD05\n for <dev@dpdk.org>; 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charset=\"UTF-8\"", "Subject": "Re: [dpdk-dev] [PATCH v3 4/4] eventdev: relax smp barriers with C11\n\tatomics", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "addressed": null } ]