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{
    "id": 73424,
    "url": "https://patches.dpdk.org/api/patches/73424/",
    "web_url": "https://patches.dpdk.org/patch/73424/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1594120403-17643-4-git-send-email-phil.yang@arm.com>",
    "date": "2020-07-07T11:13:23",
    "name": "[v3,4/4] eventdev: relax smp barriers with C11 atomics",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "2a0bb22444c641e46069ac3a45443b4b796f7891",
    "submitter": {
        "id": 833,
        "url": "https://patches.dpdk.org/api/people/833/",
        "name": "Phil Yang",
        "email": "phil.yang@arm.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerin.jacob@caviumnetworks.com"
    },
    "mbox": "https://patches.dpdk.org/patch/73424/mbox/",
    "series": [
        {
            "id": 10847,
            "url": "https://patches.dpdk.org/api/series/10847/",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10847",
            "date": "2020-07-07T11:13:20",
            "name": "[v3,1/4] eventdev: fix race condition on timer list counter",
            "version": 3,
            "mbox": "https://patches.dpdk.org/series/10847/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/73424/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/73424/checks/",
    "tags": {},
    "headers": {
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "Message-Id": "<1594120403-17643-4-git-send-email-phil.yang@arm.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "To": "thomas@monjalon.net,\n\terik.g.carrillo@intel.com,\n\tdev@dpdk.org",
        "Cc": "jerinj@marvell.com, Honnappa.Nagarahalli@arm.com, drc@linux.vnet.ibm.com,\n Ruifeng.Wang@arm.com, Dharmik.Thakkar@arm.com, nd@arm.com,\n david.marchand@redhat.com, mdr@ashroe.eu, nhorman@tuxdriver.com,\n dodji@redhat.com",
        "X-BeenThere": "dev@dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C2D66A00BE;\n\tTue,  7 Jul 2020 13:15:03 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3B8D61DE1A;\n\tTue,  7 Jul 2020 13:14:51 +0200 (CEST)",
            "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id B97561DE13\n for <dev@dpdk.org>; Tue,  7 Jul 2020 13:14:49 +0200 (CEST)",
            "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C1E6113E;\n Tue,  7 Jul 2020 04:14:49 -0700 (PDT)",
            "from phil-VirtualBox.shanghai.arm.com\n (phil-VirtualBox.shanghai.arm.com [10.169.109.153])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4A10D3F71E;\n Tue,  7 Jul 2020 04:14:45 -0700 (PDT)"
        ],
        "Subject": "[dpdk-dev] [PATCH v3 4/4] eventdev: relax smp barriers with C11\n\tatomics",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "In-Reply-To": "<1594120403-17643-1-git-send-email-phil.yang@arm.com>",
        "Precedence": "list",
        "From": "Phil Yang <phil.yang@arm.com>",
        "References": "<1593667604-12029-1-git-send-email-phil.yang@arm.com>\n <1594120403-17643-1-git-send-email-phil.yang@arm.com>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "Errors-To": "dev-bounces@dpdk.org",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Date": "Tue,  7 Jul 2020 19:13:23 +0800",
        "X-Mailman-Version": "2.1.15",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>"
    },
    "content": "The impl_opaque field is shared between the timer arm and cancel\noperations. Meanwhile, the state flag acts as a guard variable to\nmake sure the update of impl_opaque is synchronized. The original\ncode uses rte_smp barriers to achieve that. This patch uses C11\natomics with an explicit one-way memory barrier instead of full\nbarriers rte_smp_w/rmb() to avoid the unnecessary barrier on aarch64.\n\nSince compilers can generate the same instructions for volatile and\nnon-volatile variable in C11 __atomics built-ins, so remain the volatile\nkeyword in front of state enum to avoid the ABI break issue.\n\nSigned-off-by: Phil Yang <phil.yang@arm.com>\nReviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\nAcked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>\n---\nv3:\nFix ABI issue: revert to 'volatile enum rte_event_timer_state type state'.\n\nv2:\n1. Removed implementation-specific opaque data cleanup code.\n2. Replaced thread fence with atomic ACQURE/RELEASE ordering on state access.\n\n lib/librte_eventdev/rte_event_timer_adapter.c | 55 ++++++++++++++++++---------\n 1 file changed, 37 insertions(+), 18 deletions(-)",
    "diff": "diff --git a/lib/librte_eventdev/rte_event_timer_adapter.c b/lib/librte_eventdev/rte_event_timer_adapter.c\nindex d75415c..eb2c93a 100644\n--- a/lib/librte_eventdev/rte_event_timer_adapter.c\n+++ b/lib/librte_eventdev/rte_event_timer_adapter.c\n@@ -629,7 +629,8 @@ swtim_callback(struct rte_timer *tim)\n \t\tsw->expired_timers[sw->n_expired_timers++] = tim;\n \t\tsw->stats.evtim_exp_count++;\n \n-\t\tevtim->state = RTE_EVENT_TIMER_NOT_ARMED;\n+\t\t__atomic_store_n(&evtim->state, RTE_EVENT_TIMER_NOT_ARMED,\n+\t\t\t\t__ATOMIC_RELEASE);\n \t}\n \n \tif (event_buffer_batch_ready(&sw->buffer)) {\n@@ -1020,6 +1021,7 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n \tint n_lcores;\n \t/* Timer list for this lcore is not in use. */\n \tuint16_t exp_state = 0;\n+\tenum rte_event_timer_state n_state;\n \n #ifdef RTE_LIBRTE_EVENTDEV_DEBUG\n \t/* Check that the service is running. */\n@@ -1060,30 +1062,36 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n \t}\n \n \tfor (i = 0; i < nb_evtims; i++) {\n-\t\t/* Don't modify the event timer state in these cases */\n-\t\tif (evtims[i]->state == RTE_EVENT_TIMER_ARMED) {\n+\t\tn_state = __atomic_load_n(&evtims[i]->state, __ATOMIC_ACQUIRE);\n+\t\tif (n_state == RTE_EVENT_TIMER_ARMED) {\n \t\t\trte_errno = EALREADY;\n \t\t\tbreak;\n-\t\t} else if (!(evtims[i]->state == RTE_EVENT_TIMER_NOT_ARMED ||\n-\t\t\t     evtims[i]->state == RTE_EVENT_TIMER_CANCELED)) {\n+\t\t} else if (!(n_state == RTE_EVENT_TIMER_NOT_ARMED ||\n+\t\t\t     n_state == RTE_EVENT_TIMER_CANCELED)) {\n \t\t\trte_errno = EINVAL;\n \t\t\tbreak;\n \t\t}\n \n \t\tret = check_timeout(evtims[i], adapter);\n \t\tif (unlikely(ret == -1)) {\n-\t\t\tevtims[i]->state = RTE_EVENT_TIMER_ERROR_TOOLATE;\n+\t\t\t__atomic_store_n(&evtims[i]->state,\n+\t\t\t\t\tRTE_EVENT_TIMER_ERROR_TOOLATE,\n+\t\t\t\t\t__ATOMIC_RELAXED);\n \t\t\trte_errno = EINVAL;\n \t\t\tbreak;\n \t\t} else if (unlikely(ret == -2)) {\n-\t\t\tevtims[i]->state = RTE_EVENT_TIMER_ERROR_TOOEARLY;\n+\t\t\t__atomic_store_n(&evtims[i]->state,\n+\t\t\t\t\tRTE_EVENT_TIMER_ERROR_TOOEARLY,\n+\t\t\t\t\t__ATOMIC_RELAXED);\n \t\t\trte_errno = EINVAL;\n \t\t\tbreak;\n \t\t}\n \n \t\tif (unlikely(check_destination_event_queue(evtims[i],\n \t\t\t\t\t\t\t   adapter) < 0)) {\n-\t\t\tevtims[i]->state = RTE_EVENT_TIMER_ERROR;\n+\t\t\t__atomic_store_n(&evtims[i]->state,\n+\t\t\t\t\tRTE_EVENT_TIMER_ERROR,\n+\t\t\t\t\t__ATOMIC_RELAXED);\n \t\t\trte_errno = EINVAL;\n \t\t\tbreak;\n \t\t}\n@@ -1099,13 +1107,18 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n \t\t\t\t\t  SINGLE, lcore_id, NULL, evtims[i]);\n \t\tif (ret < 0) {\n \t\t\t/* tim was in RUNNING or CONFIG state */\n-\t\t\tevtims[i]->state = RTE_EVENT_TIMER_ERROR;\n+\t\t\t__atomic_store_n(&evtims[i]->state,\n+\t\t\t\t\tRTE_EVENT_TIMER_ERROR,\n+\t\t\t\t\t__ATOMIC_RELEASE);\n \t\t\tbreak;\n \t\t}\n \n-\t\trte_smp_wmb();\n \t\tEVTIM_LOG_DBG(\"armed an event timer\");\n-\t\tevtims[i]->state = RTE_EVENT_TIMER_ARMED;\n+\t\t/* RELEASE ordering guarantees the adapter specific value\n+\t\t * changes observed before the update of state.\n+\t\t */\n+\t\t__atomic_store_n(&evtims[i]->state, RTE_EVENT_TIMER_ARMED,\n+\t\t\t\t__ATOMIC_RELEASE);\n \t}\n \n \tif (i < nb_evtims)\n@@ -1132,6 +1145,7 @@ swtim_cancel_burst(const struct rte_event_timer_adapter *adapter,\n \tstruct rte_timer *timp;\n \tuint64_t opaque;\n \tstruct swtim *sw = swtim_pmd_priv(adapter);\n+\tenum rte_event_timer_state n_state;\n \n #ifdef RTE_LIBRTE_EVENTDEV_DEBUG\n \t/* Check that the service is running. */\n@@ -1143,16 +1157,18 @@ swtim_cancel_burst(const struct rte_event_timer_adapter *adapter,\n \n \tfor (i = 0; i < nb_evtims; i++) {\n \t\t/* Don't modify the event timer state in these cases */\n-\t\tif (evtims[i]->state == RTE_EVENT_TIMER_CANCELED) {\n+\t\t/* ACQUIRE ordering guarantees the access of implementation\n+\t\t * specific opague data under the correct state.\n+\t\t */\n+\t\tn_state = __atomic_load_n(&evtims[i]->state, __ATOMIC_ACQUIRE);\n+\t\tif (n_state == RTE_EVENT_TIMER_CANCELED) {\n \t\t\trte_errno = EALREADY;\n \t\t\tbreak;\n-\t\t} else if (evtims[i]->state != RTE_EVENT_TIMER_ARMED) {\n+\t\t} else if (n_state != RTE_EVENT_TIMER_ARMED) {\n \t\t\trte_errno = EINVAL;\n \t\t\tbreak;\n \t\t}\n \n-\t\trte_smp_rmb();\n-\n \t\topaque = evtims[i]->impl_opaque[0];\n \t\ttimp = (struct rte_timer *)(uintptr_t)opaque;\n \t\tRTE_ASSERT(timp != NULL);\n@@ -1166,9 +1182,12 @@ swtim_cancel_burst(const struct rte_event_timer_adapter *adapter,\n \n \t\trte_mempool_put(sw->tim_pool, (void **)timp);\n \n-\t\tevtims[i]->state = RTE_EVENT_TIMER_CANCELED;\n-\n-\t\trte_smp_wmb();\n+\t\t/* The RELEASE ordering here pairs with atomic ordering\n+\t\t * to make sure the state update data observed between\n+\t\t * threads.\n+\t\t */\n+\t\t__atomic_store_n(&evtims[i]->state, RTE_EVENT_TIMER_CANCELED,\n+\t\t\t\t__ATOMIC_RELEASE);\n \t}\n \n \treturn i;\n",
    "prefixes": [
        "v3",
        "4/4"
    ]
}