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GET /api/patches/73422/?format=api
{ "id": 73422, "url": "https://patches.dpdk.org/api/patches/73422/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1594120403-17643-2-git-send-email-phil.yang@arm.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1594120403-17643-2-git-send-email-phil.yang@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1594120403-17643-2-git-send-email-phil.yang@arm.com", "date": "2020-07-07T11:13:21", "name": "[v3,2/4] eventdev: use C11 atomics for lcore timer armed flag", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4ad63a31d4cd11f170ea0286dec2890cae61f78a", "submitter": { "id": 833, "url": "https://patches.dpdk.org/api/people/833/?format=api", "name": "Phil Yang", "email": "phil.yang@arm.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1594120403-17643-2-git-send-email-phil.yang@arm.com/mbox/", "series": [ { "id": 10847, "url": "https://patches.dpdk.org/api/series/10847/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10847", "date": "2020-07-07T11:13:20", "name": "[v3,1/4] eventdev: fix race condition on timer list counter", "version": 3, "mbox": "https://patches.dpdk.org/series/10847/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/73422/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/73422/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 394F1A00BE;\n\tTue, 7 Jul 2020 13:14:46 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A23251DE08;\n\tTue, 7 Jul 2020 13:14:42 +0200 (CEST)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by dpdk.org (Postfix) with ESMTP id C7D001DE08\n for <dev@dpdk.org>; Tue, 7 Jul 2020 13:14:40 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 42FEB101E;\n Tue, 7 Jul 2020 04:14:40 -0700 (PDT)", "from phil-VirtualBox.shanghai.arm.com\n (phil-VirtualBox.shanghai.arm.com [10.169.109.153])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 521EE3F71E;\n Tue, 7 Jul 2020 04:14:36 -0700 (PDT)" ], "From": "Phil Yang <phil.yang@arm.com>", "To": "thomas@monjalon.net,\n\terik.g.carrillo@intel.com,\n\tdev@dpdk.org", "Cc": "jerinj@marvell.com, Honnappa.Nagarahalli@arm.com, drc@linux.vnet.ibm.com,\n Ruifeng.Wang@arm.com, Dharmik.Thakkar@arm.com, nd@arm.com,\n david.marchand@redhat.com, mdr@ashroe.eu, nhorman@tuxdriver.com,\n dodji@redhat.com", "Date": "Tue, 7 Jul 2020 19:13:21 +0800", "Message-Id": "<1594120403-17643-2-git-send-email-phil.yang@arm.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1594120403-17643-1-git-send-email-phil.yang@arm.com>", "References": "<1593667604-12029-1-git-send-email-phil.yang@arm.com>\n <1594120403-17643-1-git-send-email-phil.yang@arm.com>", "Subject": "[dpdk-dev] [PATCH v3 2/4] eventdev: use C11 atomics for lcore timer\n\tarmed flag", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The in_use flag is a per core variable which is not shared between\nlcores in the normal case and the access of this variable should be\nordered on the same core. However, if non-EAL thread pick the highest\nlcore to insert timers into, there is the possibility of conflicts\non this flag between threads. Then the atomic CAS operation is needed.\n\nUse the C11 atomic CAS instead of the generic rte_atomic operations\nto avoid the unnecessary barrier on aarch64.\n\nSigned-off-by: Phil Yang <phil.yang@arm.com>\nReviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\nAcked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>\n---\nv2:\n1. Make the code comments more accurate. (Erik)\n2. Define the in_use flag as an unsigned type. (Stephen)\n\n lib/librte_eventdev/rte_event_timer_adapter.c | 15 +++++++++++----\n 1 file changed, 11 insertions(+), 4 deletions(-)", "diff": "diff --git a/lib/librte_eventdev/rte_event_timer_adapter.c b/lib/librte_eventdev/rte_event_timer_adapter.c\nindex 370ea40..6d01a34 100644\n--- a/lib/librte_eventdev/rte_event_timer_adapter.c\n+++ b/lib/librte_eventdev/rte_event_timer_adapter.c\n@@ -554,7 +554,7 @@ struct swtim {\n \tuint32_t timer_data_id;\n \t/* Track which cores have actually armed a timer */\n \tstruct {\n-\t\trte_atomic16_t v;\n+\t\tuint16_t v;\n \t} __rte_cache_aligned in_use[RTE_MAX_LCORE];\n \t/* Track which cores' timer lists should be polled */\n \tunsigned int poll_lcores[RTE_MAX_LCORE];\n@@ -606,7 +606,8 @@ swtim_callback(struct rte_timer *tim)\n \t\t\t\t \"with immediate expiry value\");\n \t\t}\n \n-\t\tif (unlikely(rte_atomic16_test_and_set(&sw->in_use[lcore].v))) {\n+\t\tif (unlikely(sw->in_use[lcore].v == 0)) {\n+\t\t\tsw->in_use[lcore].v = 1;\n \t\t\tn_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1,\n \t\t\t\t\t\t __ATOMIC_RELAXED);\n \t\t\t__atomic_store_n(&sw->poll_lcores[n_lcores], lcore,\n@@ -834,7 +835,7 @@ swtim_init(struct rte_event_timer_adapter *adapter)\n \n \t/* Initialize the variables that track in-use timer lists */\n \tfor (i = 0; i < RTE_MAX_LCORE; i++)\n-\t\trte_atomic16_init(&sw->in_use[i].v);\n+\t\tsw->in_use[i].v = 0;\n \n \t/* Initialize the timer subsystem and allocate timer data instance */\n \tret = rte_timer_subsystem_init();\n@@ -1017,6 +1018,8 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n \tstruct rte_timer *tim, *tims[nb_evtims];\n \tuint64_t cycles;\n \tint n_lcores;\n+\t/* Timer list for this lcore is not in use. */\n+\tuint16_t exp_state = 0;\n \n #ifdef RTE_LIBRTE_EVENTDEV_DEBUG\n \t/* Check that the service is running. */\n@@ -1035,8 +1038,12 @@ __swtim_arm_burst(const struct rte_event_timer_adapter *adapter,\n \t/* If this is the first time we're arming an event timer on this lcore,\n \t * mark this lcore as \"in use\"; this will cause the service\n \t * function to process the timer list that corresponds to this lcore.\n+\t * The atomic CAS operation can prevent the race condition on in_use\n+\t * flag between multiple non-EAL threads.\n \t */\n-\tif (unlikely(rte_atomic16_test_and_set(&sw->in_use[lcore_id].v))) {\n+\tif (unlikely(__atomic_compare_exchange_n(&sw->in_use[lcore_id].v,\n+\t\t\t&exp_state, 1, 0,\n+\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))) {\n \t\tEVTIM_LOG_DBG(\"Adding lcore id = %u to list of lcores to poll\",\n \t\t\t lcore_id);\n \t\tn_lcores = __atomic_fetch_add(&sw->n_poll_lcores, 1,\n", "prefixes": [ "v3", "2/4" ] }