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[
    {
        "id": 115735,
        "web_url": "https://patches.dpdk.org/comment/115735/",
        "msgid": "<1746729.2ERU3Mzd2g@thomas>",
        "date": "2020-07-10T16:55:52",
        "subject": "Re: [dpdk-dev] [PATCH v6 1/4] doc: add generic atomic deprecation\n\tsection",
        "submitter": {
            "id": 685,
            "url": "https://patches.dpdk.org/api/people/685/",
            "name": "Thomas Monjalon",
            "email": "thomas@monjalon.net"
        },
        "content": "Interestingly, John, our doc maintainer is not Cc'ed.\nI add him.\nPlease use --cc-cmd devtools/get-maintainer.sh\nI am expecting a review from an x86 maintainer as well.\nIf no maintainer replies, ping them.\n\n07/07/2020 11:50, Phil Yang:\n> Add deprecating the generic rte_atomic_xx APIs to c11 atomic built-ins\n> guide and examples.\n[...]\n> +Atomic Operations: Use C11 Atomic Built-ins\n> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n> +\n> +DPDK `generic rte_atomic <https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_eal/common/include/generic/rte_atomic.h>`_ operations are\n\nWhy this github link on 20.02?\n\nPlease try to keep lines small.\n\n> +implemented by `__sync built-ins <https://gcc.gnu.org/onlinedocs/gcc/_005f_005fsync-Builtins.html>`_.\n\nLong links should be on their own line to avoid long lines.\n\n> +These __sync built-ins result in full barriers on aarch64, which are unnecessary\n> +in many use cases. They can be replaced by `__atomic built-ins <https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html>`_ that\n> +conform to the C11 memory model and provide finer memory order control.\n> +\n> +So replacing the rte_atomic operations with __atomic built-ins might improve\n> +performance for aarch64 machines. `More details <https://www.dpdk.org/wp-content/uploads/sites/35/2019/10/StateofC11Code.pdf>`_.\n\n\"More details.\"\nPlease make a sentence.\n\n> +\n> +Some typical optimization cases are listed below:\n> +\n> +Atomicity\n> +^^^^^^^^^\n> +\n> +Some use cases require atomicity alone, the ordering of the memory operations\n> +does not matter. For example the packets statistics in the `vhost <https://github.com/DPDK/dpdk/blob/v20.02/examples/vhost/main.c#L796>`_ example application.\n\nAgain github.\nIf you really want a web link, use code.dpdk.org or doc.dpdk.org/api\n\nBut why giving code example at all?\n\n> +\n> +It just updates the number of transmitted packets, no subsequent logic depends\n> +on these counters. So the RELAXED memory ordering is sufficient:\n> +\n> +.. code-block:: c\n> +\n> +    static __rte_always_inline void\n> +    virtio_xmit(struct vhost_dev *dst_vdev, struct vhost_dev *src_vdev,\n> +            struct rte_mbuf *m)\n> +    {\n> +        ...\n> +        ...\n> +        if (enable_stats) {\n> +            __atomic_add_fetch(&dst_vdev->stats.rx_total_atomic, 1, __ATOMIC_RELAXED);\n> +            __atomic_add_fetch(&dst_vdev->stats.rx_atomic, ret, __ATOMIC_RELAXED);\n> +            ...\n> +        }\n> +    }\n\nI don't see how adding real code helps here.\nWhy not just mentioning __atomic_add_fetch and __ATOMIC_RELAXED?\n\n> +\n> +One-way Barrier\n> +^^^^^^^^^^^^^^^\n> +\n> +Some use cases allow for memory reordering in one way while requiring memory\n> +ordering in the other direction.\n> +\n> +For example, the memory operations before the `lock <https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_eal/common/include/generic/rte_spinlock.h#L66>`_ can move to the\n> +critical section, but the memory operations in the critical section cannot move\n> +above the lock. In this case, the full memory barrier in the CAS operation can\n> +be replaced to ACQUIRE. On the other hand, the memory operations after the\n> +`unlock <https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_eal/common/include/generic/rte_spinlock.h#L88>`_ can move to the critical section, but the memory operations in the\n> +critical section cannot move below the unlock. So the full barrier in the STORE\n> +operation can be replaced with RELEASE.\n\nAgain github links instead of our doxygen.\n\n> +\n> +Reader-Writer Concurrency\n> +^^^^^^^^^^^^^^^^^^^^^^^^^\n\nNo blank line here?\n\n> +Lock-free reader-writer concurrency is one of the common use cases in DPDK.\n> +\n> +The payload or the data that the writer wants to communicate to the reader,\n> +can be written with RELAXED memory order. However, the guard variable should\n> +be written with RELEASE memory order. This ensures that the store to guard\n> +variable is observable only after the store to payload is observable.\n> +Refer to `rte_hash insert <https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_hash/rte_cuckoo_hash.c#L737>`_ for an example.\n\nHum...\n\n> +\n> +.. code-block:: c\n> +\n> +    static inline int32_t\n> +    rte_hash_cuckoo_insert_mw(const struct rte_hash *h,\n> +        ...\n> +        int32_t *ret_val)\n> +    {\n> +        ...\n> +        ...\n> +\n> +        /* Insert new entry if there is room in the primary\n> +         * bucket.\n> +         */\n> +        for (i = 0; i < RTE_HASH_BUCKET_ENTRIES; i++) {\n> +                /* Check if slot is available */\n> +                if (likely(prim_bkt->key_idx[i] == EMPTY_SLOT)) {\n> +                        prim_bkt->sig_current[i] = sig;\n> +                        /* Store to signature and key should not\n> +                         * leak after the store to key_idx. i.e.\n> +                         * key_idx is the guard variable for signature\n> +                         * and key.\n> +                         */\n> +                        __atomic_store_n(&prim_bkt->key_idx[i],\n> +                                         new_idx,\n> +                                         __ATOMIC_RELEASE);\n> +                        break;\n> +                }\n> +        }\n> +\n> +        ...\n> +    }\n> +\n> +Correspondingly, on the reader side, the guard variable should be read\n> +with ACQUIRE memory order. The payload or the data the writer communicated,\n> +can be read with RELAXED memory order. This ensures that, if the store to\n> +guard variable is observable, the store to payload is also observable. Refer to `rte_hash lookup <https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_hash/rte_cuckoo_hash.c#L1215>`_ for an example.\n> +\n> +.. code-block:: c\n> +\n> +    static inline int32_t\n> +    search_one_bucket_lf(const struct rte_hash *h, const void *key, uint16_t sig,\n> +        void **data, const struct rte_hash_bucket *bkt)\n> +    {\n> +        ...\n> +\n> +        for (i = 0; i < RTE_HASH_BUCKET_ENTRIES; i++) {\n> +            ....\n> +            if (bkt->sig_current[i] == sig) {\n> +                key_idx = __atomic_load_n(&bkt->key_idx[i],\n> +                                        __ATOMIC_ACQUIRE);\n> +                if (key_idx != EMPTY_SLOT) {\n> +                    k = (struct rte_hash_key *) ((char *)keys +\n> +                        key_idx * h->key_entry_size);\n> +\n> +                if (rte_hash_cmp_eq(key, k->key, h) == 0) {\n> +                    if (data != NULL) {\n> +                        *data = __atomic_load_n(&k->pdata,\n> +                                        __ATOMIC_ACQUIRE);\n> +                    }\n> +\n> +                    /*\n> +                    * Return index where key is stored,\n> +                    * subtracting the first dummy index\n> +                    */\n> +                    return key_idx - 1;\n> +                }\n> +            ...\n> +    }\n> +\n\nNACK for the big chunks of real code.\nPlease use words and avoid code.\n\nIf you insist on keeping code in doc, I will make you responsible\nof updating all the code we have already in the doc :)",
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            "Message-ID": "<1746729.2ERU3Mzd2g@thomas>",
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            "From": "Thomas Monjalon <thomas@monjalon.net>",
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            "To": "Phil Yang <phil.yang@arm.com>",
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            "Date": "Fri, 10 Jul 2020 18:55:52 +0200",
            "Cc": "dev@dpdk.org, david.marchand@redhat.com, drc@linux.vnet.ibm.com,\n Honnappa.Nagarahalli@arm.com, jerinj@marvell.com,\n konstantin.ananyev@intel.com,\n Ola.Liljedahl@arm.com, ruifeng.wang@arm.com, nd@arm.com,\n john.mcnamara@intel.com, bruce.richardson@intel.com",
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            "Subject": "Re: [dpdk-dev] [PATCH v6 1/4] doc: add generic atomic deprecation\n\tsection"
        }
    },
    {
        "id": 115767,
        "web_url": "https://patches.dpdk.org/comment/115767/",
        "msgid": "<DB6PR0802MB221684B3C9377BEA2C4DC01298650@DB6PR0802MB2216.eurprd08.prod.outlook.com>",
        "date": "2020-07-10T23:47:55",
        "subject": "Re: [dpdk-dev] [PATCH v6 1/4] doc: add generic atomic deprecation\n section",
        "submitter": {
            "id": 1045,
            "url": "https://patches.dpdk.org/api/people/1045/",
            "name": "Honnappa Nagarahalli",
            "email": "honnappa.nagarahalli@arm.com"
        },
        "content": "<snip>\n\n> Subject: Re: [dpdk-dev] [PATCH v6 1/4] doc: add generic atomic deprecation\n> section\n> \n> Interestingly, John, our doc maintainer is not Cc'ed.\n> I add him.\n> Please use --cc-cmd devtools/get-maintainer.sh I am expecting a review from\n> an x86 maintainer as well.\n> If no maintainer replies, ping them.\n> \n> 07/07/2020 11:50, Phil Yang:\n> > Add deprecating the generic rte_atomic_xx APIs to c11 atomic built-ins\n> > guide and examples.\n> [...]\n> > +Atomic Operations: Use C11 Atomic Built-ins\n> > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n> > +\n> > +DPDK `generic rte_atomic\n> > +<https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_eal/common/inclu\n> > +de/generic/rte_atomic.h>`_ operations are\n> \n> Why this github link on 20.02?\n> \n> Please try to keep lines small.\n> \n> > +implemented by `__sync built-ins\n> <https://gcc.gnu.org/onlinedocs/gcc/_005f_005fsync-Builtins.html>`_.\n> \n> Long links should be on their own line to avoid long lines.\n> \n> > +These __sync built-ins result in full barriers on aarch64, which are\n> > +unnecessary in many use cases. They can be replaced by `__atomic\n> > +built-ins <https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-\n> Builtins.html>`_ that conform to the C11 memory model and provide finer\n> memory order control.\n> > +\n> > +So replacing the rte_atomic operations with __atomic built-ins might\n> > +improve performance for aarch64 machines. `More details\n> <https://www.dpdk.org/wp-\n> content/uploads/sites/35/2019/10/StateofC11Code.pdf>`_.\n> \n> \"More details.\"\n> Please make a sentence.\nThe full stop is after the link. But, I think we will remove this link as well.\n\n> \n> > +\n> > +Some typical optimization cases are listed below:\n> > +\n> > +Atomicity\n> > +^^^^^^^^^\n> > +\n> > +Some use cases require atomicity alone, the ordering of the memory\n> > +operations does not matter. For example the packets statistics in the\n> `vhost\n> <https://github.com/DPDK/dpdk/blob/v20.02/examples/vhost/main.c#L796>`\n> _ example application.\n> \n> Again github.\n> If you really want a web link, use code.dpdk.org or doc.dpdk.org/api\n> \n> But why giving code example at all?\n> \n> > +\n> > +It just updates the number of transmitted packets, no subsequent\n> > +logic depends on these counters. So the RELAXED memory ordering is\n> sufficient:\n> > +\n> > +.. code-block:: c\n> > +\n> > +    static __rte_always_inline void\n> > +    virtio_xmit(struct vhost_dev *dst_vdev, struct vhost_dev *src_vdev,\n> > +            struct rte_mbuf *m)\n> > +    {\n> > +        ...\n> > +        ...\n> > +        if (enable_stats) {\n> > +            __atomic_add_fetch(&dst_vdev->stats.rx_total_atomic, 1,\n> __ATOMIC_RELAXED);\n> > +            __atomic_add_fetch(&dst_vdev->stats.rx_atomic, ret,\n> __ATOMIC_RELAXED);\n> > +            ...\n> > +        }\n> > +    }\n> \n> I don't see how adding real code helps here.\n> Why not just mentioning __atomic_add_fetch and __ATOMIC_RELAXED?\n> \n> > +\n> > +One-way Barrier\n> > +^^^^^^^^^^^^^^^\n> > +\n> > +Some use cases allow for memory reordering in one way while requiring\n> > +memory ordering in the other direction.\n> > +\n> > +For example, the memory operations before the `lock\n> > +<https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_eal/common/inclu\n> > +de/generic/rte_spinlock.h#L66>`_ can move to the critical section,\n> > +but the memory operations in the critical section cannot move above\n> > +the lock. In this case, the full memory barrier in the CAS operation\n> > +can be replaced to ACQUIRE. On the other hand, the memory operations\n> > +after the `unlock\n> <https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_eal/common/include/\n> generic/rte_spinlock.h#L88>`_ can move to the critical section, but the\n> memory operations in the critical section cannot move below the unlock. So\n> the full barrier in the STORE operation can be replaced with RELEASE.\n> \n> Again github links instead of our doxygen.\n> \n> > +\n> > +Reader-Writer Concurrency\n> > +^^^^^^^^^^^^^^^^^^^^^^^^^\n> \n> No blank line here?\nWill fix\n\n> \n> > +Lock-free reader-writer concurrency is one of the common use cases in\n> DPDK.\n> > +\n> > +The payload or the data that the writer wants to communicate to the\n> > +reader, can be written with RELAXED memory order. However, the guard\n> > +variable should be written with RELEASE memory order. This ensures\n> > +that the store to guard variable is observable only after the store to\n> payload is observable.\n> > +Refer to `rte_hash insert\n> <https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_hash/rte_cuckoo_has\n> h.c#L737>`_ for an example.\n> \n> Hum...\n> \n> > +\n> > +.. code-block:: c\n> > +\n> > +    static inline int32_t\n> > +    rte_hash_cuckoo_insert_mw(const struct rte_hash *h,\n> > +        ...\n> > +        int32_t *ret_val)\n> > +    {\n> > +        ...\n> > +        ...\n> > +\n> > +        /* Insert new entry if there is room in the primary\n> > +         * bucket.\n> > +         */\n> > +        for (i = 0; i < RTE_HASH_BUCKET_ENTRIES; i++) {\n> > +                /* Check if slot is available */\n> > +                if (likely(prim_bkt->key_idx[i] == EMPTY_SLOT)) {\n> > +                        prim_bkt->sig_current[i] = sig;\n> > +                        /* Store to signature and key should not\n> > +                         * leak after the store to key_idx. i.e.\n> > +                         * key_idx is the guard variable for signature\n> > +                         * and key.\n> > +                         */\n> > +                        __atomic_store_n(&prim_bkt->key_idx[i],\n> > +                                         new_idx,\n> > +                                         __ATOMIC_RELEASE);\n> > +                        break;\n> > +                }\n> > +        }\n> > +\n> > +        ...\n> > +    }\n> > +\n> > +Correspondingly, on the reader side, the guard variable should be\n> > +read with ACQUIRE memory order. The payload or the data the writer\n> > +communicated, can be read with RELAXED memory order. This ensures\n> > +that, if the store to guard variable is observable, the store to payload is\n> also observable. Refer to `rte_hash lookup\n> <https://github.com/DPDK/dpdk/blob/v20.02/lib/librte_hash/rte_cuckoo_has\n> h.c#L1215>`_ for an example.\n> > +\n> > +.. code-block:: c\n> > +\n> > +    static inline int32_t\n> > +    search_one_bucket_lf(const struct rte_hash *h, const void *key,\n> uint16_t sig,\n> > +        void **data, const struct rte_hash_bucket *bkt)\n> > +    {\n> > +        ...\n> > +\n> > +        for (i = 0; i < RTE_HASH_BUCKET_ENTRIES; i++) {\n> > +            ....\n> > +            if (bkt->sig_current[i] == sig) {\n> > +                key_idx = __atomic_load_n(&bkt->key_idx[i],\n> > +                                        __ATOMIC_ACQUIRE);\n> > +                if (key_idx != EMPTY_SLOT) {\n> > +                    k = (struct rte_hash_key *) ((char *)keys +\n> > +                        key_idx * h->key_entry_size);\n> > +\n> > +                if (rte_hash_cmp_eq(key, k->key, h) == 0) {\n> > +                    if (data != NULL) {\n> > +                        *data = __atomic_load_n(&k->pdata,\n> > +                                        __ATOMIC_ACQUIRE);\n> > +                    }\n> > +\n> > +                    /*\n> > +                    * Return index where key is stored,\n> > +                    * subtracting the first dummy index\n> > +                    */\n> > +                    return key_idx - 1;\n> > +                }\n> > +            ...\n> > +    }\n> > +\n> \n> NACK for the big chunks of real code.\n> Please use words and avoid code.\n> \n> If you insist on keeping code in doc, I will make you responsible of updating\n> all the code we have already in the doc :)\nOk, understood, will re-spin.\n\n>",
        "headers": {
            "X-Mailman-Version": "2.1.15",
            "Subject": "Re: [dpdk-dev] [PATCH v6 1/4] doc: add generic atomic deprecation\n section",
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