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{
    "id": 73395,
    "url": "https://patches.dpdk.org/api/patches/73395/?format=api",
    "web_url": "https://patches.dpdk.org/patch/73395/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<20200707092244.12791-16-hemant.agrawal@nxp.com>",
    "date": "2020-07-07T09:22:30",
    "name": "[v2,15/29] net/dpaa2: support dynamic flow control",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "ef06baeae22b99af6040709b0d1bd1abec075035",
    "submitter": {
        "id": 477,
        "url": "https://patches.dpdk.org/api/people/477/?format=api",
        "name": "Hemant Agrawal",
        "email": "hemant.agrawal@nxp.com"
    },
    "delegate": {
        "id": 319,
        "url": "https://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@intel.com"
    },
    "mbox": "https://patches.dpdk.org/patch/73395/mbox/",
    "series": [
        {
            "id": 10842,
            "url": "https://patches.dpdk.org/api/series/10842/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10842",
            "date": "2020-07-07T09:22:15",
            "name": "NXP DPAAx enhancements",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/10842/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/73395/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/73395/checks/",
    "tags": {},
    "headers": {
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "List-Post": "<mailto:dev@dpdk.org>",
        "References": "<20200527132326.1382-1-hemant.agrawal@nxp.com>\n <20200707092244.12791-1-hemant.agrawal@nxp.com>",
        "X-BeenThere": "dev@dpdk.org",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "Subject": "[dpdk-dev] [PATCH v2 15/29] net/dpaa2: support dynamic flow control",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "From": "Hemant Agrawal <hemant.agrawal@nxp.com>",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E698DA00BE;\n\tTue,  7 Jul 2020 11:29:53 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D7A101DDA3;\n\tTue,  7 Jul 2020 11:27:22 +0200 (CEST)",
            "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n by dpdk.org (Postfix) with ESMTP id 8E4851DD02\n for <dev@dpdk.org>; Tue,  7 Jul 2020 11:27:08 +0200 (CEST)",
            "from inva021.nxp.com (localhost [127.0.0.1])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6ABDF2008EB;\n Tue,  7 Jul 2020 11:27:08 +0200 (CEST)",
            "from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com\n [165.114.16.14])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 80C022008ED;\n Tue,  7 Jul 2020 11:27:06 +0200 (CEST)",
            "from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net\n [10.232.133.63])\n by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 1E603402F0;\n Tue,  7 Jul 2020 17:27:04 +0800 (SGT)"
        ],
        "X-Virus-Scanned": "ClamAV using ClamSMTP",
        "To": "dev@dpdk.org",
        "X-Mailer": "git-send-email 2.17.1",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Date": "Tue,  7 Jul 2020 14:52:30 +0530",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "In-Reply-To": "<20200707092244.12791-1-hemant.agrawal@nxp.com>",
        "Cc": "ferruh.yigit@intel.com,\n\tJun Yang <jun.yang@nxp.com>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Message-Id": "<20200707092244.12791-16-hemant.agrawal@nxp.com>",
        "Return-Path": "<dev-bounces@dpdk.org>"
    },
    "content": "From: Jun Yang <jun.yang@nxp.com>\n\nDynamic flow used instead of layout defined.\n\nThe actual key/mask size depends on protocols and(or) fields\nof patterns specified.\nAlso, the key and mask should start from the beginning of IOVA.\n\nSigned-off-by: Jun Yang <jun.yang@nxp.com>\n---\n doc/guides/nics/features/dpaa2.ini     |   1 +\n doc/guides/rel_notes/release_20_08.rst |   1 +\n drivers/net/dpaa2/dpaa2_flow.c         | 146 ++++++-------------------\n 3 files changed, 36 insertions(+), 112 deletions(-)",
    "diff": "diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini\nindex c2214fbd5..3685e2e02 100644\n--- a/doc/guides/nics/features/dpaa2.ini\n+++ b/doc/guides/nics/features/dpaa2.ini\n@@ -16,6 +16,7 @@ Unicast MAC filter   = Y\n RSS hash             = Y\n VLAN filter          = Y\n Flow control         = Y\n+Flow API             = Y\n VLAN offload         = Y\n L3 checksum offload  = Y\n L4 checksum offload  = Y\ndiff --git a/doc/guides/rel_notes/release_20_08.rst b/doc/guides/rel_notes/release_20_08.rst\nindex e5bc5cfd8..97267f7b7 100644\n--- a/doc/guides/rel_notes/release_20_08.rst\n+++ b/doc/guides/rel_notes/release_20_08.rst\n@@ -131,6 +131,7 @@ New Features\n   Updated the NXP dpaa2 ethdev  with new features and improvements, including:\n \n   * Added support to use datapath APIs from non-EAL pthread\n+  * Added support for dynamic flow management\n \n Removed Items\n -------------\ndiff --git a/drivers/net/dpaa2/dpaa2_flow.c b/drivers/net/dpaa2/dpaa2_flow.c\nindex 8aa65db30..05d115c78 100644\n--- a/drivers/net/dpaa2/dpaa2_flow.c\n+++ b/drivers/net/dpaa2/dpaa2_flow.c\n@@ -33,29 +33,6 @@ struct rte_flow {\n \tuint16_t flow_id;\n };\n \n-/* Layout for rule compositions for supported patterns */\n-/* TODO: Current design only supports Ethernet + IPv4 based classification. */\n-/* So corresponding offset macros are valid only. Rest are placeholder for */\n-/* now. Once support for other netwrok headers will be added then */\n-/* corresponding macros will be updated with correct values*/\n-#define DPAA2_CLS_RULE_OFFSET_ETH\t0\t/*Start of buffer*/\n-#define DPAA2_CLS_RULE_OFFSET_VLAN\t14\t/* DPAA2_CLS_RULE_OFFSET_ETH */\n-\t\t\t\t\t\t/*\t+ Sizeof Eth fields  */\n-#define DPAA2_CLS_RULE_OFFSET_IPV4\t14\t/* DPAA2_CLS_RULE_OFFSET_VLAN */\n-\t\t\t\t\t\t/*\t+ Sizeof VLAN fields */\n-#define DPAA2_CLS_RULE_OFFSET_IPV6\t25\t/* DPAA2_CLS_RULE_OFFSET_IPV4 */\n-\t\t\t\t\t\t/*\t+ Sizeof IPV4 fields */\n-#define DPAA2_CLS_RULE_OFFSET_ICMP\t58\t/* DPAA2_CLS_RULE_OFFSET_IPV6 */\n-\t\t\t\t\t\t/*\t+ Sizeof IPV6 fields */\n-#define DPAA2_CLS_RULE_OFFSET_UDP\t60\t/* DPAA2_CLS_RULE_OFFSET_ICMP */\n-\t\t\t\t\t\t/*\t+ Sizeof ICMP fields */\n-#define DPAA2_CLS_RULE_OFFSET_TCP\t64\t/* DPAA2_CLS_RULE_OFFSET_UDP  */\n-\t\t\t\t\t\t/*\t+ Sizeof UDP fields  */\n-#define DPAA2_CLS_RULE_OFFSET_SCTP\t68\t/* DPAA2_CLS_RULE_OFFSET_TCP  */\n-\t\t\t\t\t\t/*\t+ Sizeof TCP fields  */\n-#define DPAA2_CLS_RULE_OFFSET_GRE\t72\t/* DPAA2_CLS_RULE_OFFSET_SCTP */\n-\t\t\t\t\t\t/*\t+ Sizeof SCTP fields */\n-\n static const\n enum rte_flow_item_type dpaa2_supported_pattern_type[] = {\n \tRTE_FLOW_ITEM_TYPE_END,\n@@ -212,7 +189,7 @@ dpaa2_configure_flow_eth(struct rte_flow *flow,\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n \t/* Key rule */\n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_ETH;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)(spec->src.addr_bytes),\n \t\t\t\t\t\tsizeof(struct rte_ether_addr));\n \tkey_iova += sizeof(struct rte_ether_addr);\n@@ -223,7 +200,7 @@ dpaa2_configure_flow_eth(struct rte_flow *flow,\n \t\t\t\t\t\tsizeof(rte_be16_t));\n \n \t/* Key mask */\n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_ETH;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)(mask->src.addr_bytes),\n \t\t\t\t\t\tsizeof(struct rte_ether_addr));\n \tmask_iova += sizeof(struct rte_ether_addr);\n@@ -233,9 +210,9 @@ dpaa2_configure_flow_eth(struct rte_flow *flow,\n \tmemcpy((void *)mask_iova, (const void *)(&mask->type),\n \t\t\t\t\t\tsizeof(rte_be16_t));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_ETH +\n-\t\t\t\t((2  * sizeof(struct rte_ether_addr)) +\n-\t\t\t\tsizeof(rte_be16_t)));\n+\tflow->key_size += ((2  * sizeof(struct rte_ether_addr)) +\n+\t\t\t\t\tsizeof(rte_be16_t));\n+\n \treturn device_configured;\n }\n \n@@ -335,15 +312,15 @@ dpaa2_configure_flow_vlan(struct rte_flow *flow,\n \tmask\t= (const struct rte_flow_item_vlan *)\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_VLAN;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)(&spec->tci),\n \t\t\t\t\t\t\tsizeof(rte_be16_t));\n \n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_VLAN;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)(&mask->tci),\n \t\t\t\t\t\t\tsizeof(rte_be16_t));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_VLAN + sizeof(rte_be16_t));\n+\tflow->key_size += sizeof(rte_be16_t);\n \treturn device_configured;\n }\n \n@@ -474,7 +451,7 @@ dpaa2_configure_flow_ipv4(struct rte_flow *flow,\n \tmask\t= (const struct rte_flow_item_ipv4 *)\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_IPV4;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)&spec->hdr.src_addr,\n \t\t\t\t\t\t\tsizeof(uint32_t));\n \tkey_iova += sizeof(uint32_t);\n@@ -484,7 +461,7 @@ dpaa2_configure_flow_ipv4(struct rte_flow *flow,\n \tmemcpy((void *)key_iova, (const void *)&spec->hdr.next_proto_id,\n \t\t\t\t\t\t\tsizeof(uint8_t));\n \n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_IPV4;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)&mask->hdr.src_addr,\n \t\t\t\t\t\t\tsizeof(uint32_t));\n \tmask_iova += sizeof(uint32_t);\n@@ -494,9 +471,7 @@ dpaa2_configure_flow_ipv4(struct rte_flow *flow,\n \tmemcpy((void *)mask_iova, (const void *)&mask->hdr.next_proto_id,\n \t\t\t\t\t\t\tsizeof(uint8_t));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_IPV4 +\n-\t\t\t\t(2 * sizeof(uint32_t)) + sizeof(uint8_t));\n-\n+\tflow->key_size += (2 * sizeof(uint32_t)) + sizeof(uint8_t);\n \treturn device_configured;\n }\n \n@@ -613,23 +588,22 @@ dpaa2_configure_flow_ipv6(struct rte_flow *flow,\n \tmask\t= (const struct rte_flow_item_ipv6 *)\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_IPV6;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)(spec->hdr.src_addr),\n \t\t\t\t\t\tsizeof(spec->hdr.src_addr));\n \tkey_iova += sizeof(spec->hdr.src_addr);\n \tmemcpy((void *)key_iova, (const void *)(spec->hdr.dst_addr),\n \t\t\t\t\t\tsizeof(spec->hdr.dst_addr));\n \n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_IPV6;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)(mask->hdr.src_addr),\n \t\t\t\t\t\tsizeof(mask->hdr.src_addr));\n \tmask_iova += sizeof(mask->hdr.src_addr);\n \tmemcpy((void *)mask_iova, (const void *)(mask->hdr.dst_addr),\n \t\t\t\t\t\tsizeof(mask->hdr.dst_addr));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_IPV6 +\n-\t\t\t\t\tsizeof(spec->hdr.src_addr) +\n-\t\t\t\t\tsizeof(mask->hdr.dst_addr));\n+\tflow->key_size += sizeof(spec->hdr.src_addr) +\n+\t\t\t\t\tsizeof(mask->hdr.dst_addr);\n \treturn device_configured;\n }\n \n@@ -746,22 +720,21 @@ dpaa2_configure_flow_icmp(struct rte_flow *flow,\n \tmask\t= (const struct rte_flow_item_icmp *)\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_ICMP;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)&spec->hdr.icmp_type,\n \t\t\t\t\t\t\tsizeof(uint8_t));\n \tkey_iova += sizeof(uint8_t);\n \tmemcpy((void *)key_iova, (const void *)&spec->hdr.icmp_code,\n \t\t\t\t\t\t\tsizeof(uint8_t));\n \n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_ICMP;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)&mask->hdr.icmp_type,\n \t\t\t\t\t\t\tsizeof(uint8_t));\n \tkey_iova += sizeof(uint8_t);\n \tmemcpy((void *)mask_iova, (const void *)&mask->hdr.icmp_code,\n \t\t\t\t\t\t\tsizeof(uint8_t));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_ICMP +\n-\t\t\t\t(2 * sizeof(uint8_t)));\n+\tflow->key_size += 2 * sizeof(uint8_t);\n \n \treturn device_configured;\n }\n@@ -837,13 +810,6 @@ dpaa2_configure_flow_udp(struct rte_flow *flow,\n \n \tif (device_configured & DPAA2_QOS_TABLE_RECONFIGURE) {\n \t\tindex = priv->extract.qos_key_cfg.num_extracts;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].type =\n-\t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.prot = NET_PROT_IP;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.field = NH_FLD_IP_PROTO;\n-\t\tindex++;\n-\n \t\tpriv->extract.qos_key_cfg.extracts[index].type =\n \t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n \t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n@@ -862,13 +828,6 @@ dpaa2_configure_flow_udp(struct rte_flow *flow,\n \n \tif (device_configured & DPAA2_FS_TABLE_RECONFIGURE) {\n \t\tindex = priv->extract.fs_key_cfg[group].num_extracts;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].type =\n-\t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.prot = NET_PROT_IP;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.field = NH_FLD_IP_PROTO;\n-\t\tindex++;\n-\n \t\tpriv->extract.fs_key_cfg[group].extracts[index].type =\n \t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n \t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n@@ -892,25 +851,21 @@ dpaa2_configure_flow_udp(struct rte_flow *flow,\n \tmask\t= (const struct rte_flow_item_udp *)\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_IPV4 +\n-\t\t\t\t\t(2 * sizeof(uint32_t));\n-\tmemset((void *)key_iova, 0x11, sizeof(uint8_t));\n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_UDP;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)(&spec->hdr.src_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \tkey_iova +=  sizeof(uint16_t);\n \tmemcpy((void *)key_iova, (const void *)(&spec->hdr.dst_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_UDP;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)(&mask->hdr.src_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \tmask_iova +=  sizeof(uint16_t);\n \tmemcpy((void *)mask_iova, (const void *)(&mask->hdr.dst_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_UDP +\n-\t\t\t\t(2 * sizeof(uint16_t)));\n+\tflow->key_size += (2 * sizeof(uint16_t));\n \n \treturn device_configured;\n }\n@@ -986,13 +941,6 @@ dpaa2_configure_flow_tcp(struct rte_flow *flow,\n \n \tif (device_configured & DPAA2_QOS_TABLE_RECONFIGURE) {\n \t\tindex = priv->extract.qos_key_cfg.num_extracts;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].type =\n-\t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.prot = NET_PROT_IP;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.field = NH_FLD_IP_PROTO;\n-\t\tindex++;\n-\n \t\tpriv->extract.qos_key_cfg.extracts[index].type =\n \t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n \t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n@@ -1012,13 +960,6 @@ dpaa2_configure_flow_tcp(struct rte_flow *flow,\n \n \tif (device_configured & DPAA2_FS_TABLE_RECONFIGURE) {\n \t\tindex = priv->extract.fs_key_cfg[group].num_extracts;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].type =\n-\t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.prot = NET_PROT_IP;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.field = NH_FLD_IP_PROTO;\n-\t\tindex++;\n-\n \t\tpriv->extract.fs_key_cfg[group].extracts[index].type =\n \t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n \t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n@@ -1042,25 +983,21 @@ dpaa2_configure_flow_tcp(struct rte_flow *flow,\n \tmask\t= (const struct rte_flow_item_tcp *)\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_IPV4 +\n-\t\t\t\t\t(2 * sizeof(uint32_t));\n-\tmemset((void *)key_iova, 0x06, sizeof(uint8_t));\n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_TCP;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)(&spec->hdr.src_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \tkey_iova += sizeof(uint16_t);\n \tmemcpy((void *)key_iova, (const void *)(&spec->hdr.dst_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_TCP;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)(&mask->hdr.src_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \tmask_iova += sizeof(uint16_t);\n \tmemcpy((void *)mask_iova, (const void *)(&mask->hdr.dst_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_TCP +\n-\t\t\t\t(2 * sizeof(uint16_t)));\n+\tflow->key_size += 2 * sizeof(uint16_t);\n \n \treturn device_configured;\n }\n@@ -1136,13 +1073,6 @@ dpaa2_configure_flow_sctp(struct rte_flow *flow,\n \n \tif (device_configured & DPAA2_QOS_TABLE_RECONFIGURE) {\n \t\tindex = priv->extract.qos_key_cfg.num_extracts;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].type =\n-\t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.prot = NET_PROT_IP;\n-\t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.field = NH_FLD_IP_PROTO;\n-\t\tindex++;\n-\n \t\tpriv->extract.qos_key_cfg.extracts[index].type =\n \t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n \t\tpriv->extract.qos_key_cfg.extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n@@ -1162,13 +1092,6 @@ dpaa2_configure_flow_sctp(struct rte_flow *flow,\n \n \tif (device_configured & DPAA2_FS_TABLE_RECONFIGURE) {\n \t\tindex = priv->extract.fs_key_cfg[group].num_extracts;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].type =\n-\t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.prot = NET_PROT_IP;\n-\t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.field = NH_FLD_IP_PROTO;\n-\t\tindex++;\n-\n \t\tpriv->extract.fs_key_cfg[group].extracts[index].type =\n \t\t\t\t\t\t\tDPKG_EXTRACT_FROM_HDR;\n \t\tpriv->extract.fs_key_cfg[group].extracts[index].extract.from_hdr.type = DPKG_FULL_FIELD;\n@@ -1192,25 +1115,22 @@ dpaa2_configure_flow_sctp(struct rte_flow *flow,\n \tmask\t= (const struct rte_flow_item_sctp *)\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_IPV4 +\n-\t\t\t\t\t\t(2 * sizeof(uint32_t));\n-\tmemset((void *)key_iova, 0x84, sizeof(uint8_t));\n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_SCTP;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)(&spec->hdr.src_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \tkey_iova += sizeof(uint16_t);\n \tmemcpy((void *)key_iova, (const void *)(&spec->hdr.dst_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_SCTP;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)(&mask->hdr.src_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \tmask_iova += sizeof(uint16_t);\n \tmemcpy((void *)mask_iova, (const void *)(&mask->hdr.dst_port),\n \t\t\t\t\t\t\tsizeof(uint16_t));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_SCTP +\n-\t\t\t\t(2 * sizeof(uint16_t)));\n+\tflow->key_size += 2 * sizeof(uint16_t);\n+\n \treturn device_configured;\n }\n \n@@ -1313,15 +1233,15 @@ dpaa2_configure_flow_gre(struct rte_flow *flow,\n \tmask\t= (const struct rte_flow_item_gre *)\n \t\t\t(pattern->mask ? pattern->mask : default_mask);\n \n-\tkey_iova = flow->rule.key_iova + DPAA2_CLS_RULE_OFFSET_GRE;\n+\tkey_iova = flow->rule.key_iova + flow->key_size;\n \tmemcpy((void *)key_iova, (const void *)(&spec->protocol),\n \t\t\t\t\t\t\tsizeof(rte_be16_t));\n \n-\tmask_iova = flow->rule.mask_iova + DPAA2_CLS_RULE_OFFSET_GRE;\n+\tmask_iova = flow->rule.mask_iova + flow->key_size;\n \tmemcpy((void *)mask_iova, (const void *)(&mask->protocol),\n \t\t\t\t\t\t\tsizeof(rte_be16_t));\n \n-\tflow->rule.key_size = (DPAA2_CLS_RULE_OFFSET_GRE + sizeof(rte_be16_t));\n+\tflow->key_size += sizeof(rte_be16_t);\n \n \treturn device_configured;\n }\n@@ -1503,6 +1423,7 @@ dpaa2_generic_flow_set(struct rte_flow *flow,\n \n \t\t\taction.flow_id = action.flow_id % nic_attr.num_rx_tcs;\n \t\t\tindex = flow->index + (flow->tc_id * nic_attr.fs_entries);\n+\t\t\tflow->rule.key_size = flow->key_size;\n \t\t\tret = dpni_add_qos_entry(dpni, CMD_PRI_LOW,\n \t\t\t\t\t\tpriv->token, &flow->rule,\n \t\t\t\t\t\tflow->tc_id, index,\n@@ -1606,6 +1527,7 @@ dpaa2_generic_flow_set(struct rte_flow *flow,\n \n \t\t\t/* Add Rule into QoS table */\n \t\t\tindex = flow->index + (flow->tc_id * nic_attr.fs_entries);\n+\t\t\tflow->rule.key_size = flow->key_size;\n \t\t\tret = dpni_add_qos_entry(dpni, CMD_PRI_LOW, priv->token,\n \t\t\t\t\t\t&flow->rule, flow->tc_id,\n \t\t\t\t\t\tindex, 0, 0);\n@@ -1862,7 +1784,7 @@ struct rte_flow *dpaa2_flow_create(struct rte_eth_dev *dev,\n \n \tflow->rule.key_iova = key_iova;\n \tflow->rule.mask_iova = mask_iova;\n-\tflow->rule.key_size = 0;\n+\tflow->key_size = 0;\n \n \tswitch (dpaa2_filter_type) {\n \tcase RTE_ETH_FILTER_GENERIC:\n",
    "prefixes": [
        "v2",
        "15/29"
    ]
}