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GET /api/patches/73371/?format=api
{ "id": 73371, "url": "https://patches.dpdk.org/api/patches/73371/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200707063333.56791-1-guinanx.sun@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200707063333.56791-1-guinanx.sun@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200707063333.56791-1-guinanx.sun@intel.com", "date": "2020-07-07T06:33:33", "name": "[v3] net/i40e: support cloud filter with L4 port", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "af098ff148f7aff2b0bba1e1a5f23fa48bb8a717", "submitter": { "id": 1476, "url": "https://patches.dpdk.org/api/people/1476/?format=api", "name": "Guinan Sun", "email": "guinanx.sun@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200707063333.56791-1-guinanx.sun@intel.com/mbox/", "series": [ { "id": 10835, "url": "https://patches.dpdk.org/api/series/10835/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10835", "date": "2020-07-07T06:33:33", "name": "[v3] net/i40e: support cloud filter with L4 port", "version": 3, "mbox": "https://patches.dpdk.org/series/10835/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/73371/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/73371/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 414ADA00BE;\n\tTue, 7 Jul 2020 08:42:17 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2434A1D92A;\n\tTue, 7 Jul 2020 08:42:16 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by dpdk.org (Postfix) with ESMTP id 4DA511D583\n for <dev@dpdk.org>; Tue, 7 Jul 2020 08:42:14 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 06 Jul 2020 23:42:13 -0700", "from intel.sh.intel.com ([10.239.255.18])\n by orsmga002.jf.intel.com with ESMTP; 06 Jul 2020 23:42:11 -0700" ], "IronPort-SDR": [ "\n P1z/3ORAP+mdkq03JoVx8Jp/NK/eliWntALle/Wu3aay9Tl+LN8v/Y3VnyX16sGtNIfO+9Ot9J\n SW69LWY+SjRw==", "\n mywiuxQJIP390kZ4BUfPtf7aJbqlaZARxQ53035vvKDv3Y+cUbxnXObR0X5z69GX2+7C3DVIq5\n sS10KOFo5IjQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9674\"; a=\"232407288\"", "E=Sophos;i=\"5.75,321,1589266800\"; d=\"scan'208\";a=\"232407288\"", "E=Sophos;i=\"5.75,321,1589266800\"; d=\"scan'208\";a=\"297293218\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Guinan Sun <guinanx.sun@intel.com>", "To": "dev@dpdk.org", "Cc": "Beilei Xing <beilei.xing@intel.com>, Jeff Guo <jia.guo@intel.com>,\n Guinan Sun <guinanx.sun@intel.com>", "Date": "Tue, 7 Jul 2020 06:33:33 +0000", "Message-Id": "<20200707063333.56791-1-guinanx.sun@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200611052416.14592-1-guinanx.sun@intel.com>", "References": "<20200611052416.14592-1-guinanx.sun@intel.com>", "Subject": "[dpdk-dev] [PATCH v3] net/i40e: support cloud filter with L4 port", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch enables the filter that supports\nto create following two rules for the same packet type:\nOne is to select source port only as input set and the\nother is for destination port only.\nAnd the supported packet types are UDP/TCP/SCTP.\n\nSigned-off-by: Guinan Sun <guinanx.sun@intel.com>\n---\nv3:\n* Add limitation to i40e.rst\n* Rename variables.\n* Fixed the variable assignment.\nv2:\n* Fixed code style and variable naming\n---\n doc/guides/nics/i40e.rst | 9 +\n doc/guides/rel_notes/release_20_08.rst | 8 +\n drivers/net/i40e/i40e_ethdev.c | 200 +++++++++++++++++++++-\n drivers/net/i40e/i40e_ethdev.h | 18 ++\n drivers/net/i40e/i40e_flow.c | 223 +++++++++++++++++++++++++\n 5 files changed, 457 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst\nindex 00c3042d5..98a5537d7 100644\n--- a/doc/guides/nics/i40e.rst\n+++ b/doc/guides/nics/i40e.rst\n@@ -736,6 +736,15 @@ with DPDK, then the configuration will also impact port B in the NIC with\n kernel driver, which don't want to use the TPID.\n So PMD reports warning to clarify what is changed by writing global register.\n \n+L4 port filter\n+~~~~~~~~~~~~~~\n+\n+L4 port filter is a new type of cloud filter.\n+It is possible to generate two filters - one to select L4 DST port\n+and second to select L4 SRC port.\n+If the L4 port filter is used, the cloud filter using inner Vlan and\n+Tunnel Key will be invalid.\n+\n High Performance of Small Packets on 40GbE NIC\n ----------------------------------------------\n \ndiff --git a/doc/guides/rel_notes/release_20_08.rst b/doc/guides/rel_notes/release_20_08.rst\nindex f4b858727..d7d4c4e3b 100644\n--- a/doc/guides/rel_notes/release_20_08.rst\n+++ b/doc/guides/rel_notes/release_20_08.rst\n@@ -108,6 +108,14 @@ New Features\n * Dump ``rte_flow`` memory consumption.\n * Measure packet per second forwarding.\n \n+* **Updated Intel i40e driver.**\n+\n+ Updated i40e PMD with new features and improvements, including:\n+\n+ * Added a new type of cloud filter to support the coexistence of the\n+ following two rules. One selects L4 destination port as input set and\n+ the other one selects L4 source port. We call it L4 port filter.\n+ But there are limitations on using the L4 port filter.\n \n Removed Items\n -------------\ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 777e14926..06f5e77e1 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -7944,6 +7944,13 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,\n #define I40E_TR_GRE_KEY_MASK\t\t\t0x400\n #define I40E_TR_GRE_KEY_WITH_XSUM_MASK\t\t0x800\n #define I40E_TR_GRE_NO_KEY_MASK\t\t\t0x8000\n+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_PORT_TR_WORD0 0x49\n+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_DIRECTION_WORD0 0x41\n+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_INGRESS_WORD0 0x80\n+#define I40E_DIRECTION_INGRESS_KEY\t\t0x8000\n+#define I40E_TR_L4_TYPE_TCP\t\t\t0x2\n+#define I40E_TR_L4_TYPE_UDP\t\t\t0x4\n+#define I40E_TR_L4_TYPE_SCTP\t\t\t0x8\n \n static enum\n i40e_status_code i40e_replace_mpls_l1_filter(struct i40e_pf *pf)\n@@ -8242,6 +8249,132 @@ i40e_status_code i40e_replace_gtp_cloud_filter(struct i40e_pf *pf)\n \treturn status;\n }\n \n+static enum i40e_status_code\n+i40e_replace_port_l1_filter(struct i40e_pf *pf,\n+\t\t\t enum i40e_l4_port_type l4_port_type)\n+{\n+\tstruct i40e_aqc_replace_cloud_filters_cmd_buf filter_replace_buf;\n+\tstruct i40e_aqc_replace_cloud_filters_cmd filter_replace;\n+\tenum i40e_status_code status = I40E_SUCCESS;\n+\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n+\tstruct rte_eth_dev *dev = ((struct i40e_adapter *)hw->back)->eth_dev;\n+\n+\tif (pf->support_multi_driver) {\n+\t\tPMD_DRV_LOG(ERR, \"Replace l1 filter is not supported.\");\n+\t\treturn I40E_NOT_SUPPORTED;\n+\t}\n+\n+\tmemset(&filter_replace, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd));\n+\tmemset(&filter_replace_buf, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));\n+\n+\t/* create L1 filter */\n+\tif (l4_port_type == I40E_L4_PORT_TYPE_SRC) {\n+\t\tfilter_replace.old_filter_type =\n+\t\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TUNNLE_KEY;\n+\t\tfilter_replace.new_filter_type = I40E_AQC_ADD_L1_FILTER_0X11;\n+\t\tfilter_replace_buf.data[8] =\n+\t\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_SRC_PORT;\n+\t} else {\n+\t\tfilter_replace.old_filter_type =\n+\t\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_IVLAN;\n+\t\tfilter_replace.new_filter_type = I40E_AQC_ADD_L1_FILTER_0X10;\n+\t\tfilter_replace_buf.data[8] =\n+\t\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_DST_PORT;\n+\t}\n+\n+\tfilter_replace.tr_bit = 0;\n+\t/* Prepare the buffer, 3 entries */\n+\tfilter_replace_buf.data[0] =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_DIRECTION_WORD0;\n+\tfilter_replace_buf.data[0] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[2] = 0x00;\n+\tfilter_replace_buf.data[3] =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_INGRESS_WORD0;\n+\tfilter_replace_buf.data[4] =\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_PORT_TR_WORD0;\n+\tfilter_replace_buf.data[4] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[5] = 0x00;\n+\tfilter_replace_buf.data[6] = I40E_TR_L4_TYPE_UDP |\n+\t\tI40E_TR_L4_TYPE_TCP |\n+\t\tI40E_TR_L4_TYPE_SCTP;\n+\tfilter_replace_buf.data[7] = 0x00;\n+\tfilter_replace_buf.data[8] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[9] = 0x00;\n+\tfilter_replace_buf.data[10] = 0xFF;\n+\tfilter_replace_buf.data[11] = 0xFF;\n+\n+\tstatus = i40e_aq_replace_cloud_filters(hw, &filter_replace,\n+\t\t\t\t\t &filter_replace_buf);\n+\tif (!status && filter_replace.old_filter_type !=\n+\t filter_replace.new_filter_type)\n+\t\tPMD_DRV_LOG(WARNING, \"i40e device %s changed cloud l1 type.\"\n+\t\t\t \" original: 0x%x, new: 0x%x\",\n+\t\t\t dev->device->name,\n+\t\t\t filter_replace.old_filter_type,\n+\t\t\t filter_replace.new_filter_type);\n+\n+\treturn status;\n+}\n+\n+static enum i40e_status_code\n+i40e_replace_port_cloud_filter(struct i40e_pf *pf,\n+\t\t\t enum i40e_l4_port_type l4_port_type)\n+{\n+\tstruct i40e_aqc_replace_cloud_filters_cmd_buf filter_replace_buf;\n+\tstruct i40e_aqc_replace_cloud_filters_cmd filter_replace;\n+\tenum i40e_status_code status = I40E_SUCCESS;\n+\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n+\tstruct rte_eth_dev *dev = ((struct i40e_adapter *)hw->back)->eth_dev;\n+\n+\tif (pf->support_multi_driver) {\n+\t\tPMD_DRV_LOG(ERR, \"Replace cloud filter is not supported.\");\n+\t\treturn I40E_NOT_SUPPORTED;\n+\t}\n+\n+\tmemset(&filter_replace, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd));\n+\tmemset(&filter_replace_buf, 0,\n+\t sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf));\n+\n+\tif (l4_port_type == I40E_L4_PORT_TYPE_SRC) {\n+\t\tfilter_replace.old_filter_type = I40E_AQC_ADD_CLOUD_FILTER_IIP;\n+\t\tfilter_replace.new_filter_type =\n+\t\t\tI40E_AQC_ADD_L1_FILTER_0X11;\n+\t\tfilter_replace_buf.data[4] = I40E_AQC_ADD_CLOUD_FILTER_0X11;\n+\t} else {\n+\t\tfilter_replace.old_filter_type = I40E_AQC_ADD_CLOUD_FILTER_OIP;\n+\t\tfilter_replace.new_filter_type =\n+\t\t\tI40E_AQC_ADD_CLOUD_FILTER_0X10;\n+\t\tfilter_replace_buf.data[4] = I40E_AQC_ADD_CLOUD_FILTER_0X10;\n+\t}\n+\n+\tfilter_replace.valid_flags = I40E_AQC_REPLACE_CLOUD_FILTER;\n+\tfilter_replace.tr_bit = 0;\n+\t/* Prepare the buffer, 2 entries */\n+\tfilter_replace_buf.data[0] = I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG;\n+\tfilter_replace_buf.data[0] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tfilter_replace_buf.data[4] |=\n+\t\tI40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED;\n+\tstatus = i40e_aq_replace_cloud_filters(hw, &filter_replace,\n+\t\t\t\t\t &filter_replace_buf);\n+\n+\tif (!status && filter_replace.old_filter_type !=\n+\t filter_replace.new_filter_type)\n+\t\tPMD_DRV_LOG(WARNING, \"i40e device %s changed cloud filter type.\"\n+\t\t\t \" original: 0x%x, new: 0x%x\",\n+\t\t\t dev->device->name,\n+\t\t\t filter_replace.old_filter_type,\n+\t\t\t filter_replace.new_filter_type);\n+\n+\treturn status;\n+}\n+\n int\n i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,\n \t\t struct i40e_tunnel_filter_conf *tunnel_filter,\n@@ -8389,6 +8522,62 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,\n \t\tpfilter->general_fields[0] = tunnel_filter->inner_vlan;\n \t\tpfilter->general_fields[1] = tunnel_filter->outer_vlan;\n \t\tbig_buffer = 1;\n+\t\tbreak;\n+\tcase I40E_CLOUD_TYPE_UDP:\n+\tcase I40E_CLOUD_TYPE_TCP:\n+\tcase I40E_CLOUD_TYPE_SCTP:\n+\t\tif (tunnel_filter->l4_port_type == I40E_L4_PORT_TYPE_SRC) {\n+\t\t\tif (!pf->sport_replace_flag) {\n+\t\t\t\ti40e_replace_port_l1_filter(pf,\n+\t\t\t\t\t\ttunnel_filter->l4_port_type);\n+\t\t\t\ti40e_replace_port_cloud_filter(pf,\n+\t\t\t\t\t\ttunnel_filter->l4_port_type);\n+\t\t\t\tpf->sport_replace_flag = 1;\n+\t\t\t}\n+\t\t\tteid_le = rte_cpu_to_le_32(tunnel_filter->tenant_id);\n+\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD0] =\n+\t\t\t\tI40E_DIRECTION_INGRESS_KEY;\n+\n+\t\t\tif (tunnel_filter->tunnel_type == I40E_CLOUD_TYPE_UDP)\n+\t\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1] =\n+\t\t\t\t\tI40E_TR_L4_TYPE_UDP;\n+\t\t\telse if (tunnel_filter->tunnel_type == I40E_CLOUD_TYPE_TCP)\n+\t\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1] =\n+\t\t\t\t\tI40E_TR_L4_TYPE_TCP;\n+\t\t\telse\n+\t\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1] =\n+\t\t\t\t\tI40E_TR_L4_TYPE_SCTP;\n+\n+\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD2] =\n+\t\t\t\t(teid_le >> 16) & 0xFFFF;\n+\t\t\tbig_buffer = 1;\n+\t\t} else {\n+\t\t\tif (!pf->dport_replace_flag) {\n+\t\t\t\ti40e_replace_port_l1_filter(pf,\n+\t\t\t\t\t\ttunnel_filter->l4_port_type);\n+\t\t\t\ti40e_replace_port_cloud_filter(pf,\n+\t\t\t\t\t\ttunnel_filter->l4_port_type);\n+\t\t\t\tpf->dport_replace_flag = 1;\n+\t\t\t}\n+\t\t\tteid_le = rte_cpu_to_le_32(tunnel_filter->tenant_id);\n+\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD0] =\n+\t\t\t\tI40E_DIRECTION_INGRESS_KEY;\n+\n+\t\t\tif (tunnel_filter->tunnel_type == I40E_CLOUD_TYPE_UDP)\n+\t\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD1] =\n+\t\t\t\t\tI40E_TR_L4_TYPE_UDP;\n+\t\t\telse if (tunnel_filter->tunnel_type == I40E_CLOUD_TYPE_TCP)\n+\t\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD1] =\n+\t\t\t\t\tI40E_TR_L4_TYPE_TCP;\n+\t\t\telse\n+\t\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD1] =\n+\t\t\t\t\tI40E_TR_L4_TYPE_SCTP;\n+\n+\t\t\tpfilter->general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD2] =\n+\t\t\t\t(teid_le >> 16) & 0xFFFF;\n+\t\t\tbig_buffer = 1;\n+\t\t}\n+\n \t\tbreak;\n \tdefault:\n \t\t/* Other tunnel types is not supported. */\n@@ -8412,7 +8601,16 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,\n \telse if (tunnel_filter->tunnel_type == I40E_TUNNEL_TYPE_QINQ)\n \t\tpfilter->element.flags |=\n \t\t\tI40E_AQC_ADD_CLOUD_FILTER_0X10;\n-\telse {\n+\telse if (tunnel_filter->tunnel_type == I40E_CLOUD_TYPE_UDP ||\n+\t\t tunnel_filter->tunnel_type == I40E_CLOUD_TYPE_TCP ||\n+\t\t tunnel_filter->tunnel_type == I40E_CLOUD_TYPE_SCTP) {\n+\t\tif (tunnel_filter->l4_port_type == I40E_L4_PORT_TYPE_SRC)\n+\t\t\tpfilter->element.flags |=\n+\t\t\t\tI40E_AQC_ADD_L1_FILTER_0X11;\n+\t\telse\n+\t\t\tpfilter->element.flags |=\n+\t\t\t\tI40E_AQC_ADD_CLOUD_FILTER_0X10;\n+\t} else {\n \t\tval = i40e_dev_get_filter_type(tunnel_filter->filter_type,\n \t\t\t\t\t\t&pfilter->element.flags);\n \t\tif (val < 0) {\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex e5d0ce53f..53e737b39 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -767,11 +767,14 @@ struct i40e_rss_pattern_info {\n \n #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD0 44\n #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD1 45\n+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_SRC_PORT 29\n+#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_DST_PORT 30\n #define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSOUDP\t8\n #define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSOGRE\t9\n #define I40E_AQC_ADD_CLOUD_FILTER_0X10\t\t0x10\n #define I40E_AQC_ADD_CLOUD_FILTER_0X11\t\t0x11\n #define I40E_AQC_ADD_CLOUD_FILTER_0X12\t\t0x12\n+#define I40E_AQC_ADD_L1_FILTER_0X10\t\t0x10\n #define I40E_AQC_ADD_L1_FILTER_0X11\t\t0x11\n #define I40E_AQC_ADD_L1_FILTER_0X12\t\t0x12\n #define I40E_AQC_ADD_L1_FILTER_0X13\t\t0x13\n@@ -828,9 +831,20 @@ enum i40e_tunnel_type {\n \tI40E_TUNNEL_TYPE_GTPU,\n \tI40E_TUNNEL_TYPE_ESPoUDP,\n \tI40E_TUNNEL_TYPE_ESPoIP,\n+\tI40E_CLOUD_TYPE_UDP,\n+\tI40E_CLOUD_TYPE_TCP,\n+\tI40E_CLOUD_TYPE_SCTP,\n \tI40E_TUNNEL_TYPE_MAX,\n };\n \n+/**\n+ * L4 port type.\n+ */\n+enum i40e_l4_port_type {\n+\tI40E_L4_PORT_TYPE_SRC = 0,\n+\tI40E_L4_PORT_TYPE_DST,\n+};\n+\n /**\n * Tunneling Packet filter configuration.\n */\n@@ -852,6 +866,7 @@ struct i40e_tunnel_filter_conf {\n \t/** Flags from ETH_TUNNEL_FILTER_XX - see above. */\n \tuint16_t filter_type;\n \tenum i40e_tunnel_type tunnel_type; /**< Tunnel Type. */\n+\tenum i40e_l4_port_type l4_port_type; /**< L4 Port Type. */\n \tuint32_t tenant_id; /**< Tenant ID to match. VNI, GRE key... */\n \tuint16_t queue_id; /**< Queue assigned to if match. */\n \tuint8_t is_to_vf; /**< 0 - to PF, 1 - to VF */\n@@ -1073,6 +1088,9 @@ struct i40e_pf {\n \tbool mpls_replace_flag; /* 1 - MPLS filter replace is done */\n \tbool gtp_replace_flag; /* 1 - GTP-C/U filter replace is done */\n \tbool qinq_replace_flag; /* QINQ filter replace is done */\n+\t/* l4 port flag */\n+\tbool sport_replace_flag; /* source port replace is done */\n+\tbool dport_replace_flag; /* dest port replace is done */\n \tstruct i40e_tm_conf tm_conf;\n \tbool support_multi_driver; /* 1 - support multiple driver */\n \ndiff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c\nindex 8f8df6fae..0904c063c 100644\n--- a/drivers/net/i40e/i40e_flow.c\n+++ b/drivers/net/i40e/i40e_flow.c\n@@ -124,6 +124,12 @@ i40e_flow_parse_qinq_pattern(struct rte_eth_dev *dev,\n \t\t\t struct rte_flow_error *error,\n \t\t\t struct i40e_tunnel_filter_conf *filter);\n \n+static int i40e_flow_parse_l4_proto_filter(struct rte_eth_dev *dev,\n+\t\t\t\t\t const struct rte_flow_attr *attr,\n+\t\t\t\t\t const struct rte_flow_item pattern[],\n+\t\t\t\t\t const struct rte_flow_action actions[],\n+\t\t\t\t\t struct rte_flow_error *error,\n+\t\t\t\t\t union i40e_filter_t *filter);\n const struct rte_flow_ops i40e_flow_ops = {\n \t.validate = i40e_flow_validate,\n \t.create = i40e_flow_create,\n@@ -1845,6 +1851,13 @@ static struct i40e_valid_pattern i40e_supported_patterns[] = {\n \t/* L2TPv3 over IP */\n \t{ pattern_fdir_ipv4_l2tpv3oip, i40e_flow_parse_fdir_filter },\n \t{ pattern_fdir_ipv6_l2tpv3oip, i40e_flow_parse_fdir_filter },\n+\t/* L4 over port */\n+\t{ pattern_fdir_ipv4_udp, i40e_flow_parse_l4_proto_filter },\n+\t{ pattern_fdir_ipv4_tcp, i40e_flow_parse_l4_proto_filter },\n+\t{ pattern_fdir_ipv4_sctp, i40e_flow_parse_l4_proto_filter },\n+\t{ pattern_fdir_ipv6_udp, i40e_flow_parse_l4_proto_filter },\n+\t{ pattern_fdir_ipv6_tcp, i40e_flow_parse_l4_proto_filter },\n+\t{ pattern_fdir_ipv6_sctp, i40e_flow_parse_l4_proto_filter },\n };\n \n #define NEXT_ITEM_OF_ACTION(act, actions, index) \\\n@@ -3541,6 +3554,216 @@ i40e_flow_parse_tunnel_action(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+static int\n+i40e_flow_parse_l4_proto_pattern(const struct rte_flow_item *pattern,\n+\t\t\t\t struct rte_flow_error *error,\n+\t\t\t\t struct i40e_tunnel_filter_conf *filter)\n+{\n+\tconst struct rte_flow_item_sctp *sctp_spec, *sctp_mask;\n+\tconst struct rte_flow_item_tcp *tcp_spec, *tcp_mask;\n+\tconst struct rte_flow_item_udp *udp_spec, *udp_mask;\n+\tconst struct rte_flow_item *item = pattern;\n+\tenum rte_flow_item_type item_type;\n+\n+\tfor (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {\n+\t\tif (item->last) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t item,\n+\t\t\t\t\t \"Not support range\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\titem_type = item->type;\n+\t\tswitch (item_type) {\n+\t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n+\t\t\tif (item->spec || item->mask) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid ETH item\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_IPV4:\n+\t\t\tfilter->ip_type = I40E_TUNNEL_IPTYPE_IPV4;\n+\t\t\t/* IPv4 is used to describe protocol,\n+\t\t\t * spec and mask should be NULL.\n+\t\t\t */\n+\t\t\tif (item->spec || item->mask) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid IPv4 item\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_IPV6:\n+\t\t\tfilter->ip_type = I40E_TUNNEL_IPTYPE_IPV6;\n+\t\t\t/* IPv6 is used to describe protocol,\n+\t\t\t * spec and mask should be NULL.\n+\t\t\t */\n+\t\t\tif (item->spec || item->mask) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid IPv6 item\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_UDP:\n+\t\t\tudp_spec = item->spec;\n+\t\t\tudp_mask = item->mask;\n+\n+\t\t\tif (!udp_spec || !udp_mask) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid udp item\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (udp_spec->hdr.src_port != 0 &&\n+\t\t\t udp_spec->hdr.dst_port != 0) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid udp spec\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (udp_spec->hdr.src_port != 0) {\n+\t\t\t\tfilter->l4_port_type =\n+\t\t\t\t\tI40E_L4_PORT_TYPE_SRC;\n+\t\t\t\tfilter->tenant_id =\n+\t\t\t\trte_be_to_cpu_32(udp_spec->hdr.src_port);\n+\t\t\t}\n+\n+\t\t\tif (udp_spec->hdr.dst_port != 0) {\n+\t\t\t\tfilter->l4_port_type =\n+\t\t\t\t\tI40E_L4_PORT_TYPE_DST;\n+\t\t\t\tfilter->tenant_id =\n+\t\t\t\trte_be_to_cpu_32(udp_spec->hdr.dst_port);\n+\t\t\t}\n+\n+\t\t\tfilter->tunnel_type = I40E_CLOUD_TYPE_UDP;\n+\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_TCP:\n+\t\t\ttcp_spec = item->spec;\n+\t\t\ttcp_mask = item->mask;\n+\n+\t\t\tif (!tcp_spec || !tcp_mask) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid tcp item\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (tcp_spec->hdr.src_port != 0 &&\n+\t\t\t tcp_spec->hdr.dst_port != 0) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid tcp spec\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (tcp_spec->hdr.src_port != 0) {\n+\t\t\t\tfilter->l4_port_type =\n+\t\t\t\t\tI40E_L4_PORT_TYPE_SRC;\n+\t\t\t\tfilter->tenant_id =\n+\t\t\t\trte_be_to_cpu_32(tcp_spec->hdr.src_port);\n+\t\t\t}\n+\n+\t\t\tif (tcp_spec->hdr.dst_port != 0) {\n+\t\t\t\tfilter->l4_port_type =\n+\t\t\t\t\tI40E_L4_PORT_TYPE_DST;\n+\t\t\t\tfilter->tenant_id =\n+\t\t\t\trte_be_to_cpu_32(tcp_spec->hdr.dst_port);\n+\t\t\t}\n+\n+\t\t\tfilter->tunnel_type = I40E_CLOUD_TYPE_TCP;\n+\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_SCTP:\n+\t\t\tsctp_spec = item->spec;\n+\t\t\tsctp_mask = item->mask;\n+\n+\t\t\tif (!sctp_spec || !sctp_mask) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid sctp item\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (sctp_spec->hdr.src_port != 0 &&\n+\t\t\t sctp_spec->hdr.dst_port != 0) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid sctp spec\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\n+\t\t\tif (sctp_spec->hdr.src_port != 0) {\n+\t\t\t\tfilter->l4_port_type =\n+\t\t\t\t\tI40E_L4_PORT_TYPE_SRC;\n+\t\t\t\tfilter->tenant_id =\n+\t\t\t\t\trte_be_to_cpu_32(sctp_spec->hdr.src_port);\n+\t\t\t}\n+\n+\t\t\tif (sctp_spec->hdr.dst_port != 0) {\n+\t\t\t\tfilter->l4_port_type =\n+\t\t\t\t\tI40E_L4_PORT_TYPE_DST;\n+\t\t\t\tfilter->tenant_id =\n+\t\t\t\t\trte_be_to_cpu_32(sctp_spec->hdr.dst_port);\n+\t\t\t}\n+\n+\t\t\tfilter->tunnel_type = I40E_CLOUD_TYPE_SCTP;\n+\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+i40e_flow_parse_l4_proto_filter(struct rte_eth_dev *dev,\n+\t\t\t\tconst struct rte_flow_attr *attr,\n+\t\t\t\tconst struct rte_flow_item pattern[],\n+\t\t\t\tconst struct rte_flow_action actions[],\n+\t\t\t\tstruct rte_flow_error *error,\n+\t\t\t\tunion i40e_filter_t *filter)\n+{\n+\tstruct i40e_tunnel_filter_conf *tunnel_filter =\n+\t\t&filter->consistent_tunnel_filter;\n+\tint ret;\n+\n+\tret = i40e_flow_parse_l4_proto_pattern(pattern, error, tunnel_filter);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tret = i40e_flow_parse_tunnel_action(dev, actions, error, tunnel_filter);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tret = i40e_flow_parse_attr(attr, error);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tcons_filter_type = RTE_ETH_FILTER_TUNNEL;\n+\n+\treturn ret;\n+}\n+\n static uint16_t i40e_supported_tunnel_filter_types[] = {\n \tETH_TUNNEL_FILTER_IMAC | ETH_TUNNEL_FILTER_TENID |\n \tETH_TUNNEL_FILTER_IVLAN,\n", "prefixes": [ "v3" ] }