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GET /api/patches/7296/?format=api
{ "id": 7296, "url": "https://patches.dpdk.org/api/patches/7296/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1443604567-24875-1-git-send-email-andrey.chilikin@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1443604567-24875-1-git-send-email-andrey.chilikin@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1443604567-24875-1-git-send-email-andrey.chilikin@intel.com", "date": "2015-09-30T09:16:07", "name": "[dpdk-dev] i40e: fix for default flexible payload registers settings", "commit_ref": null, "pull_url": null, "state": "rejected", "archived": true, "hash": "35dad88cd16f5fbe04a471a264a80d6e3b826d69", "submitter": { "id": 94, "url": "https://patches.dpdk.org/api/people/94/?format=api", "name": "Chilikin, Andrey", "email": "andrey.chilikin@intel.com" }, "delegate": { "id": 10, "url": "https://patches.dpdk.org/api/users/10/?format=api", "username": "bruce", "first_name": "Bruce", "last_name": "Richardson", "email": "bruce.richardson@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1443604567-24875-1-git-send-email-andrey.chilikin@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/7296/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/7296/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 7F14C8DA1;\n\tWed, 30 Sep 2015 11:16:15 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id 22DB78D90\n\tfor <dev@dpdk.org>; Wed, 30 Sep 2015 11:16:12 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga102.fm.intel.com with ESMTP; 30 Sep 2015 02:16:14 -0700", "from irvmail001.ir.intel.com ([163.33.26.43])\n\tby fmsmga002.fm.intel.com with ESMTP; 30 Sep 2015 02:16:11 -0700", "from sivswdev02.ir.intel.com (sivswdev02.ir.intel.com\n\t[10.237.217.46])\n\tby irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n\tt8U9GAgY007768; Wed, 30 Sep 2015 10:16:10 +0100", "from sivswdev02.ir.intel.com (localhost [127.0.0.1])\n\tby sivswdev02.ir.intel.com with ESMTP id t8U9GAqL024914;\n\tWed, 30 Sep 2015 10:16:10 +0100", "(from achiliki@localhost)\n\tby sivswdev02.ir.intel.com with id t8U9GA3i024910;\n\tWed, 30 Sep 2015 10:16:10 +0100" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.17,611,1437462000\"; d=\"scan'208\";a=\"816054665\"", "From": "Andrey Chilikin <andrey.chilikin@intel.com>", "To": "dev@dpdk.org", "Date": "Wed, 30 Sep 2015 10:16:07 +0100", "Message-Id": "<1443604567-24875-1-git-send-email-andrey.chilikin@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "Subject": "[dpdk-dev] [PATCH] i40e: fix for default flexible payload registers\n\tsettings", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch applies new default values to flexible payload configuration for flow director filter\n\nSigned-off-by: Andrey Chilikin <andrey.chilikin@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 6 +++---\n drivers/net/i40e/i40e_fdir.c | 20 +++++++++++++++-----\n 2 files changed, 18 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 2dd9fdc..0c3b532 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -370,9 +370,9 @@ static inline void i40e_flex_payload_reg_init(struct i40e_hw *hw)\n \tI40E_WRITE_REG(hw, I40E_GLQF_ORT(19), 0x00000030);\n \tI40E_WRITE_REG(hw, I40E_GLQF_ORT(26), 0x0000002B);\n \tI40E_WRITE_REG(hw, I40E_GLQF_ORT(30), 0x0000002B);\n-\tI40E_WRITE_REG(hw, I40E_GLQF_ORT(33), 0x000000E0);\n-\tI40E_WRITE_REG(hw, I40E_GLQF_ORT(34), 0x000000E3);\n-\tI40E_WRITE_REG(hw, I40E_GLQF_ORT(35), 0x000000E6);\n+\tI40E_WRITE_REG(hw, I40E_GLQF_ORT(33), 0x000000A0);\n+\tI40E_WRITE_REG(hw, I40E_GLQF_ORT(34), 0x000000A3);\n+\tI40E_WRITE_REG(hw, I40E_GLQF_ORT(35), 0x000000A6);\n \tI40E_WRITE_REG(hw, I40E_GLQF_ORT(20), 0x00000031);\n \tI40E_WRITE_REG(hw, I40E_GLQF_ORT(23), 0x00000031);\n \tI40E_WRITE_REG(hw, I40E_GLQF_ORT(63), 0x0000002D);\ndiff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c\nindex c9ce98f..8f27694 100644\n--- a/drivers/net/i40e/i40e_fdir.c\n+++ b/drivers/net/i40e/i40e_fdir.c\n@@ -483,13 +483,14 @@ i40e_check_fdir_flex_conf(const struct rte_eth_fdir_flex_conf *conf)\n \t\treturn -EINVAL;\n \t}\n \t/* check flexible payload setting configuration */\n-\tif (conf->nb_payloads > RTE_ETH_L4_PAYLOAD) {\n+\tif (conf->nb_payloads > I40E_MAX_FLXPLD_LAYER) {\n \t\tPMD_DRV_LOG(ERR, \"invalid number of payload setting.\");\n \t\treturn -EINVAL;\n \t}\n \tfor (i = 0; i < conf->nb_payloads; i++) {\n \t\tflex_cfg = &conf->flex_set[i];\n-\t\tif (flex_cfg->type > RTE_ETH_L4_PAYLOAD) {\n+\t\tif (flex_cfg->type < RTE_ETH_L2_PAYLOAD ||\n+\t\t\tflex_cfg->type > RTE_ETH_L4_PAYLOAD) {\n \t\t\tPMD_DRV_LOG(ERR, \"invalid payload type.\");\n \t\t\treturn -EINVAL;\n \t\t}\n@@ -528,6 +529,10 @@ i40e_check_fdir_flex_conf(const struct rte_eth_fdir_flex_conf *conf)\n \treturn 0;\n }\n \n+#ifndef I40E_GLQF_ORT\n+#define I40E_GLQF_ORT(_i) (0x00268900 + ((_i) * 4))\n+#endif\n+\n /*\n * i40e_set_flx_pld_cfg -configure the rule how bytes stream is extracted as flexible payload\n * @pf: board private structure\n@@ -539,7 +544,7 @@ i40e_set_flx_pld_cfg(struct i40e_pf *pf,\n {\n \tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n \tstruct i40e_fdir_flex_pit flex_pit[I40E_MAX_FLXPLD_FIED];\n-\tuint32_t flx_pit;\n+\tuint32_t ort, flx_pit;\n \tuint16_t num, min_next_off; /* in words */\n \tuint8_t field_idx = 0;\n \tuint8_t layer_idx = 0;\n@@ -554,8 +559,9 @@ i40e_set_flx_pld_cfg(struct i40e_pf *pf,\n \n \tmemset(flex_pit, 0, sizeof(flex_pit));\n \tnum = i40e_srcoff_to_flx_pit(cfg->src_offset, flex_pit);\n+\tnum = RTE_MIN(num, RTE_DIM(flex_pit));\n \n-\tfor (i = 0; i < RTE_MIN(num, RTE_DIM(flex_pit)); i++) {\n+\tfor (i = 0; i < num; i++) {\n \t\tfield_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i;\n \t\t/* record the info in fdir structure */\n \t\tpf->fdir.flex_set[field_idx].src_offset =\n@@ -576,12 +582,16 @@ i40e_set_flx_pld_cfg(struct i40e_pf *pf,\n \tfor (; i < I40E_MAX_FLXPLD_FIED; i++) {\n \t\t/* set the non-used register obeying register's constrain */\n \t\tflx_pit = MK_FLX_PIT(min_next_off, NONUSE_FLX_PIT_FSIZE,\n-\t\t\t NONUSE_FLX_PIT_DEST_OFF);\n+\t\t\t NONUSE_FLX_PIT_DEST_OFF -\n+\t\t\t I40E_FLX_OFFSET_IN_FIELD_VECTOR);\n \t\tI40E_WRITE_REG(hw,\n \t\t\tI40E_PRTQF_FLX_PIT(layer_idx * I40E_MAX_FLXPLD_FIED + i),\n \t\t\tflx_pit);\n \t\tmin_next_off++;\n \t}\n+\n+\tort = 0x80 | (num << 5) | layer_idx * I40E_MAX_FLXPLD_FIED;\n+\tI40E_WRITE_REG(hw, I40E_GLQF_ORT(layer_idx + 33), ort);\n }\n \n /*\n", "prefixes": [ "dpdk-dev" ] }