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GET /api/patches/72547/?format=api
{ "id": 72547, "url": "https://patches.dpdk.org/api/patches/72547/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200701065212.41391-25-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200701065212.41391-25-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200701065212.41391-25-ajit.khaparde@broadcom.com", "date": "2020-07-01T06:51:45", "name": "[v2,24/51] net/bnxt: update RM to support HCAPI only", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "0a44382bedb68ef6774c3cdb9c4a445502bdac31", "submitter": { "id": 501, "url": "https://patches.dpdk.org/api/people/501/?format=api", "name": "Ajit Khaparde", "email": "ajit.khaparde@broadcom.com" }, "delegate": { "id": 1766, "url": "https://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200701065212.41391-25-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 10703, "url": "https://patches.dpdk.org/api/series/10703/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10703", "date": "2020-07-01T06:51:22", "name": "add features for host-based flow management", "version": 2, "mbox": "https://patches.dpdk.org/series/10703/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/72547/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/72547/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C7A5BA0350;\n\tWed, 1 Jul 2020 08:58:12 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 45F361D171;\n\tWed, 1 Jul 2020 08:52:54 +0200 (CEST)", "from rnd-relay.smtp.broadcom.com (rnd-relay.smtp.broadcom.com\n [192.19.229.170]) by dpdk.org (Postfix) with ESMTP id 47CF91BFA9\n for <dev@dpdk.org>; Wed, 1 Jul 2020 08:52:26 +0200 (CEST)", "from mail-irv-17.broadcom.com (mail-irv-17.lvn.broadcom.net\n [10.75.242.48])\n by rnd-relay.smtp.broadcom.com (Postfix) with ESMTP id 4878030C32A;\n Tue, 30 Jun 2020 23:52:25 -0700 (PDT)", "from localhost.localdomain (unknown [10.230.185.215])\n by mail-irv-17.broadcom.com (Postfix) with ESMTP id B1EF7140069;\n Tue, 30 Jun 2020 23:52:24 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.10.3 rnd-relay.smtp.broadcom.com 4878030C32A", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1593586345;\n bh=wIowRKXjPO7E4WElNB4qo+lqIGHisC+wlbIvGYsCRw8=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=faVBYRHsfjJDGbudEJzjlLzNhWLx2wmdIxpJVWbNxes6YMUR0Q3X2PZ2/JzXNmGsb\n gYYkpIlYNpcXwPE6DESZV5qzC1P1iUPVBBEKuljZClqsMMJ8pvpJPlpVKmWoZJ6173\n TTToJs/8jp4n7es2YIeJypN9Qx5S6Heg3i2vpAHQ=", "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Peter Spreadborough <peter.spreadborough@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>,\n Randy Schacher <stuart.schacher@broadcom.com>", "Date": "Tue, 30 Jun 2020 23:51:45 -0700", "Message-Id": "<20200701065212.41391-25-ajit.khaparde@broadcom.com>", "X-Mailer": "git-send-email 2.21.1 (Apple Git-122.3)", "In-Reply-To": "<20200701065212.41391-1-ajit.khaparde@broadcom.com>", "References": "<20200612132934.16488-1-somnath.kotur@broadcom.com>\n <20200701065212.41391-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 24/51] net/bnxt: update RM to support HCAPI\n\tonly", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Peter Spreadborough <peter.spreadborough@broadcom.com>\n\n- For the EM Module there is a need to only allocate the EM Records in\n HCAPI RM but the storage control is requested to be outside of the RM DB.\n- Add TF_RM_ELEM_CFG_HCAPI_BA.\n- Return error when the number of reserved entries for wc tcam is odd\n number in tf_tcam_bind.\n- Remove em_pool from session\n- Use RM provided start offset and size\n- HCAPI returns entry index instead of row index for WC TCAM.\n- Move resource type conversion to hrwm set/free tcam functions.\n\nSigned-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\nReviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/tf_core/tf_device_p4.c | 2 +\n drivers/net/bnxt/tf_core/tf_device_p4.h | 54 ++++-----\n drivers/net/bnxt/tf_core/tf_em_internal.c | 131 ++++++++++++++--------\n drivers/net/bnxt/tf_core/tf_msg.c | 6 +-\n drivers/net/bnxt/tf_core/tf_rm.c | 81 ++++++-------\n drivers/net/bnxt/tf_core/tf_rm.h | 14 ++-\n drivers/net/bnxt/tf_core/tf_session.h | 5 -\n drivers/net/bnxt/tf_core/tf_tcam.c | 21 ++++\n 8 files changed, 190 insertions(+), 124 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c\nindex e3526672f..1eaf18212 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.c\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.c\n@@ -68,6 +68,8 @@ tf_dev_p4_get_tcam_slice_info(struct tf *tfp __rte_unused,\n \t\t*num_slices_per_row = CFA_P4_WC_TCAM_SLICES_PER_ROW;\n \t\tif (key_sz > *num_slices_per_row * CFA_P4_WC_TCAM_SLICE_SIZE)\n \t\t\treturn -ENOTSUP;\n+\n+\t\t*num_slices_per_row = 1;\n \t} else { /* for other type of tcam */\n \t\t*num_slices_per_row = 1;\n \t}\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h\nindex 473e4eae5..8fae18012 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.h\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.h\n@@ -12,19 +12,19 @@\n #include \"tf_rm.h\"\n \n struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_PROF_FUNC },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_PROF_ID },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_FUNC },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_EM_PROF_ID },\n \t/* CFA_RESOURCE_TYPE_P4_L2_FUNC */\n \t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }\n };\n \n struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_PROF_TCAM },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_WC_TCAM },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SP_TCAM },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_PROF_TCAM },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_WC_TCAM },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_TCAM },\n \t/* CFA_RESOURCE_TYPE_P4_CT_RULE_TCAM */\n \t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n \t/* CFA_RESOURCE_TYPE_P4_VEB_TCAM */\n@@ -32,26 +32,26 @@ struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {\n };\n \n struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = {\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_FULL_ACTION },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_MCG },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_ENCAP_8B },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_ENCAP_16B },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B },\n \t/* CFA_RESOURCE_TYPE_P4_ENCAP_32B */\n \t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_ENCAP_64B },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SP_MAC },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_COUNTER_64B },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_SPORT },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_DPORT },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_S_IPV4 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_D_IPV4 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_S_IPV6 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_NAT_D_IPV6 },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_METER_PROF },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_METER },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_MIRROR },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_SPORT },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_DPORT },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_S_IPV4 },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_D_IPV4 },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_S_IPV6 },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_D_IPV6 },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR },\n \t/* CFA_RESOURCE_TYPE_P4_UPAR */\n \t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n \t/* CFA_RESOURCE_TYPE_P4_EPOC */\n@@ -79,7 +79,7 @@ struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = {\n struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = {\n \t/* CFA_RESOURCE_TYPE_P4_EM_REC */\n \t{ TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },\n-\t{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_TBL_SCOPE },\n+\t{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE },\n };\n \n struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = {\ndiff --git a/drivers/net/bnxt/tf_core/tf_em_internal.c b/drivers/net/bnxt/tf_core/tf_em_internal.c\nindex 1c514747d..3129fbe31 100644\n--- a/drivers/net/bnxt/tf_core/tf_em_internal.c\n+++ b/drivers/net/bnxt/tf_core/tf_em_internal.c\n@@ -23,20 +23,28 @@\n */\n static void *em_db[TF_DIR_MAX];\n \n+#define TF_EM_DB_EM_REC 0\n+\n /**\n * Init flag, set on bind and cleared on unbind\n */\n static uint8_t init;\n \n+\n+/**\n+ * EM Pool\n+ */\n+static struct stack em_pool[TF_DIR_MAX];\n+\n /**\n * Create EM Tbl pool of memory indexes.\n *\n- * [in] session\n- * Pointer to session\n * [in] dir\n * direction\n * [in] num_entries\n * number of entries to write\n+ * [in] start\n+ * starting offset\n *\n * Return:\n * 0 - Success, entry allocated - no search support\n@@ -44,54 +52,66 @@ static uint8_t init;\n * - Failure, entry not allocated, out of resources\n */\n static int\n-tf_create_em_pool(struct tf_session *session,\n-\t\t enum tf_dir dir,\n-\t\t uint32_t num_entries)\n+tf_create_em_pool(enum tf_dir dir,\n+\t\t uint32_t num_entries,\n+\t\t uint32_t start)\n {\n \tstruct tfp_calloc_parms parms;\n \tuint32_t i, j;\n \tint rc = 0;\n-\tstruct stack *pool = &session->em_pool[dir];\n+\tstruct stack *pool = &em_pool[dir];\n \n-\tparms.nitems = num_entries;\n+\t/* Assumes that num_entries has been checked before we get here */\n+\tparms.nitems = num_entries / TF_SESSION_EM_ENTRY_SIZE;\n \tparms.size = sizeof(uint32_t);\n \tparms.alignment = 0;\n \n \trc = tfp_calloc(&parms);\n \n \tif (rc) {\n-\t\tTFP_DRV_LOG(ERR, \"EM pool allocation failure %s\\n\",\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"%s, EM pool allocation failure %s\\n\",\n+\t\t\t tf_dir_2_str(dir),\n \t\t\t strerror(-rc));\n \t\treturn rc;\n \t}\n \n \t/* Create empty stack\n \t */\n-\trc = stack_init(num_entries, (uint32_t *)parms.mem_va, pool);\n+\trc = stack_init(num_entries / TF_SESSION_EM_ENTRY_SIZE,\n+\t\t\t(uint32_t *)parms.mem_va,\n+\t\t\tpool);\n \n \tif (rc) {\n-\t\tTFP_DRV_LOG(ERR, \"EM pool stack init failure %s\\n\",\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"%s, EM pool stack init failure %s\\n\",\n+\t\t\t tf_dir_2_str(dir),\n \t\t\t strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n \t/* Fill pool with indexes\n \t */\n-\tj = num_entries - 1;\n+\tj = start + num_entries - TF_SESSION_EM_ENTRY_SIZE;\n \n-\tfor (i = 0; i < num_entries; i++) {\n+\tfor (i = 0; i < (num_entries / TF_SESSION_EM_ENTRY_SIZE); i++) {\n \t\trc = stack_push(pool, j);\n \t\tif (rc) {\n-\t\t\tTFP_DRV_LOG(ERR, \"EM pool stack push failure %s\\n\",\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t \"%s, EM pool stack push failure %s\\n\",\n+\t\t\t\t tf_dir_2_str(dir),\n \t\t\t\t strerror(-rc));\n \t\t\tgoto cleanup;\n \t\t}\n-\t\tj--;\n+\n+\t\tj -= TF_SESSION_EM_ENTRY_SIZE;\n \t}\n \n \tif (!stack_is_full(pool)) {\n \t\trc = -EINVAL;\n-\t\tTFP_DRV_LOG(ERR, \"EM pool stack failure %s\\n\",\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"%s, EM pool stack failure %s\\n\",\n+\t\t\t tf_dir_2_str(dir),\n \t\t\t strerror(-rc));\n \t\tgoto cleanup;\n \t}\n@@ -105,18 +125,15 @@ tf_create_em_pool(struct tf_session *session,\n /**\n * Create EM Tbl pool of memory indexes.\n *\n- * [in] session\n- * Pointer to session\n * [in] dir\n * direction\n *\n * Return:\n */\n static void\n-tf_free_em_pool(struct tf_session *session,\n-\t\tenum tf_dir dir)\n+tf_free_em_pool(enum tf_dir dir)\n {\n-\tstruct stack *pool = &session->em_pool[dir];\n+\tstruct stack *pool = &em_pool[dir];\n \tuint32_t *ptr;\n \n \tptr = stack_items(pool);\n@@ -140,22 +157,19 @@ tf_em_insert_int_entry(struct tf *tfp,\n \tuint16_t rptr_index = 0;\n \tuint8_t rptr_entry = 0;\n \tuint8_t num_of_entries = 0;\n-\tstruct tf_session *session =\n-\t\t(struct tf_session *)(tfp->session->core_data);\n-\tstruct stack *pool = &session->em_pool[parms->dir];\n+\tstruct stack *pool = &em_pool[parms->dir];\n \tuint32_t index;\n \n \trc = stack_pop(pool, &index);\n \n \tif (rc) {\n-\t\tPMD_DRV_LOG\n-\t\t (ERR,\n-\t\t \"dir:%d, EM entry index allocation failed\\n\",\n-\t\t parms->dir);\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"%s, EM entry index allocation failed\\n\",\n+\t\t\t tf_dir_2_str(parms->dir));\n \t\treturn rc;\n \t}\n \n-\trptr_index = index * TF_SESSION_EM_ENTRY_SIZE;\n+\trptr_index = index;\n \trc = tf_msg_insert_em_internal_entry(tfp,\n \t\t\t\t\t parms,\n \t\t\t\t\t &rptr_index,\n@@ -166,8 +180,9 @@ tf_em_insert_int_entry(struct tf *tfp,\n \n \tPMD_DRV_LOG\n \t\t (ERR,\n-\t\t \"Internal entry @ Index:%d rptr_index:0x%x rptr_entry:0x%x num_of_entries:%d\\n\",\n-\t\t index * TF_SESSION_EM_ENTRY_SIZE,\n+\t\t \"%s, Internal entry @ Index:%d rptr_index:0x%x rptr_entry:0x%x num_of_entries:%d\\n\",\n+\t\t tf_dir_2_str(parms->dir),\n+\t\t index,\n \t\t rptr_index,\n \t\t rptr_entry,\n \t\t num_of_entries);\n@@ -204,15 +219,13 @@ tf_em_delete_int_entry(struct tf *tfp,\n \t\t struct tf_delete_em_entry_parms *parms)\n {\n \tint rc = 0;\n-\tstruct tf_session *session =\n-\t\t(struct tf_session *)(tfp->session->core_data);\n-\tstruct stack *pool = &session->em_pool[parms->dir];\n+\tstruct stack *pool = &em_pool[parms->dir];\n \n \trc = tf_msg_delete_em_entry(tfp, parms);\n \n \t/* Return resource to pool */\n \tif (rc == 0)\n-\t\tstack_push(pool, parms->index / TF_SESSION_EM_ENTRY_SIZE);\n+\t\tstack_push(pool, parms->index);\n \n \treturn rc;\n }\n@@ -224,8 +237,9 @@ tf_em_int_bind(struct tf *tfp,\n \tint rc;\n \tint i;\n \tstruct tf_rm_create_db_parms db_cfg = { 0 };\n-\tstruct tf_session *session;\n \tuint8_t db_exists = 0;\n+\tstruct tf_rm_get_alloc_info_parms iparms;\n+\tstruct tf_rm_alloc_info info;\n \n \tTF_CHECK_PARMS2(tfp, parms);\n \n@@ -235,14 +249,6 @@ tf_em_int_bind(struct tf *tfp,\n \t\treturn -EINVAL;\n \t}\n \n-\tsession = (struct tf_session *)tfp->session->core_data;\n-\n-\tfor (i = 0; i < TF_DIR_MAX; i++) {\n-\t\ttf_create_em_pool(session,\n-\t\t\t\t i,\n-\t\t\t\t TF_SESSION_EM_POOL_SIZE);\n-\t}\n-\n \tdb_cfg.type = TF_DEVICE_MODULE_TYPE_EM;\n \tdb_cfg.num_elements = parms->num_elements;\n \tdb_cfg.cfg = parms->cfg;\n@@ -257,6 +263,18 @@ tf_em_int_bind(struct tf *tfp,\n \t\tif (db_cfg.alloc_cnt[TF_EM_TBL_TYPE_EM_RECORD] == 0)\n \t\t\tcontinue;\n \n+\t\tif (db_cfg.alloc_cnt[TF_EM_TBL_TYPE_EM_RECORD] %\n+\t\t TF_SESSION_EM_ENTRY_SIZE != 0) {\n+\t\t\trc = -ENOMEM;\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t \"%s, EM Allocation must be in blocks of %d, failure %s\\n\",\n+\t\t\t\t tf_dir_2_str(i),\n+\t\t\t\t TF_SESSION_EM_ENTRY_SIZE,\n+\t\t\t\t strerror(-rc));\n+\n+\t\t\treturn rc;\n+\t\t}\n+\n \t\tdb_cfg.rm_db = &em_db[i];\n \t\trc = tf_rm_create_db(tfp, &db_cfg);\n \t\tif (rc) {\n@@ -272,6 +290,28 @@ tf_em_int_bind(struct tf *tfp,\n \tif (db_exists)\n \t\tinit = 1;\n \n+\tfor (i = 0; i < TF_DIR_MAX; i++) {\n+\t\tiparms.rm_db = em_db[i];\n+\t\tiparms.db_index = TF_EM_DB_EM_REC;\n+\t\tiparms.info = &info;\n+\n+\t\trc = tf_rm_get_info(&iparms);\n+\t\tif (rc) {\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t \"%s: EM DB get info failed\\n\",\n+\t\t\t\t tf_dir_2_str(i));\n+\t\t\treturn rc;\n+\t\t}\n+\n+\t\trc = tf_create_em_pool(i,\n+\t\t\t\t iparms.info->entry.stride,\n+\t\t\t\t iparms.info->entry.start);\n+\t\t/* Logging handled in tf_create_em_pool */\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t}\n+\n+\n \treturn 0;\n }\n \n@@ -281,7 +321,6 @@ tf_em_int_unbind(struct tf *tfp)\n \tint rc;\n \tint i;\n \tstruct tf_rm_free_db_parms fparms = { 0 };\n-\tstruct tf_session *session;\n \n \tTF_CHECK_PARMS1(tfp);\n \n@@ -292,10 +331,8 @@ tf_em_int_unbind(struct tf *tfp)\n \t\treturn 0;\n \t}\n \n-\tsession = (struct tf_session *)tfp->session->core_data;\n-\n \tfor (i = 0; i < TF_DIR_MAX; i++)\n-\t\ttf_free_em_pool(session, i);\n+\t\ttf_free_em_pool(i);\n \n \tfor (i = 0; i < TF_DIR_MAX; i++) {\n \t\tfparms.dir = i;\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c\nindex 02d8a4971..7fffb6baf 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.c\n+++ b/drivers/net/bnxt/tf_core/tf_msg.c\n@@ -857,12 +857,12 @@ tf_msg_get_tbl_entry(struct tf *tfp,\n \t\treturn rc;\n \n \t/* Verify that we got enough buffer to return the requested data */\n-\tif (resp.size < size)\n+\tif (tfp_le_to_cpu_32(resp.size) != size)\n \t\treturn -EINVAL;\n \n \ttfp_memcpy(data,\n \t\t &resp.data,\n-\t\t resp.size);\n+\t\t size);\n \n \treturn tfp_le_to_cpu_32(parms.tf_resp_code);\n }\n@@ -919,7 +919,7 @@ tf_msg_bulk_get_tbl_entry(struct tf *tfp,\n \t\treturn rc;\n \n \t/* Verify that we got enough buffer to return the requested data */\n-\tif (resp.size < data_size)\n+\tif (tfp_le_to_cpu_32(resp.size) != data_size)\n \t\treturn -EINVAL;\n \n \treturn tfp_le_to_cpu_32(parms.tf_resp_code);\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c\nindex e0469b653..e7af9eb84 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm.c\n+++ b/drivers/net/bnxt/tf_core/tf_rm.c\n@@ -106,7 +106,8 @@ tf_rm_count_hcapi_reservations(enum tf_dir dir,\n \tuint16_t cnt = 0;\n \n \tfor (i = 0; i < count; i++) {\n-\t\tif (cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI &&\n+\t\tif ((cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI ||\n+\t\t cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) &&\n \t\t reservations[i] > 0)\n \t\t\tcnt++;\n \n@@ -467,7 +468,8 @@ tf_rm_create_db(struct tf *tfp,\n \t/* Build the request */\n \tfor (i = 0, j = 0; i < parms->num_elements; i++) {\n \t\t/* Skip any non HCAPI cfg elements */\n-\t\tif (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI) {\n+\t\tif (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI ||\n+\t\t parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) {\n \t\t\t/* Only perform reservation for entries that\n \t\t\t * has been requested\n \t\t\t */\n@@ -529,7 +531,8 @@ tf_rm_create_db(struct tf *tfp,\n \t\t/* Skip any non HCAPI types as we didn't include them\n \t\t * in the reservation request.\n \t\t */\n-\t\tif (parms->cfg[i].cfg_type != TF_RM_ELEM_CFG_HCAPI)\n+\t\tif (parms->cfg[i].cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n+\t\t parms->cfg[i].cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n \t\t\tcontinue;\n \n \t\t/* If the element didn't request an allocation no need\n@@ -551,29 +554,32 @@ tf_rm_create_db(struct tf *tfp,\n \t\t\t resv[j].start,\n \t\t\t resv[j].stride);\n \n-\t\t\t/* Create pool */\n-\t\t\tpool_size = (BITALLOC_SIZEOF(resv[j].stride) /\n-\t\t\t\t sizeof(struct bitalloc));\n-\t\t\t/* Alloc request, alignment already set */\n-\t\t\tcparms.nitems = pool_size;\n-\t\t\tcparms.size = sizeof(struct bitalloc);\n-\t\t\trc = tfp_calloc(&cparms);\n-\t\t\tif (rc) {\n-\t\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t\t \"%s: Pool alloc failed, type:%d\\n\",\n-\t\t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t\t db[i].cfg_type);\n-\t\t\t\tgoto fail;\n-\t\t\t}\n-\t\t\tdb[i].pool = (struct bitalloc *)cparms.mem_va;\n-\n-\t\t\trc = ba_init(db[i].pool, resv[j].stride);\n-\t\t\tif (rc) {\n-\t\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t\t \"%s: Pool init failed, type:%d\\n\",\n-\t\t\t\t\t tf_dir_2_str(parms->dir),\n-\t\t\t\t\t db[i].cfg_type);\n-\t\t\t\tgoto fail;\n+\t\t\t/* Only allocate BA pool if so requested */\n+\t\t\tif (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) {\n+\t\t\t\t/* Create pool */\n+\t\t\t\tpool_size = (BITALLOC_SIZEOF(resv[j].stride) /\n+\t\t\t\t\t sizeof(struct bitalloc));\n+\t\t\t\t/* Alloc request, alignment already set */\n+\t\t\t\tcparms.nitems = pool_size;\n+\t\t\t\tcparms.size = sizeof(struct bitalloc);\n+\t\t\t\trc = tfp_calloc(&cparms);\n+\t\t\t\tif (rc) {\n+\t\t\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t\t \"%s: Pool alloc failed, type:%d\\n\",\n+\t\t\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t\t\t db[i].cfg_type);\n+\t\t\t\t\tgoto fail;\n+\t\t\t\t}\n+\t\t\t\tdb[i].pool = (struct bitalloc *)cparms.mem_va;\n+\n+\t\t\t\trc = ba_init(db[i].pool, resv[j].stride);\n+\t\t\t\tif (rc) {\n+\t\t\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t\t \"%s: Pool init failed, type:%d\\n\",\n+\t\t\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t\t\t db[i].cfg_type);\n+\t\t\t\t\tgoto fail;\n+\t\t\t\t}\n \t\t\t}\n \t\t\tj++;\n \t\t} else {\n@@ -682,6 +688,9 @@ tf_rm_free_db(struct tf *tfp,\n \t\t\t\t tf_device_module_type_2_str(rm_db->type));\n \t}\n \n+\t/* No need to check for configuration type, even if we do not\n+\t * have a BA pool we just delete on a null ptr, no harm\n+\t */\n \tfor (i = 0; i < rm_db->num_entries; i++)\n \t\ttfp_free((void *)rm_db->db[i].pool);\n \n@@ -705,8 +714,7 @@ tf_rm_allocate(struct tf_rm_allocate_parms *parms)\n \tcfg_type = rm_db->db[parms->db_index].cfg_type;\n \n \t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n \t\treturn -ENOTSUP;\n \n \t/* Bail out if the pool is not valid, should never happen */\n@@ -770,8 +778,7 @@ tf_rm_free(struct tf_rm_free_parms *parms)\n \tcfg_type = rm_db->db[parms->db_index].cfg_type;\n \n \t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n \t\treturn -ENOTSUP;\n \n \t/* Bail out if the pool is not valid, should never happen */\n@@ -816,8 +823,7 @@ tf_rm_is_allocated(struct tf_rm_is_allocated_parms *parms)\n \tcfg_type = rm_db->db[parms->db_index].cfg_type;\n \n \t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n \t\treturn -ENOTSUP;\n \n \t/* Bail out if the pool is not valid, should never happen */\n@@ -857,9 +863,9 @@ tf_rm_get_info(struct tf_rm_get_alloc_info_parms *parms)\n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n \tcfg_type = rm_db->db[parms->db_index].cfg_type;\n \n-\t/* Bail out if not controlled by RM */\n+\t/* Bail out if not controlled by HCAPI */\n \tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n \t\treturn -ENOTSUP;\n \n \tmemcpy(parms->info,\n@@ -880,9 +886,9 @@ tf_rm_get_hcapi_type(struct tf_rm_get_hcapi_parms *parms)\n \trm_db = (struct tf_rm_new_db *)parms->rm_db;\n \tcfg_type = rm_db->db[parms->db_index].cfg_type;\n \n-\t/* Bail out if not controlled by RM */\n+\t/* Bail out if not controlled by HCAPI */\n \tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\t cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n \t\treturn -ENOTSUP;\n \n \t*parms->hcapi_type = rm_db->db[parms->db_index].hcapi_type;\n@@ -903,8 +909,7 @@ tf_rm_get_inuse_count(struct tf_rm_get_inuse_count_parms *parms)\n \tcfg_type = rm_db->db[parms->db_index].cfg_type;\n \n \t/* Bail out if not controlled by RM */\n-\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI &&\n-\t cfg_type != TF_RM_ELEM_CFG_PRIVATE)\n+\tif (cfg_type != TF_RM_ELEM_CFG_HCAPI_BA)\n \t\treturn -ENOTSUP;\n \n \t/* Bail silently (no logging), if the pool is not valid there\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm.h b/drivers/net/bnxt/tf_core/tf_rm.h\nindex 5cb68892a..f44fcca70 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm.h\n+++ b/drivers/net/bnxt/tf_core/tf_rm.h\n@@ -56,12 +56,18 @@ struct tf_rm_new_entry {\n * ULP layer that is not controlled by HCAPI within the Firmware.\n */\n enum tf_rm_elem_cfg_type {\n-\t/** No configuration */\n+\t/**\n+\t * No configuration\n+\t */\n \tTF_RM_ELEM_CFG_NULL,\n-\t/** HCAPI 'controlled', uses a Pool for internal storage */\n+\t/** HCAPI 'controlled', no RM storage thus the Device Module\n+\t * using the RM can chose to handle storage locally.\n+\t */\n \tTF_RM_ELEM_CFG_HCAPI,\n-\t/** Private thus not HCAPI 'controlled', creates a Pool for storage */\n-\tTF_RM_ELEM_CFG_PRIVATE,\n+\t/** HCAPI 'controlled', uses a Bit Allocator Pool for internal\n+\t * storage in the RM.\n+\t */\n+\tTF_RM_ELEM_CFG_HCAPI_BA,\n \t/**\n \t * Shared element thus it belongs to a shared FW Session and\n \t * is not controlled by the Host.\ndiff --git a/drivers/net/bnxt/tf_core/tf_session.h b/drivers/net/bnxt/tf_core/tf_session.h\nindex e4472ed7f..ebee4db8c 100644\n--- a/drivers/net/bnxt/tf_core/tf_session.h\n+++ b/drivers/net/bnxt/tf_core/tf_session.h\n@@ -103,11 +103,6 @@ struct tf_session {\n \n \t/** Table scope array */\n \tstruct tf_tbl_scope_cb tbl_scopes[TF_NUM_TBL_SCOPE];\n-\n-\t/**\n-\t * EM Pools\n-\t */\n-\tstruct stack em_pool[TF_DIR_MAX];\n };\n \n /**\ndiff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c\nindex fc047f8f8..d5bb4eec1 100644\n--- a/drivers/net/bnxt/tf_core/tf_tcam.c\n+++ b/drivers/net/bnxt/tf_core/tf_tcam.c\n@@ -43,6 +43,7 @@ tf_tcam_bind(struct tf *tfp,\n {\n \tint rc;\n \tint i;\n+\tstruct tf_tcam_resources *tcam_cnt;\n \tstruct tf_rm_create_db_parms db_cfg = { 0 };\n \n \tTF_CHECK_PARMS2(tfp, parms);\n@@ -53,6 +54,14 @@ tf_tcam_bind(struct tf *tfp,\n \t\treturn -EINVAL;\n \t}\n \n+\ttcam_cnt = parms->resources->tcam_cnt;\n+\tif ((tcam_cnt[TF_DIR_RX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] % 2) ||\n+\t (tcam_cnt[TF_DIR_TX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] % 2)) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"Number of WC TCAM entries cannot be odd num\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n \tdb_cfg.type = TF_DEVICE_MODULE_TYPE_TCAM;\n \tdb_cfg.num_elements = parms->num_elements;\n \tdb_cfg.cfg = parms->cfg;\n@@ -168,6 +177,18 @@ tf_tcam_alloc(struct tf *tfp,\n \t\treturn rc;\n \t}\n \n+\tif (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM &&\n+\t (parms->idx % 2) != 0) {\n+\t\trc = tf_rm_allocate(&aparms);\n+\t\tif (rc) {\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t \"%s: Failed tcam, type:%d\\n\",\n+\t\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t\t parms->type);\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n \tparms->idx *= num_slice_per_row;\n \n \treturn 0;\n", "prefixes": [ "v2", "24/51" ] }