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GET /api/patches/71145/?format=api
{ "id": 71145, "url": "https://patches.dpdk.org/api/patches/71145/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200610114427.22146-10-somnath.kotur@broadcom.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200610114427.22146-10-somnath.kotur@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200610114427.22146-10-somnath.kotur@broadcom.com", "date": "2020-06-10T11:44:00", "name": "[09/36] net/bnxt: updated compute field list and access macros", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "962502494e79d02b2dd9e8f032202cbc9f7fad3a", "submitter": { "id": 908, "url": "https://patches.dpdk.org/api/people/908/?format=api", "name": "Somnath Kotur", "email": "somnath.kotur@broadcom.com" }, "delegate": { "id": 1766, "url": "https://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200610114427.22146-10-somnath.kotur@broadcom.com/mbox/", "series": [ { "id": 10380, "url": "https://patches.dpdk.org/api/series/10380/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10380", "date": "2020-06-10T11:43:51", "name": "bnxt patches", "version": 1, "mbox": "https://patches.dpdk.org/series/10380/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/71145/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/71145/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4DD3CA051A;\n\tWed, 10 Jun 2020 13:50:35 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C6F291BE97;\n\tWed, 10 Jun 2020 13:49:10 +0200 (CEST)", "from relay.smtp.broadcom.com (relay.smtp.broadcom.com\n [192.19.232.149]) by dpdk.org (Postfix) with ESMTP id 2ACE52E8F\n for <dev@dpdk.org>; Wed, 10 Jun 2020 13:49:07 +0200 (CEST)", "from dhcp-10-123-153-55.dhcp.broadcom.net\n (dhcp-10-123-153-55.dhcp.broadcom.net [10.123.153.55])\n by relay.smtp.broadcom.com (Postfix) with ESMTP id 77C4A1BD5A6;\n Wed, 10 Jun 2020 04:49:06 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.10.3 relay.smtp.broadcom.com 77C4A1BD5A6", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1591789747;\n bh=k8GiPtuP0hddpZR1JPzGKtaBOQEJSSA+haPyiINdHj0=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=eMkZEMg1yv0qlwBYnSm7kk3THrNzSxucOXPNd7MjAoHN+S+3ndk5kz4kkVx6UGmEC\n 8zu4sYsWoC6o9etvl2gZQT8byBrNDqJbjtKlC5iicQrRkfp1xI8L4t2NWf0ucKyadr\n S6jYten7yhvATuRrQvTY76BN5xiF5dhhru0+LPk8=", "From": "Somnath Kotur <somnath.kotur@broadcom.com>", "To": "dev@dpdk.org", "Cc": "ferruh.yigit@intel.com", "Date": "Wed, 10 Jun 2020 17:14:00 +0530", "Message-Id": "<20200610114427.22146-10-somnath.kotur@broadcom.com>", "X-Mailer": "git-send-email 2.10.1.613.g2cc2e70", "In-Reply-To": "<20200610114427.22146-1-somnath.kotur@broadcom.com>", "References": "<20200610114427.22146-1-somnath.kotur@broadcom.com>", "Subject": "[dpdk-dev] [PATCH 09/36] net/bnxt: updated compute field list and\n\taccess macros", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\n\nThe compute field is extended to support action fields and not\njust header fields, hence CHF is changed to CF. The access macro\nfor compute field is renamed to address this.\n\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nReviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>\nSigned-off-by: Somnath Kotur <somnath.kotur@broadcom.com>\n---\n drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c | 6 +-\n drivers/net/bnxt/tf_ulp/ulp_mapper.c | 12 ++--\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 88 +++++++++++++--------------\n drivers/net/bnxt/tf_ulp/ulp_template_db.c | 6 +-\n drivers/net/bnxt/tf_ulp/ulp_template_db.h | 52 ++++++++++------\n drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 2 +-\n drivers/net/bnxt/tf_ulp/ulp_utils.h | 4 +-\n 7 files changed, 92 insertions(+), 78 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\nindex 1d8d79f..6eb2d61 100644\n--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\n+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\n@@ -96,10 +96,10 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,\n \t\tparams.dir = ULP_DIR_EGRESS;\n \n \t/* copy the device port id and direction for further processing */\n-\tULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_INCOMING_IF,\n+\tULP_COMP_FLD_IDX_WR(¶ms, BNXT_ULP_CF_IDX_INCOMING_IF,\n \t\t\t dev->data->port_id);\n-\tULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_DIRECTION, params.dir);\n-\tULP_UTIL_CHF_IDX_WR(¶ms, BNXT_ULP_CHF_IDX_SVIF,\n+\tULP_COMP_FLD_IDX_WR(¶ms, BNXT_ULP_CF_IDX_DIRECTION, params.dir);\n+\tULP_COMP_FLD_IDX_WR(¶ms, BNXT_ULP_CF_IDX_SVIF_FLAG,\n \t\t\t BNXT_ULP_INVALID_SVIF_VAL);\n \n \t/* Parse the rte flow pattern */\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c\nindex 1ede967..3b8ec43 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c\n@@ -662,7 +662,7 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,\n \t\t\treturn -EINVAL;\n \t\t}\n \t\tbreak;\n-\tcase BNXT_ULP_RESULT_OPC_SET_TO_COMP_HDR_FIELD:\n+\tcase BNXT_ULP_RESULT_OPC_SET_TO_COMP_FIELD:\n \t\tif (!ulp_operand_read(fld->result_operand,\n \t\t\t\t (uint8_t *)&idx,\n \t\t\t\t sizeof(uint16_t))) {\n@@ -670,7 +670,7 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,\n \t\t\treturn -EINVAL;\n \t\t}\n \t\tidx = tfp_be_to_cpu_16(idx);\n-\t\tif (idx < BNXT_ULP_CHF_IDX_LAST)\n+\t\tif (idx < BNXT_ULP_CF_IDX_LAST)\n \t\t\tval = ulp_blob_push_32(blob, &parms->comp_fld[idx],\n \t\t\t\t\t fld->field_bit_size);\n \t\tif (!val) {\n@@ -754,14 +754,14 @@ ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms,\n \t\t\treturn -EINVAL;\n \t\t}\n \t\tbreak;\n-\tcase BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD:\n+\tcase BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD:\n \t\tif (!ulp_operand_read(operand, (uint8_t *)&idx,\n \t\t\t\t sizeof(uint16_t))) {\n \t\t\tBNXT_TF_DBG(ERR, \"%s key operand read failed.\\n\", name);\n \t\t\treturn -EINVAL;\n \t\t}\n \t\tidx = tfp_be_to_cpu_16(idx);\n-\t\tif (idx < BNXT_ULP_CHF_IDX_LAST)\n+\t\tif (idx < BNXT_ULP_CF_IDX_LAST)\n \t\t\tval = ulp_blob_push_32(blob, &parms->comp_fld[idx],\n \t\t\t\t\t bitlen);\n \t\tif (!val) {\n@@ -1001,7 +1001,7 @@ ulp_mapper_mark_gfid_process(struct bnxt_ulp_mapper_parms *parms,\n \tuint32_t vfr_flag, mark, gfid, mark_flag;\n \tint32_t rc = 0;\n \n-\tvfr_flag = ULP_UTIL_CHF_IDX_RD(parms, BNXT_ULP_CHF_IDX_VFR_FLAG);\n+\tvfr_flag = ULP_COMP_FLD_IDX_RD(parms, BNXT_ULP_CF_IDX_VFR_FLAG);\n \tif (!(tbl->mark_enable &&\n \t (ULP_BITMAP_ISSET(parms->act_bitmap->bits,\n \t\t\t BNXT_ULP_ACTION_BIT_MARK) || vfr_flag)))\n@@ -1044,7 +1044,7 @@ ulp_mapper_mark_act_ptr_process(struct bnxt_ulp_mapper_parms *parms,\n \tuint64_t val64;\n \tint32_t rc = 0;\n \n-\tvfr_flag = ULP_UTIL_CHF_IDX_RD(parms, BNXT_ULP_CHF_IDX_VFR_FLAG);\n+\tvfr_flag = ULP_COMP_FLD_IDX_RD(parms, BNXT_ULP_CF_IDX_VFR_FLAG);\n \tif (!(tbl->mark_enable &&\n \t (ULP_BITMAP_ISSET(parms->act_bitmap->bits,\n \t\t\t\tBNXT_ULP_ACTION_BIT_MARK) || vfr_flag)))\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\nindex 4f7adfc..d264fd5 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n@@ -165,7 +165,7 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,\n \tuint32_t ifindex;\n \tint32_t rc;\n \n-\tif (ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_SVIF) !=\n+\tif (ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_SVIF_FLAG) !=\n \t BNXT_ULP_INVALID_SVIF_VAL) {\n \t\tBNXT_TF_DBG(ERR,\n \t\t\t \"SVIF already set,multiple source not support'd\\n\");\n@@ -173,8 +173,8 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,\n \t}\n \n \tif (proto == RTE_FLOW_ITEM_TYPE_PORT_ID) {\n-\t\tdir = ULP_UTIL_CHF_IDX_RD(params,\n-\t\t\t\t\t BNXT_ULP_CHF_IDX_DIRECTION);\n+\t\tdir = ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t\t BNXT_ULP_CF_IDX_DIRECTION);\n \t\t/* perform the conversion from dpdk port to bnxt svif */\n \t\trc = ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx, port_id,\n \t\t\t\t\t\t &ifindex);\n@@ -190,7 +190,7 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,\n \tmemcpy(hdr_field->spec, &svif, sizeof(svif));\n \tmemcpy(hdr_field->mask, &mask, sizeof(mask));\n \thdr_field->size = sizeof(svif);\n-\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_SVIF,\n+\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_SVIF_FLAG,\n \t\t\t rte_be_to_cpu_16(svif));\n \treturn BNXT_TF_RC_SUCCESS;\n }\n@@ -202,12 +202,12 @@ ulp_rte_parser_svif_process(struct ulp_rte_parser_params *params)\n \tuint16_t port_id = 0;\n \tuint16_t svif_mask = 0xFFFF;\n \n-\tif (ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_SVIF) !=\n+\tif (ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_SVIF_FLAG) !=\n \t BNXT_ULP_INVALID_SVIF_VAL)\n \t\treturn BNXT_TF_RC_SUCCESS;\n \n \t/* SVIF not set. So get the port id */\n-\tport_id = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_INCOMING_IF);\n+\tport_id = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);\n \n \t/* Update the SVIF details */\n \treturn ulp_rte_parser_svif_set(params, RTE_FLOW_ITEM_TYPE_PORT_ID,\n@@ -238,7 +238,7 @@ ulp_rte_pf_hdr_handler(const struct rte_flow_item *item,\n \tuint16_t svif_mask = 0xFFFF;\n \n \t/* Get the port id */\n-\tport_id = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_INCOMING_IF);\n+\tport_id = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);\n \n \t/* Update the SVIF details */\n \treturn ulp_rte_parser_svif_set(params,\n@@ -414,10 +414,10 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,\n \tparams->vlan_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;\n \n \t/* Get the outer tag and inner tag counts */\n-\touter_vtag_num = ULP_UTIL_CHF_IDX_RD(params,\n-\t\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_NUM);\n-\tinner_vtag_num = ULP_UTIL_CHF_IDX_RD(params,\n-\t\t\t\t\t BNXT_ULP_CHF_IDX_I_VTAG_NUM);\n+\touter_vtag_num = ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t\t BNXT_ULP_CF_IDX_O_VTAG_NUM);\n+\tinner_vtag_num = ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t\t BNXT_ULP_CF_IDX_I_VTAG_NUM);\n \n \t/* Update the hdr_bitmap of the vlans */\n \thdr_bit = ¶ms->hdr_bitmap;\n@@ -425,40 +425,40 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,\n \t !outer_vtag_num) {\n \t\t/* Update the vlan tag num */\n \t\touter_vtag_num++;\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_NUM,\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_VTAG_NUM,\n \t\t\t\t outer_vtag_num);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_PRESENT, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_VTAG_PRESENT, 1);\n \t} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n-\t\t ULP_UTIL_CHF_IDX_RD(params,\n-\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&\n+\t\t ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t BNXT_ULP_CF_IDX_O_VTAG_PRESENT) &&\n \t\t outer_vtag_num == 1) {\n \t\t/* update the vlan tag num */\n \t\touter_vtag_num++;\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_NUM,\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_VTAG_NUM,\n \t\t\t\t outer_vtag_num);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_TWO_VTAGS, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_TWO_VTAGS, 1);\n \t} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n-\t\t ULP_UTIL_CHF_IDX_RD(params,\n-\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&\n+\t\t ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t BNXT_ULP_CF_IDX_O_VTAG_PRESENT) &&\n \t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&\n \t\t !inner_vtag_num) {\n \t\t/* update the vlan tag num */\n \t\tinner_vtag_num++;\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_NUM,\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_VTAG_NUM,\n \t\t\t\t inner_vtag_num);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_PRESENT, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_VTAG_PRESENT, 1);\n \t} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n-\t\t ULP_UTIL_CHF_IDX_RD(params,\n-\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&\n+\t\t ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t BNXT_ULP_CF_IDX_O_VTAG_PRESENT) &&\n \t\t ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&\n-\t\t ULP_UTIL_CHF_IDX_RD(params,\n-\t\t\t\t BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&\n+\t\t ULP_COMP_FLD_IDX_RD(params,\n+\t\t\t\t BNXT_ULP_CF_IDX_O_VTAG_PRESENT) &&\n \t\t inner_vtag_num == 1) {\n \t\t/* update the vlan tag num */\n \t\tinner_vtag_num++;\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_NUM,\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_VTAG_NUM,\n \t\t\t\t inner_vtag_num);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_TWO_VTAGS, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_TWO_VTAGS, 1);\n \t} else {\n \t\tBNXT_TF_DBG(ERR, \"Error Parsing:Vlan hdr found withtout eth\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n@@ -479,7 +479,7 @@ ulp_rte_ipv4_hdr_handler(const struct rte_flow_item *item,\n \tuint32_t size;\n \tuint32_t inner_l3, outer_l3;\n \n-\tinner_l3 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_I_L3);\n+\tinner_l3 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_I_L3);\n \tif (inner_l3) {\n \t\tBNXT_TF_DBG(ERR, \"Parse Error:Third L3 header not supported\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n@@ -567,17 +567,17 @@ ulp_rte_ipv4_hdr_handler(const struct rte_flow_item *item,\n \tparams->field_idx += BNXT_ULP_PROTO_HDR_IPV4_NUM;\n \n \t/* Set the ipv4 header bitmap and computed l3 header bitmaps */\n-\touter_l3 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_O_L3);\n+\touter_l3 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_O_L3);\n \tif (outer_l3 ||\n \t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4) ||\n \t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6)) {\n \t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_IPV4);\n \t\tinner_l3++;\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_L3, inner_l3);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3, inner_l3);\n \t} else {\n \t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4);\n \t\touter_l3++;\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_L3, outer_l3);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3, outer_l3);\n \t}\n \treturn BNXT_TF_RC_SUCCESS;\n }\n@@ -595,7 +595,7 @@ ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item,\n \tuint32_t size;\n \tuint32_t inner_l3, outer_l3;\n \n-\tinner_l3 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_I_L3);\n+\tinner_l3 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_I_L3);\n \tif (inner_l3) {\n \t\tBNXT_TF_DBG(ERR, \"Parse Error: 3'rd L3 header not supported\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n@@ -655,15 +655,15 @@ ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item,\n \tparams->field_idx += BNXT_ULP_PROTO_HDR_IPV6_NUM;\n \n \t/* Set the ipv6 header bitmap and computed l3 header bitmaps */\n-\touter_l3 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_O_L3);\n+\touter_l3 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_O_L3);\n \tif (outer_l3 ||\n \t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4) ||\n \t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6)) {\n \t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_IPV6);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_L3, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3, 1);\n \t} else {\n \t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_L3, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3, 1);\n \t}\n \treturn BNXT_TF_RC_SUCCESS;\n }\n@@ -681,7 +681,7 @@ ulp_rte_udp_hdr_handler(const struct rte_flow_item *item,\n \tuint32_t size;\n \tuint32_t inner_l4, outer_l4;\n \n-\tinner_l4 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_I_L4);\n+\tinner_l4 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_I_L4);\n \tif (inner_l4) {\n \t\tBNXT_TF_DBG(ERR, \"Parse Err:Third L4 header not supported\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n@@ -728,15 +728,15 @@ ulp_rte_udp_hdr_handler(const struct rte_flow_item *item,\n \tparams->field_idx += BNXT_ULP_PROTO_HDR_UDP_NUM;\n \n \t/* Set the udp header bitmap and computed l4 header bitmaps */\n-\touter_l4 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_O_L4);\n+\touter_l4 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_O_L4);\n \tif (outer_l4 ||\n \t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP) ||\n \t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP)) {\n \t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_UDP);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_L4, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4, 1);\n \t} else {\n \t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_L4, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4, 1);\n \t}\n \treturn BNXT_TF_RC_SUCCESS;\n }\n@@ -754,7 +754,7 @@ ulp_rte_tcp_hdr_handler(const struct rte_flow_item *item,\n \tuint32_t size;\n \tuint32_t inner_l4, outer_l4;\n \n-\tinner_l4 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_I_L4);\n+\tinner_l4 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_I_L4);\n \tif (inner_l4) {\n \t\tBNXT_TF_DBG(ERR, \"Parse Error:Third L4 header not supported\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n@@ -838,15 +838,15 @@ ulp_rte_tcp_hdr_handler(const struct rte_flow_item *item,\n \tparams->field_idx += BNXT_ULP_PROTO_HDR_TCP_NUM;\n \n \t/* Set the udp header bitmap and computed l4 header bitmaps */\n-\touter_l4 = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_O_L4);\n+\touter_l4 = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_O_L4);\n \tif (outer_l4 ||\n \t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP) ||\n \t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP)) {\n \t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_TCP);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_L4, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4, 1);\n \t} else {\n \t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP);\n-\t\tULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_L4, 1);\n+\t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4, 1);\n \t}\n \treturn BNXT_TF_RC_SUCCESS;\n }\n@@ -1211,7 +1211,7 @@ ulp_rte_pf_act_handler(const struct rte_flow_action *action_item __rte_unused,\n \tULP_BITMAP_SET(params->act_bitmap.bits, BNXT_ULP_ACTION_BIT_VNIC);\n \n \t/* copy the PF of the current device into VNIC Property */\n-\tsvif = ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_INCOMING_IF);\n+\tsvif = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_INCOMING_IF);\n \tsvif = bnxt_get_vnic_id(svif);\n \tsvif = rte_cpu_to_be_32(svif);\n \tmemcpy(¶ms->act_prop.act_details[BNXT_ULP_ACT_PROP_IDX_VNIC],\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.c b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\nindex f06fbc0..444373a 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n@@ -834,10 +834,10 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {\n \t.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,\n \t.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n-\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD,\n+\t.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD,\n \t.spec_operand = {\n-\t\t(BNXT_ULP_CHF_IDX_O_VTAG_NUM >> 8) & 0xff,\n-\t\tBNXT_ULP_CHF_IDX_O_VTAG_NUM & 0xff,\n+\t\t(BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,\n+\t\tBNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n \t},\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\nindex 82df8de..d087404 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n@@ -96,23 +96,37 @@ enum bnxt_ulp_cache_tbl_id {\n \tBNXT_ULP_CACHE_TBL_ID_LAST = 4\n };\n \n-enum bnxt_ulp_chf_idx {\n-\tBNXT_ULP_CHF_IDX_MPLS_TAG_NUM = 0,\n-\tBNXT_ULP_CHF_IDX_O_VTAG_NUM = 1,\n-\tBNXT_ULP_CHF_IDX_O_VTAG_PRESENT = 2,\n-\tBNXT_ULP_CHF_IDX_O_TWO_VTAGS = 3,\n-\tBNXT_ULP_CHF_IDX_I_VTAG_NUM = 4,\n-\tBNXT_ULP_CHF_IDX_I_VTAG_PRESENT = 5,\n-\tBNXT_ULP_CHF_IDX_I_TWO_VTAGS = 6,\n-\tBNXT_ULP_CHF_IDX_INCOMING_IF = 7,\n-\tBNXT_ULP_CHF_IDX_DIRECTION = 8,\n-\tBNXT_ULP_CHF_IDX_SVIF = 9,\n-\tBNXT_ULP_CHF_IDX_O_L3 = 10,\n-\tBNXT_ULP_CHF_IDX_I_L3 = 11,\n-\tBNXT_ULP_CHF_IDX_O_L4 = 12,\n-\tBNXT_ULP_CHF_IDX_I_L4 = 13,\n-\tBNXT_ULP_CHF_IDX_VFR_FLAG = 14,\n-\tBNXT_ULP_CHF_IDX_LAST = 15\n+enum bnxt_ulp_cf_idx {\n+\tBNXT_ULP_CF_IDX_MPLS_TAG_NUM = 0,\n+\tBNXT_ULP_CF_IDX_O_VTAG_NUM = 1,\n+\tBNXT_ULP_CF_IDX_O_VTAG_PRESENT = 2,\n+\tBNXT_ULP_CF_IDX_O_TWO_VTAGS = 3,\n+\tBNXT_ULP_CF_IDX_I_VTAG_NUM = 4,\n+\tBNXT_ULP_CF_IDX_I_VTAG_PRESENT = 5,\n+\tBNXT_ULP_CF_IDX_I_TWO_VTAGS = 6,\n+\tBNXT_ULP_CF_IDX_INCOMING_IF = 7,\n+\tBNXT_ULP_CF_IDX_DIRECTION = 8,\n+\tBNXT_ULP_CF_IDX_SVIF_FLAG = 9,\n+\tBNXT_ULP_CF_IDX_O_L3 = 10,\n+\tBNXT_ULP_CF_IDX_I_L3 = 11,\n+\tBNXT_ULP_CF_IDX_O_L4 = 12,\n+\tBNXT_ULP_CF_IDX_I_L4 = 13,\n+\tBNXT_ULP_CF_IDX_DEV_PORT_ID = 14,\n+\tBNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 15,\n+\tBNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 16,\n+\tBNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 17,\n+\tBNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 18,\n+\tBNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 19,\n+\tBNXT_ULP_CF_IDX_VF_FUNC_SVIF = 20,\n+\tBNXT_ULP_CF_IDX_VF_FUNC_SPIF = 21,\n+\tBNXT_ULP_CF_IDX_VF_FUNC_PARIF = 22,\n+\tBNXT_ULP_CF_IDX_VF_FUNC_VNIC = 23,\n+\tBNXT_ULP_CF_IDX_PHY_PORT_SVIF = 24,\n+\tBNXT_ULP_CF_IDX_PHY_PORT_SPIF = 25,\n+\tBNXT_ULP_CF_IDX_PHY_PORT_PARIF = 26,\n+\tBNXT_ULP_CF_IDX_PHY_PORT_VPORT = 27,\n+\tBNXT_ULP_CF_IDX_VFR_FLAG = 28,\n+\tBNXT_ULP_CF_IDX_LAST = 29\n };\n \n enum bnxt_ulp_def_regfile_index {\n@@ -214,7 +228,7 @@ enum bnxt_ulp_result_opc {\n \tBNXT_ULP_RESULT_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 2,\n \tBNXT_ULP_RESULT_OPC_SET_TO_REGFILE = 3,\n \tBNXT_ULP_RESULT_OPC_SET_TO_DEF_REGFILE = 4,\n-\tBNXT_ULP_RESULT_OPC_SET_TO_COMP_HDR_FIELD = 5,\n+\tBNXT_ULP_RESULT_OPC_SET_TO_COMP_FIELD = 5,\n \tBNXT_ULP_RESULT_OPC_LAST = 6\n };\n \n@@ -227,7 +241,7 @@ enum bnxt_ulp_search_before_alloc {\n enum bnxt_ulp_spec_opc {\n \tBNXT_ULP_SPEC_OPC_SET_TO_CONSTANT = 0,\n \tBNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD = 1,\n-\tBNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD = 2,\n+\tBNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD = 2,\n \tBNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 3,\n \tBNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE = 4,\n \tBNXT_ULP_SPEC_OPC_ADD_PAD = 5,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\nindex a85ccf2..22a2173 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n@@ -60,7 +60,7 @@ struct ulp_rte_parser_params {\n \tstruct ulp_rte_hdr_bitmap\thdr_bitmap;\n \tstruct ulp_rte_field_bitmap\tfld_bitmap;\n \tstruct ulp_rte_hdr_field\thdr_field[BNXT_ULP_PROTO_HDR_MAX];\n-\tuint32_t\t\t\tcomp_fld[BNXT_ULP_CHF_IDX_LAST];\n+\tuint32_t\t\t\tcomp_fld[BNXT_ULP_CF_IDX_LAST];\n \tuint32_t\t\t\tfield_idx;\n \tuint32_t\t\t\tvlan_idx;\n \tstruct ulp_rte_act_bitmap\tact_bitmap;\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.h b/drivers/net/bnxt/tf_ulp/ulp_utils.h\nindex b8de4b4..2f64bcb 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_utils.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.h\n@@ -51,10 +51,10 @@\n #define ULP_BITS_2_BYTE_NR(bits_x)\t((bits_x) / 8)\n \n /* Macros to read the computed fields */\n-#define ULP_UTIL_CHF_IDX_RD(params, idx) \\\n+#define ULP_COMP_FLD_IDX_RD(params, idx) \\\n \trte_be_to_cpu_32((params)->comp_fld[(idx)])\n \n-#define ULP_UTIL_CHF_IDX_WR(params, idx, val)\t\\\n+#define ULP_COMP_FLD_IDX_WR(params, idx, val)\t\\\n \t((params)->comp_fld[(idx)] = rte_cpu_to_be_32((val)))\n /*\n * Making the blob statically sized to 128 bytes for now.\n", "prefixes": [ "09/36" ] }