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GET /api/patches/71028/?format=api
{ "id": 71028, "url": "https://patches.dpdk.org/api/patches/71028/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200609120001.35110-22-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200609120001.35110-22-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200609120001.35110-22-qi.z.zhang@intel.com", "date": "2020-06-09T11:59:30", "name": "[v2,21/52] net/ice/base: allow GENEVE and VXLAN rules with VLAN", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fb956285d547332b5e267c12c0003a426f523419", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "https://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200609120001.35110-22-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 10359, "url": "https://patches.dpdk.org/api/series/10359/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10359", "date": "2020-06-09T11:59:09", "name": "net/ice: base code update", "version": 2, "mbox": "https://patches.dpdk.org/series/10359/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/71028/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/71028/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DED9DA0516;\n\tTue, 9 Jun 2020 13:59:27 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A4C0D1BEE3;\n\tTue, 9 Jun 2020 13:57:00 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 066591BC24\n for <dev@dpdk.org>; Tue, 9 Jun 2020 13:56:45 +0200 (CEST)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Jun 2020 04:56:45 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by fmsmga005.fm.intel.com with ESMTP; 09 Jun 2020 04:56:43 -0700" ], "IronPort-SDR": [ "\n KQWDs0Jxz2DkViys0uYysXz8ELph8OullBptLJi7moTkgE9c/w8R0PS/sJAwHUbI8lMN6l/8/J\n KDFMQBj9XG+A==", "\n HH4L9AYpum3XHRTnG4eZFOO+vsDMcGASzfMOECIEkfrXm3gHnGrDL4uN+suUBuRPBij3HFrr1H\n 6vJWVcGXdJwQ==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.73,492,1583222400\"; d=\"scan'208\";a=\"473044102\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Dan Nowlin <dan.nowlin@intel.com>,\n \"Paul M . Stillwell Jr\" <paul.m.stillwell.jr@intel.com>", "Date": "Tue, 9 Jun 2020 19:59:30 +0800", "Message-Id": "<20200609120001.35110-22-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200609120001.35110-1-qi.z.zhang@intel.com>", "References": "<20200603024016.30636-1-qi.z.zhang@intel.com>\n <20200609120001.35110-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 21/52] net/ice/base: allow GENEVE and VXLAN\n\trules with VLAN", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When programming GENEVE and VXLAN switch rules, there are some instances\nwhere both VLAN tagged packets plus non-VLAN tagged packets are needed\nto match the rule.\n\nIn order to perform this action in one rule, the switch code needs\nto setup the packet flag mask to ignore the VLAN packet flag. This\nwill allow the rule to match both VLAN and non-VLAN packets.\n\nSigned-off-by: Dan Nowlin <dan.nowlin@intel.com>\nSigned-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_protocol_type.h | 7 ++++--\n drivers/net/ice/base/ice_switch.c | 41 +++++++++++++++++++-------------\n 2 files changed, 29 insertions(+), 19 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h\nindex b75a340aa..964561d23 100644\n--- a/drivers/net/ice/base/ice_protocol_type.h\n+++ b/drivers/net/ice/base/ice_protocol_type.h\n@@ -58,8 +58,10 @@ enum ice_sw_tunnel_type {\n \tICE_NON_TUN = 0,\n \tICE_SW_TUN_AND_NON_TUN,\n \tICE_SW_TUN_VXLAN_GPE,\n-\tICE_SW_TUN_GENEVE,\n-\tICE_SW_TUN_VXLAN,\n+\tICE_SW_TUN_GENEVE, /* GENEVE matches only non-VLAN pkts */\n+\tICE_SW_TUN_GENEVE_VLAN, /* GENEVE matches both VLAN and non-VLAN pkts */\n+\tICE_SW_TUN_VXLAN,\t/* VXLAN matches only non-VLAN pkts */\n+\tICE_SW_TUN_VXLAN_VLAN, /* VXLAN matches both VLAN and non-VLAN pkts */\n \tICE_SW_TUN_NVGRE,\n \tICE_SW_TUN_UDP, /* This means all \"UDP\" tunnel types: VXLAN-GPE, VXLAN\n \t\t\t * and GENEVE\n@@ -165,6 +167,7 @@ enum ice_prot_id {\n #define ICE_TUN_FLAG_MDID 21\n #define ICE_TUN_FLAG_MDID_OFF (ICE_MDID_SIZE * ICE_TUN_FLAG_MDID)\n #define ICE_TUN_FLAG_MASK 0xFF\n+#define ICE_TUN_FLAG_VLAN_MASK 0x01\n #define ICE_TUN_FLAG_FV_IND 2\n \n #define ICE_PROTOCOL_MAX_ENTRIES 16\ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex b4aab6780..ab8b44de7 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -5651,12 +5651,12 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,\n * ice_add_sw_recipe - function to call AQ calls to create switch recipe\n * @hw: pointer to hardware structure\n * @rm: recipe management list entry\n- * @match_tun: if field vector index for tunnel needs to be programmed\n- * @profiles: bitmap of profiles that will be assocated.\n+ * @match_tun_mask: tunnel mask that needs to be programmed\n+ * @profiles: bitmap of profiles that will be associated.\n */\n static enum ice_status\n ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,\n-\t\t bool match_tun, ice_bitmap_t *profiles)\n+\t\t u16 match_tun_mask, ice_bitmap_t *profiles)\n {\n \tice_declare_bitmap(result_idx_bm, ICE_MAX_FV_WORDS);\n \tstruct ice_aqc_recipe_data_elem *tmp;\n@@ -5874,10 +5874,10 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,\n \t\t/* To differentiate among different UDP tunnels, a meta data ID\n \t\t * flag is used.\n \t\t */\n-\t\tif (match_tun) {\n+\t\tif (match_tun_mask) {\n \t\t\tbuf[recps].content.lkup_indx[i] = ICE_TUN_FLAG_FV_IND;\n \t\t\tbuf[recps].content.mask[i] =\n-\t\t\t\tCPU_TO_LE16(ICE_TUN_FLAG_MASK);\n+\t\t\t\tCPU_TO_LE16(match_tun_mask);\n \t\t}\n \n \t\trecps++;\n@@ -6038,12 +6038,19 @@ static bool ice_tun_type_match_word(enum ice_sw_tunnel_type tun_type, u16 *mask)\n {\n \tswitch (tun_type) {\n \tcase ICE_SW_TUN_VXLAN_GPE:\n+\tcase ICE_SW_TUN_GENEVE:\n+\tcase ICE_SW_TUN_VXLAN:\n \tcase ICE_SW_TUN_NVGRE:\n \tcase ICE_SW_TUN_UDP:\n \tcase ICE_ALL_TUNNELS:\n \t\t*mask = ICE_TUN_FLAG_MASK;\n \t\treturn true;\n \n+\tcase ICE_SW_TUN_GENEVE_VLAN:\n+\tcase ICE_SW_TUN_VXLAN_VLAN:\n+\t\t*mask = ICE_TUN_FLAG_MASK & ~ICE_TUN_FLAG_VLAN_MASK;\n+\t\treturn true;\n+\n \tdefault:\n \t\t*mask = 0;\n \t\treturn false;\n@@ -6101,7 +6108,9 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,\n \t\tbreak;\n \tcase ICE_SW_TUN_VXLAN_GPE:\n \tcase ICE_SW_TUN_GENEVE:\n+\tcase ICE_SW_TUN_GENEVE_VLAN:\n \tcase ICE_SW_TUN_VXLAN:\n+\tcase ICE_SW_TUN_VXLAN_VLAN:\n \tcase ICE_SW_TUN_UDP:\n \tcase ICE_SW_TUN_GTP:\n \t\tprof_type = ICE_PROF_TUN_UDP;\n@@ -6209,7 +6218,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \tstruct ice_sw_fv_list_entry *tmp;\n \tenum ice_status status = ICE_SUCCESS;\n \tstruct ice_sw_recipe *rm;\n-\tbool match_tun = false;\n+\tu16 match_tun_mask = 0;\n \tu16 mask;\n \tu8 i;\n \n@@ -6272,9 +6281,9 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \t * differentiate different tunnel types. A separate recipe needs to be\n \t * used for the metadata.\n \t */\n-\tif (ice_tun_type_match_word(rinfo->tun_type, &mask) &&\n+\tif (ice_tun_type_match_word(rinfo->tun_type, &mask) &&\n \t rm->n_grp_count > 1)\n-\t\tmatch_tun = mask;\n+\t\tmatch_tun_mask = mask;\n \n \t/* set the recipe priority if specified */\n \trm->priority = (u8)rinfo->priority;\n@@ -6329,7 +6338,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \n \trm->tun_type = rinfo->tun_type;\n \t/* Recipe we need does not exist, add a recipe */\n-\tstatus = ice_add_sw_recipe(hw, rm, match_tun, profiles);\n+\tstatus = ice_add_sw_recipe(hw, rm, match_tun_mask, profiles);\n \tif (status)\n \t\tgoto err_unroll;\n \n@@ -6510,6 +6519,7 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,\n \t\t*offsets = dummy_udp_gtp_packet_offsets;\n \t\treturn;\n \t}\n+\n \tif (tun_type == ICE_SW_TUN_PPPOE && ipv6) {\n \t\t*pkt = dummy_pppoe_ipv6_packet;\n \t\t*pkt_len = sizeof(dummy_pppoe_ipv6_packet);\n@@ -6544,7 +6554,9 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,\n \t}\n \n \tif (tun_type == ICE_SW_TUN_VXLAN || tun_type == ICE_SW_TUN_GENEVE ||\n-\t tun_type == ICE_SW_TUN_VXLAN_GPE || tun_type == ICE_SW_TUN_UDP) {\n+\t tun_type == ICE_SW_TUN_VXLAN_GPE || tun_type == ICE_SW_TUN_UDP ||\n+\t tun_type == ICE_SW_TUN_GENEVE_VLAN ||\n+\t tun_type == ICE_SW_TUN_VXLAN_VLAN) {\n \t\tif (tcp) {\n \t\t\t*pkt = dummy_udp_tun_tcp_packet;\n \t\t\t*pkt_len = sizeof(dummy_udp_tun_tcp_packet);\n@@ -6751,12 +6763,14 @@ ice_fill_adv_packet_tun(struct ice_hw *hw, enum ice_sw_tunnel_type tun_type,\n \tcase ICE_SW_TUN_AND_NON_TUN:\n \tcase ICE_SW_TUN_VXLAN_GPE:\n \tcase ICE_SW_TUN_VXLAN:\n+\tcase ICE_SW_TUN_VXLAN_VLAN:\n \tcase ICE_SW_TUN_UDP:\n \t\tif (!ice_get_open_tunnel_port(hw, TNL_VXLAN, &open_port))\n \t\t\treturn ICE_ERR_CFG;\n \t\tbreak;\n \n \tcase ICE_SW_TUN_GENEVE:\n+\tcase ICE_SW_TUN_GENEVE_VLAN:\n \t\tif (!ice_get_open_tunnel_port(hw, TNL_GENEVE, &open_port))\n \t\t\treturn ICE_ERR_CFG;\n \t\tbreak;\n@@ -6865,13 +6879,6 @@ ice_adv_add_update_vsi_list(struct ice_hw *hw,\n \t cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI_LIST))\n \t\treturn ICE_ERR_NOT_IMPL;\n \n-\t/* Workaround fix for unexpected rule deletion by kernel PF\n-\t * during VF reset.\n-\t */\n-\tif (new_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI &&\n-\t cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI)\n-\t\treturn ICE_ERR_NOT_IMPL;\n-\n \tif (m_entry->vsi_count < 2 && !m_entry->vsi_list_info) {\n \t\t /* Only one entry existed in the mapping and it was not already\n \t\t * a part of a VSI list. So, create a VSI list with the old and\n", "prefixes": [ "v2", "21/52" ] }