get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/707/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 707,
    "url": "https://patches.dpdk.org/api/patches/707/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1412350612-23190-3-git-send-email-bruce.richardson@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1412350612-23190-3-git-send-email-bruce.richardson@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1412350612-23190-3-git-send-email-bruce.richardson@intel.com",
    "date": "2014-10-03T15:36:51",
    "name": "[dpdk-dev,2/3] mbuf: RX flag format update",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "f21ab15de6ff9862010509b3059caa58de25d974",
    "submitter": {
        "id": 20,
        "url": "https://patches.dpdk.org/api/people/20/?format=api",
        "name": "Bruce Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1412350612-23190-3-git-send-email-bruce.richardson@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/707/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/707/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 4CE817E17;\n\tFri,  3 Oct 2014 17:30:16 +0200 (CEST)",
            "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id CA4DFE82\n\tfor <dev@dpdk.org>; Fri,  3 Oct 2014 17:30:03 +0200 (CEST)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga103.jf.intel.com with ESMTP; 03 Oct 2014 08:34:31 -0700",
            "from irvmail001.ir.intel.com ([163.33.26.43])\n\tby orsmga001.jf.intel.com with ESMTP; 03 Oct 2014 08:36:54 -0700",
            "from sivswdev02.ir.intel.com (sivswdev02.ir.intel.com\n\t[10.237.217.46])\n\tby irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n\ts93FarUY032543; Fri, 3 Oct 2014 16:36:53 +0100",
            "from sivswdev02.ir.intel.com (localhost [127.0.0.1])\n\tby sivswdev02.ir.intel.com with ESMTP id s93Faq5m023239;\n\tFri, 3 Oct 2014 16:36:52 +0100",
            "(from bricha3@localhost)\n\tby sivswdev02.ir.intel.com with  id s93Faq5P023235;\n\tFri, 3 Oct 2014 16:36:52 +0100"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.04,647,1406617200\"; d=\"scan'208\";a=\"583081367\"",
        "From": "Bruce Richardson <bruce.richardson@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Fri,  3 Oct 2014 16:36:51 +0100",
        "Message-Id": "<1412350612-23190-3-git-send-email-bruce.richardson@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1412350612-23190-1-git-send-email-bruce.richardson@intel.com>",
        "References": "<1412350612-23190-1-git-send-email-bruce.richardson@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 2/3] mbuf: RX flag format update",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Update the format of the RX flags to match that of the TX flags. In\ngeneral the flags are now specified as \"1ULL << X\", with a few\nexceptions.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n lib/librte_mbuf/rte_mbuf.h | 32 ++++++++++++++++----------------\n 1 file changed, 16 insertions(+), 16 deletions(-)",
    "diff": "diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h\nindex 7aa507e..a4487bb 100644\n--- a/lib/librte_mbuf/rte_mbuf.h\n+++ b/lib/librte_mbuf/rte_mbuf.h\n@@ -75,22 +75,22 @@ extern \"C\" {\n  * - TX flags therefore start at bit position 55 (i.e. 63-8), and new flags get\n  *   added to the right of the previously defined flags\n  */\n-#define PKT_RX_VLAN_PKT      0x0001 /**< RX packet is a 802.1q VLAN packet. */\n-#define PKT_RX_RSS_HASH      0x0002 /**< RX packet with RSS hash result. */\n-#define PKT_RX_FDIR          0x0004 /**< RX packet with FDIR infos. */\n-#define PKT_RX_L4_CKSUM_BAD  0x0008 /**< L4 cksum of RX pkt. is not OK. */\n-#define PKT_RX_IP_CKSUM_BAD  0x0010 /**< IP cksum of RX pkt. is not OK. */\n-#define PKT_RX_EIP_CKSUM_BAD 0x0000 /**< External IP header checksum error. */\n-#define PKT_RX_OVERSIZE      0x0000 /**< Num of desc of an RX pkt oversize. */\n-#define PKT_RX_HBUF_OVERFLOW 0x0000 /**< Header buffer overflow. */\n-#define PKT_RX_RECIP_ERR     0x0000 /**< Hardware processing error. */\n-#define PKT_RX_MAC_ERR       0x0000 /**< MAC error. */\n-#define PKT_RX_IPV4_HDR      0x0020 /**< RX packet with IPv4 header. */\n-#define PKT_RX_IPV4_HDR_EXT  0x0040 /**< RX packet with extended IPv4 header. */\n-#define PKT_RX_IPV6_HDR      0x0080 /**< RX packet with IPv6 header. */\n-#define PKT_RX_IPV6_HDR_EXT  0x0100 /**< RX packet with extended IPv6 header. */\n-#define PKT_RX_IEEE1588_PTP  0x0200 /**< RX IEEE1588 L2 Ethernet PT Packet. */\n-#define PKT_RX_IEEE1588_TMST 0x0400 /**< RX IEEE1588 L2/L4 timestamped packet.*/\n+#define PKT_RX_VLAN_PKT      (1ULL << 0)  /**< RX packet is a 802.1q VLAN packet. */\n+#define PKT_RX_RSS_HASH      (1ULL << 1)  /**< RX packet with RSS hash result. */\n+#define PKT_RX_FDIR          (1ULL << 2)  /**< RX packet with FDIR infos. */\n+#define PKT_RX_L4_CKSUM_BAD  (1ULL << 3)  /**< L4 cksum of RX pkt. is not OK. */\n+#define PKT_RX_IP_CKSUM_BAD  (1ULL << 4)  /**< IP cksum of RX pkt. is not OK. */\n+#define PKT_RX_EIP_CKSUM_BAD (0ULL << 0)  /**< External IP header checksum error. */\n+#define PKT_RX_OVERSIZE      (0ULL << 0)  /**< Num of desc of an RX pkt oversize. */\n+#define PKT_RX_HBUF_OVERFLOW (0ULL << 0)  /**< Header buffer overflow. */\n+#define PKT_RX_RECIP_ERR     (0ULL << 0)  /**< Hardware processing error. */\n+#define PKT_RX_MAC_ERR       (0ULL << 0)  /**< MAC error. */\n+#define PKT_RX_IPV4_HDR      (1ULL << 5)  /**< RX packet with IPv4 header. */\n+#define PKT_RX_IPV4_HDR_EXT  (1ULL << 6)  /**< RX packet with extended IPv4 header. */\n+#define PKT_RX_IPV6_HDR      (1ULL << 7)  /**< RX packet with IPv6 header. */\n+#define PKT_RX_IPV6_HDR_EXT  (1ULL << 8)  /**< RX packet with extended IPv6 header. */\n+#define PKT_RX_IEEE1588_PTP  (1ULL << 9)  /**< RX IEEE1588 L2 Ethernet PT Packet. */\n+#define PKT_RX_IEEE1588_TMST (1ULL << 10) /**< RX IEEE1588 L2/L4 timestamped packet.*/\n \n #define PKT_TX_VLAN_PKT      (1ULL << 55) /**< TX packet is a 802.1q VLAN packet. */\n #define PKT_TX_IP_CKSUM      (1ULL << 54) /**< IP cksum of TX pkt. computed by NIC. */\n",
    "prefixes": [
        "dpdk-dev",
        "2/3"
    ]
}