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GET /api/patches/68373/?format=api
https://patches.dpdk.org/api/patches/68373/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200414061517.86124-2-leyi.rong@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200414061517.86124-2-leyi.rong@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200414061517.86124-2-leyi.rong@intel.com", "date": "2020-04-14T06:15:07", "name": "[v4,01/11] net/iavf: flexible Rx descriptor definitions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "19a3b133550a47a89392cda9f111eaae44904f81", "submitter": { "id": 1204, "url": "https://patches.dpdk.org/api/people/1204/?format=api", "name": "Leyi Rong", "email": "leyi.rong@intel.com" }, "delegate": { "id": 31221, "url": "https://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200414061517.86124-2-leyi.rong@intel.com/mbox/", "series": [ { "id": 9359, "url": "https://patches.dpdk.org/api/series/9359/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=9359", "date": "2020-04-14T06:15:06", "name": "framework for advanced iAVF PMD", "version": 4, "mbox": "https://patches.dpdk.org/series/9359/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/68373/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/68373/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 27776A0577;\n\tTue, 14 Apr 2020 08:25:18 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5331A1C0BE;\n\tTue, 14 Apr 2020 08:25:11 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id AFF791BE80\n for <dev@dpdk.org>; Tue, 14 Apr 2020 08:25:08 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Apr 2020 23:25:08 -0700", "from dpdk-lrong-srv-04.sh.intel.com ([10.67.119.221])\n by orsmga005.jf.intel.com with ESMTP; 13 Apr 2020 23:25:06 -0700" ], "IronPort-SDR": [ "\n hs5D6BK9OA1lUSd+SJCYdYuXrmU3i37y1YVhMG2Ed2NDJ+ZRz0HOFEZ42LFlwLyZjYGhXBk8nP\n 0VEYtghrSzHg==", "\n Q1ZoSiBtxtDEWZhs2j1sAEbhBz4BhOn8x30B5jMWYeT6wkOLtV+4pjZnTrooYoED59A9thRbJs\n BLrbkltZo4qw==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.72,381,1580803200\"; d=\"scan'208\";a=\"426956309\"", "From": "Leyi Rong <leyi.rong@intel.com>", "To": "jingjing.wu@intel.com, qi.z.zhang@intel.com, beilei.xing@intel.com,\n xiaolong.ye@intel.com", "Cc": "dev@dpdk.org,\n\tLeyi Rong <leyi.rong@intel.com>", "Date": "Tue, 14 Apr 2020 14:15:07 +0800", "Message-Id": "<20200414061517.86124-2-leyi.rong@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200414061517.86124-1-leyi.rong@intel.com>", "References": "<20200316074603.10998-1-leyi.rong@intel.com>\n <20200414061517.86124-1-leyi.rong@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 01/11] net/iavf: flexible Rx descriptor\n\tdefinitions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add definitions for flexible Rx descriptor structures and macros.\n\nSigned-off-by: Leyi Rong <leyi.rong@intel.com>\n---\n drivers/net/iavf/iavf_rxtx.h | 200 +++++++++++++++++++++++++++++++++++\n 1 file changed, 200 insertions(+)", "diff": "diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h\nindex 09b5bd99e..5e309631e 100644\n--- a/drivers/net/iavf/iavf_rxtx.h\n+++ b/drivers/net/iavf/iavf_rxtx.h\n@@ -157,6 +157,206 @@ union iavf_tx_offload {\n \t};\n };\n \n+/* Rx Flex Descriptors\n+ * These descriptors are used instead of the legacy version descriptors\n+ */\n+union iavf_16b_rx_flex_desc {\n+\tstruct {\n+\t\t__le64 pkt_addr; /* Packet buffer address */\n+\t\t__le64 hdr_addr; /* Header buffer address */\n+\t\t\t\t /* bit 0 of hdr_addr is DD bit */\n+\t} read;\n+\tstruct {\n+\t\t/* Qword 0 */\n+\t\tu8 rxdid; /* descriptor builder profile ID */\n+\t\tu8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */\n+\t\t__le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */\n+\t\t__le16 pkt_len; /* [15:14] are reserved */\n+\t\t__le16 hdr_len_sph_flex_flags1; /* header=[10:0] */\n+\t\t\t\t\t\t/* sph=[11:11] */\n+\t\t\t\t\t\t/* ff1/ext=[15:12] */\n+\n+\t\t/* Qword 1 */\n+\t\t__le16 status_error0;\n+\t\t__le16 l2tag1;\n+\t\t__le16 flex_meta0;\n+\t\t__le16 flex_meta1;\n+\t} wb; /* writeback */\n+};\n+\n+union iavf_32b_rx_flex_desc {\n+\tstruct {\n+\t\t__le64 pkt_addr; /* Packet buffer address */\n+\t\t__le64 hdr_addr; /* Header buffer address */\n+\t\t\t\t /* bit 0 of hdr_addr is DD bit */\n+\t\t__le64 rsvd1;\n+\t\t__le64 rsvd2;\n+\t} read;\n+\tstruct {\n+\t\t/* Qword 0 */\n+\t\tu8 rxdid; /* descriptor builder profile ID */\n+\t\tu8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */\n+\t\t__le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */\n+\t\t__le16 pkt_len; /* [15:14] are reserved */\n+\t\t__le16 hdr_len_sph_flex_flags1; /* header=[10:0] */\n+\t\t\t\t\t\t/* sph=[11:11] */\n+\t\t\t\t\t\t/* ff1/ext=[15:12] */\n+\n+\t\t/* Qword 1 */\n+\t\t__le16 status_error0;\n+\t\t__le16 l2tag1;\n+\t\t__le16 flex_meta0;\n+\t\t__le16 flex_meta1;\n+\n+\t\t/* Qword 2 */\n+\t\t__le16 status_error1;\n+\t\tu8 flex_flags2;\n+\t\tu8 time_stamp_low;\n+\t\t__le16 l2tag2_1st;\n+\t\t__le16 l2tag2_2nd;\n+\n+\t\t/* Qword 3 */\n+\t\t__le16 flex_meta2;\n+\t\t__le16 flex_meta3;\n+\t\tunion {\n+\t\t\tstruct {\n+\t\t\t\t__le16 flex_meta4;\n+\t\t\t\t__le16 flex_meta5;\n+\t\t\t} flex;\n+\t\t\t__le32 ts_high;\n+\t\t} flex_ts;\n+\t} wb; /* writeback */\n+};\n+\n+/* Rx Flex Descriptor for Comms Package Profile\n+ * RxDID Profile ID 16-21\n+ * Flex-field 0: RSS hash lower 16-bits\n+ * Flex-field 1: RSS hash upper 16-bits\n+ * Flex-field 2: Flow ID lower 16-bits\n+ * Flex-field 3: Flow ID upper 16-bits\n+ * Flex-field 4: AUX0\n+ * Flex-field 5: AUX1\n+ */\n+struct iavf_32b_rx_flex_desc_comms {\n+\t/* Qword 0 */\n+\tu8 rxdid;\n+\tu8 mir_id_umb_cast;\n+\t__le16 ptype_flexi_flags0;\n+\t__le16 pkt_len;\n+\t__le16 hdr_len_sph_flex_flags1;\n+\n+\t/* Qword 1 */\n+\t__le16 status_error0;\n+\t__le16 l2tag1;\n+\t__le32 rss_hash;\n+\n+\t/* Qword 2 */\n+\t__le16 status_error1;\n+\tu8 flexi_flags2;\n+\tu8 ts_low;\n+\t__le16 l2tag2_1st;\n+\t__le16 l2tag2_2nd;\n+\n+\t/* Qword 3 */\n+\t__le32 flow_id;\n+\tunion {\n+\t\tstruct {\n+\t\t\t__le16 aux0;\n+\t\t\t__le16 aux1;\n+\t\t} flex;\n+\t\t__le32 ts_high;\n+\t} flex_ts;\n+};\n+\n+/* Rx Flex Descriptor for Comms Package Profile\n+ * RxDID Profile ID 22-23 (swap Hash and FlowID)\n+ * Flex-field 0: Flow ID lower 16-bits\n+ * Flex-field 1: Flow ID upper 16-bits\n+ * Flex-field 2: RSS hash lower 16-bits\n+ * Flex-field 3: RSS hash upper 16-bits\n+ * Flex-field 4: AUX0\n+ * Flex-field 5: AUX1\n+ */\n+struct iavf_32b_rx_flex_desc_comms_ovs {\n+\t/* Qword 0 */\n+\tu8 rxdid;\n+\tu8 mir_id_umb_cast;\n+\t__le16 ptype_flexi_flags0;\n+\t__le16 pkt_len;\n+\t__le16 hdr_len_sph_flex_flags1;\n+\n+\t/* Qword 1 */\n+\t__le16 status_error0;\n+\t__le16 l2tag1;\n+\t__le32 flow_id;\n+\n+\t/* Qword 2 */\n+\t__le16 status_error1;\n+\tu8 flexi_flags2;\n+\tu8 ts_low;\n+\t__le16 l2tag2_1st;\n+\t__le16 l2tag2_2nd;\n+\n+\t/* Qword 3 */\n+\t__le32 rss_hash;\n+\tunion {\n+\t\tstruct {\n+\t\t\t__le16 aux0;\n+\t\t\t__le16 aux1;\n+\t\t} flex;\n+\t\t__le32 ts_high;\n+\t} flex_ts;\n+};\n+\n+/* Receive Flex Descriptor profile IDs: There are a total\n+ * of 64 profiles where profile IDs 0/1 are for legacy; and\n+ * profiles 2-63 are flex profiles that can be programmed\n+ * with a specific metadata (profile 7 reserved for HW)\n+ */\n+enum iavf_rxdid {\n+\tIAVF_RXDID_LEGACY_0\t\t= 0,\n+\tIAVF_RXDID_LEGACY_1\t\t= 1,\n+\tIAVF_RXDID_FLEX_NIC\t\t= 2,\n+\tIAVF_RXDID_FLEX_NIC_2\t\t= 6,\n+\tIAVF_RXDID_HW\t\t\t= 7,\n+\tIAVF_RXDID_COMMS_GENERIC\t= 16,\n+\tIAVF_RXDID_COMMS_AUX_VLAN\t= 17,\n+\tIAVF_RXDID_COMMS_AUX_IPV4\t= 18,\n+\tIAVF_RXDID_COMMS_AUX_IPV6\t= 19,\n+\tIAVF_RXDID_COMMS_AUX_IPV6_FLOW\t= 20,\n+\tIAVF_RXDID_COMMS_AUX_TCP\t= 21,\n+\tIAVF_RXDID_COMMS_OVS_1\t\t= 22,\n+\tIAVF_RXDID_COMMS_OVS_2\t\t= 23,\n+\tIAVF_RXDID_LAST\t\t\t= 63,\n+};\n+\n+enum iavf_rx_flex_desc_status_error_0_bits {\n+\t/* Note: These are predefined bit offsets */\n+\tIAVF_RX_FLEX_DESC_STATUS0_DD_S = 0,\n+\tIAVF_RX_FLEX_DESC_STATUS0_EOF_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_HBO_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_L3L4P_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_XSUM_IPE_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_XSUM_L4E_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_LPBK_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_IPV6EXADD_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_RXE_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_CRCP_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_RSS_VALID_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_L2TAG1P_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_XTRMD0_VALID_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_XTRMD1_VALID_S,\n+\tIAVF_RX_FLEX_DESC_STATUS0_LAST /* this entry must be last!!! */\n+};\n+\n+/* for iavf_32b_rx_flex_desc.ptype_flex_flags0 member */\n+#define IAVF_RX_FLEX_DESC_PTYPE_M\t(0x3FF) /* 10-bits */\n+\n+/* for iavf_32b_rx_flex_desc.pkt_len member */\n+#define IAVF_RX_FLX_DESC_PKT_LEN_M\t(0x3FFF) /* 14-bits */\n+\n int iavf_dev_rx_queue_setup(struct rte_eth_dev *dev,\n \t\t\t uint16_t queue_idx,\n \t\t\t uint16_t nb_desc,\n", "prefixes": [ "v4", "01/11" ] }{ "id": 68373, "url": "