Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/68216/?format=api
{ "id": 68216, "url": "https://patches.dpdk.org/api/patches/68216/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200411141428.1987768-27-jerinj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200411141428.1987768-27-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200411141428.1987768-27-jerinj@marvell.com", "date": "2020-04-11T14:14:25", "name": "[v5,26/29] l3fwd-graph: add ethdev configuration changes", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0d2f73bc1e241ecc9d3c4570d41a505e73e133df", "submitter": { "id": 1188, "url": "https://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200411141428.1987768-27-jerinj@marvell.com/mbox/", "series": [ { "id": 9314, "url": "https://patches.dpdk.org/api/series/9314/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=9314", "date": "2020-04-11T14:13:59", "name": "graph: introduce graph subsystem", "version": 5, "mbox": "https://patches.dpdk.org/series/9314/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/68216/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/68216/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D821BA059F;\n\tSat, 11 Apr 2020 16:19:51 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 25B341C1F8;\n\tSat, 11 Apr 2020 16:16:24 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id B1D2D1C1D0\n for <dev@dpdk.org>; Sat, 11 Apr 2020 16:16:22 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 03BEFc5X021932; Sat, 11 Apr 2020 07:16:20 -0700", "from sc-exch03.marvell.com ([199.233.58.183])\n by mx0a-0016f401.pphosted.com with ESMTP id 30bb8q8n8w-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Sat, 11 Apr 2020 07:16:20 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Sat, 11 Apr 2020 07:16:18 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Sat, 11 Apr 2020 07:16:18 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n by maili.marvell.com (Postfix) with ESMTP id 2BBB43F7048;\n Sat, 11 Apr 2020 07:16:13 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=ncvj1ockE5iKGLrKyiTV+mkI96DsbEILAbUL9x0V0AY=;\n b=laJ+BAclvQhJU1d3pfiLuFvrgTSx9VCzPdJbEW3g5XE1UZVElNyyzs16Q/hkvVlMsZNY\n 6neApkTUk8O1yOTUzGqfa6eF9Cc7pVk0BLxnxH1P1A3kZvAYkYTAf0eHxLCFvmfrF4Nr\n ak/tAvz4XAi1U2S3ZDvpYDqQlMc5V6pkwE2xJPL1cMYO2kX+M2rdc9yiYGYqopStLcZA\n MAGKEy+LLZ3NCaui4qls6kpHhU2X9ydhRvMe8xab35ISPB0dxD72EXlKh3+6lDyROcKo\n 1mLx6mTaYBeBKPK4/cVX7+0WEs1BJaLrPZI7cYM6zuMz40eUmj8bRxbwBjwyTufKFuvH hQ==", "From": "<jerinj@marvell.com>", "To": "Marko Kovacevic <marko.kovacevic@intel.com>, Ori Kam <orika@mellanox.com>,\n Bruce Richardson <bruce.richardson@intel.com>, Radu Nicolau\n <radu.nicolau@intel.com>, Akhil Goyal <akhil.goyal@nxp.com>,\n Tomasz Kantecki <tomasz.kantecki@intel.com>,\n Sunil Kumar Kori <skori@marvell.com>, \"Pavan\n Nikhilesh\" <pbhagavatula@marvell.com>, Nithin Dabilpuram\n <ndabilpuram@marvell.com>", "CC": "<dev@dpdk.org>, <thomas@monjalon.net>, <david.marchand@redhat.com>,\n <mdr@ashroe.eu>, <mattias.ronnblom@ericsson.com>,\n <kirankumark@marvell.com>, <xiao.w.wang@intel.com>, <amo@semihalf.com>", "Date": "Sat, 11 Apr 2020 19:44:25 +0530", "Message-ID": "<20200411141428.1987768-27-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20200411141428.1987768-1-jerinj@marvell.com>", "References": "<20200405085613.1336841-1-jerinj@marvell.com>\n <20200411141428.1987768-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676\n definitions=2020-04-11_04:2020-04-09,\n 2020-04-11 signatures=0", "Subject": "[dpdk-dev] [PATCH v5 26/29] l3fwd-graph: add ethdev configuration\n\tchanges", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Nithin Dabilpuram <ndabilpuram@marvell.com>\n\nAdd changes to ethdev port and queue configuration based\non command line parameters for l3fwd graph application.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n examples/l3fwd-graph/main.c | 350 +++++++++++++++++++++++++++++++++++-\n 1 file changed, 349 insertions(+), 1 deletion(-)", "diff": "diff --git a/examples/l3fwd-graph/main.c b/examples/l3fwd-graph/main.c\nindex ab6713488..7ea788589 100644\n--- a/examples/l3fwd-graph/main.c\n+++ b/examples/l3fwd-graph/main.c\n@@ -20,8 +20,10 @@\n \n #include <rte_branch_prediction.h>\n #include <rte_common.h>\n+#include <rte_cycles.h>\n #include <rte_eal.h>\n #include <rte_ethdev.h>\n+#include <rte_lcore.h>\n #include <rte_log.h>\n #include <rte_mempool.h>\n #include <rte_per_lcore.h>\n@@ -49,6 +51,10 @@\n \n #define NB_SOCKETS 8\n \n+/* Static global variables used within this file. */\n+static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;\n+static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;\n+\n /**< Ports set in promiscuous mode off by default. */\n static int promiscuous_on;\n \n@@ -60,6 +66,7 @@ static volatile bool force_quit;\n \n /* Ethernet addresses of ports */\n static uint64_t dest_eth_addr[RTE_MAX_ETHPORTS];\n+static struct rte_ether_addr ports_eth_addr[RTE_MAX_ETHPORTS];\n xmm_t val_eth[RTE_MAX_ETHPORTS];\n \n /* Mask of enabled ports */\n@@ -110,6 +117,8 @@ static struct rte_eth_conf port_conf = {\n \t},\n };\n \n+static struct rte_mempool *pktmbuf_pool[RTE_MAX_ETHPORTS][NB_SOCKETS];\n+\n static int\n check_lcore_params(void)\n {\n@@ -165,6 +174,27 @@ check_port_config(void)\n \treturn 0;\n }\n \n+static uint8_t\n+get_port_n_rx_queues(const uint16_t port)\n+{\n+\tint queue = -1;\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < nb_lcore_params; ++i) {\n+\t\tif (lcore_params[i].port_id == port) {\n+\t\t\tif (lcore_params[i].queue_id == queue + 1)\n+\t\t\t\tqueue = lcore_params[i].queue_id;\n+\t\t\telse\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t \"Queue ids of the port %d must be\"\n+\t\t\t\t\t \" in sequence and must start with 0\\n\",\n+\t\t\t\t\t lcore_params[i].port_id);\n+\t\t}\n+\t}\n+\n+\treturn (uint8_t)(++queue);\n+}\n+\n static int\n init_lcore_rx_queues(void)\n {\n@@ -479,6 +509,120 @@ parse_args(int argc, char **argv)\n \treturn ret;\n }\n \n+static void\n+print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)\n+{\n+\tchar buf[RTE_ETHER_ADDR_FMT_SIZE];\n+\trte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr);\n+\tprintf(\"%s%s\", name, buf);\n+}\n+\n+static int\n+init_mem(uint16_t portid, uint32_t nb_mbuf)\n+{\n+\tuint32_t lcore_id;\n+\tint socketid;\n+\tchar s[64];\n+\n+\tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\tif (rte_lcore_is_enabled(lcore_id) == 0)\n+\t\t\tcontinue;\n+\n+\t\tif (numa_on)\n+\t\t\tsocketid = rte_lcore_to_socket_id(lcore_id);\n+\t\telse\n+\t\t\tsocketid = 0;\n+\n+\t\tif (socketid >= NB_SOCKETS) {\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"Socket %d of lcore %u is out of range %d\\n\",\n+\t\t\t\t socketid, lcore_id, NB_SOCKETS);\n+\t\t}\n+\n+\t\tif (pktmbuf_pool[portid][socketid] == NULL) {\n+\t\t\tsnprintf(s, sizeof(s), \"mbuf_pool_%d:%d\", portid,\n+\t\t\t\t socketid);\n+\t\t\t/* Create a pool with priv size of a cacheline */\n+\t\t\tpktmbuf_pool[portid][socketid] =\n+\t\t\t\trte_pktmbuf_pool_create(\n+\t\t\t\t\ts, nb_mbuf, MEMPOOL_CACHE_SIZE,\n+\t\t\t\t\tRTE_CACHE_LINE_SIZE,\n+\t\t\t\t\tRTE_MBUF_DEFAULT_BUF_SIZE, socketid);\n+\t\t\tif (pktmbuf_pool[portid][socketid] == NULL)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t \"Cannot init mbuf pool on socket %d\\n\",\n+\t\t\t\t\t socketid);\n+\t\t\telse\n+\t\t\t\tprintf(\"Allocated mbuf pool on socket %d\\n\",\n+\t\t\t\t socketid);\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Check the link status of all ports in up to 9s, and print them finally */\n+static void\n+check_all_ports_link_status(uint32_t port_mask)\n+{\n+#define CHECK_INTERVAL 100 /* 100ms */\n+#define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */\n+\tuint8_t count, all_ports_up, print_flag = 0;\n+\tstruct rte_eth_link link;\n+\tuint16_t portid;\n+\n+\tprintf(\"\\nChecking link status\");\n+\tfflush(stdout);\n+\tfor (count = 0; count <= MAX_CHECK_TIME; count++) {\n+\t\tif (force_quit)\n+\t\t\treturn;\n+\t\tall_ports_up = 1;\n+\t\tRTE_ETH_FOREACH_DEV(portid)\n+\t\t{\n+\t\t\tif (force_quit)\n+\t\t\t\treturn;\n+\t\t\tif ((port_mask & (1 << portid)) == 0)\n+\t\t\t\tcontinue;\n+\t\t\tmemset(&link, 0, sizeof(link));\n+\t\t\trte_eth_link_get_nowait(portid, &link);\n+\t\t\t/* Print link status if flag set */\n+\t\t\tif (print_flag == 1) {\n+\t\t\t\tif (link.link_status)\n+\t\t\t\t\tprintf(\"Port%d Link Up. Speed %u Mbps \"\n+\t\t\t\t\t \"-%s\\n\",\n+\t\t\t\t\t portid, link.link_speed,\n+\t\t\t\t\t (link.link_duplex ==\n+\t\t\t\t\t\tETH_LINK_FULL_DUPLEX)\n+\t\t\t\t\t\t ? (\"full-duplex\")\n+\t\t\t\t\t\t : (\"half-duplex\\n\"));\n+\t\t\t\telse\n+\t\t\t\t\tprintf(\"Port %d Link Down\\n\", portid);\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\t/* Clear all_ports_up flag if any link down */\n+\t\t\tif (link.link_status == ETH_LINK_DOWN) {\n+\t\t\t\tall_ports_up = 0;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t\t/* After finally printing all link status, get out */\n+\t\tif (print_flag == 1)\n+\t\t\tbreak;\n+\n+\t\tif (all_ports_up == 0) {\n+\t\t\tprintf(\".\");\n+\t\t\tfflush(stdout);\n+\t\t\trte_delay_ms(CHECK_INTERVAL);\n+\t\t}\n+\n+\t\t/* Set the print_flag if all ports up or timeout */\n+\t\tif (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {\n+\t\t\tprint_flag = 1;\n+\t\t\tprintf(\"Done\\n\");\n+\t\t}\n+\t}\n+}\n+\n static void\n signal_handler(int signum)\n {\n@@ -492,7 +636,14 @@ signal_handler(int signum)\n int\n main(int argc, char **argv)\n {\n-\tuint16_t portid;\n+\tuint8_t nb_rx_queue, queue, socketid;\n+\tstruct rte_eth_dev_info dev_info;\n+\tuint32_t n_tx_queue, nb_lcores;\n+\tstruct rte_eth_txconf *txconf;\n+\tuint16_t queueid, portid;\n+\tstruct lcore_conf *qconf;\n+\tuint32_t lcore_id;\n+\tuint32_t nb_ports;\n \tint ret;\n \n \t/* Init EAL */\n@@ -528,6 +679,203 @@ main(int argc, char **argv)\n \tif (check_port_config() < 0)\n \t\trte_exit(EXIT_FAILURE, \"check_port_config() failed\\n\");\n \n+\tnb_ports = rte_eth_dev_count_avail();\n+\tnb_lcores = rte_lcore_count();\n+\n+\t/* Initialize all ports */\n+\tRTE_ETH_FOREACH_DEV(portid)\n+\t{\n+\t\tstruct rte_eth_conf local_port_conf = port_conf;\n+\n+\t\t/* Skip ports that are not enabled */\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0) {\n+\t\t\tprintf(\"\\nSkipping disabled port %d\\n\", portid);\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* Init port */\n+\t\tprintf(\"Initializing port %d ... \", portid);\n+\t\tfflush(stdout);\n+\n+\t\tnb_rx_queue = get_port_n_rx_queues(portid);\n+\t\tn_tx_queue = nb_lcores;\n+\t\tif (n_tx_queue > MAX_TX_QUEUE_PER_PORT)\n+\t\t\tn_tx_queue = MAX_TX_QUEUE_PER_PORT;\n+\t\tprintf(\"Creating queues: nb_rxq=%d nb_txq=%u... \",\n+\t\t nb_rx_queue, n_tx_queue);\n+\n+\t\trte_eth_dev_info_get(portid, &dev_info);\n+\t\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n+\t\t\tlocal_port_conf.txmode.offloads |=\n+\t\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n+\n+\t\tlocal_port_conf.rx_adv_conf.rss_conf.rss_hf &=\n+\t\t\tdev_info.flow_type_rss_offloads;\n+\t\tif (local_port_conf.rx_adv_conf.rss_conf.rss_hf !=\n+\t\t port_conf.rx_adv_conf.rss_conf.rss_hf) {\n+\t\t\tprintf(\"Port %u modified RSS hash function based on \"\n+\t\t\t \"hardware support,\"\n+\t\t\t \"requested:%#\" PRIx64 \" configured:%#\" PRIx64\n+\t\t\t \"\\n\",\n+\t\t\t portid, port_conf.rx_adv_conf.rss_conf.rss_hf,\n+\t\t\t local_port_conf.rx_adv_conf.rss_conf.rss_hf);\n+\t\t}\n+\n+\t\tret = rte_eth_dev_configure(portid, nb_rx_queue,\n+\t\t\t\t\t n_tx_queue, &local_port_conf);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"Cannot configure device: err=%d, port=%d\\n\",\n+\t\t\t\t ret, portid);\n+\n+\t\tret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &nb_rxd,\n+\t\t\t\t\t\t &nb_txd);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"Cannot adjust number of descriptors: err=%d, \"\n+\t\t\t\t \"port=%d\\n\",\n+\t\t\t\t ret, portid);\n+\n+\t\trte_eth_macaddr_get(portid, &ports_eth_addr[portid]);\n+\t\tprint_ethaddr(\" Address:\", &ports_eth_addr[portid]);\n+\t\tprintf(\", \");\n+\t\tprint_ethaddr(\n+\t\t\t\"Destination:\",\n+\t\t\t(const struct rte_ether_addr *)&dest_eth_addr[portid]);\n+\t\tprintf(\", \");\n+\n+\t\t/*\n+\t\t * prepare src MACs for each port.\n+\t\t */\n+\t\trte_ether_addr_copy(\n+\t\t\t&ports_eth_addr[portid],\n+\t\t\t(struct rte_ether_addr *)(val_eth + portid) + 1);\n+\n+\t\t/* Init memory */\n+\t\tif (!per_port_pool) {\n+\t\t\t/* portid = 0; this is *not* signifying the first port,\n+\t\t\t * rather, it signifies that portid is ignored.\n+\t\t\t */\n+\t\t\tret = init_mem(0, NB_MBUF(nb_ports));\n+\t\t} else {\n+\t\t\tret = init_mem(portid, NB_MBUF(1));\n+\t\t}\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE, \"init_mem() failed\\n\");\n+\n+\t\t/* Init one TX queue per couple (lcore,port) */\n+\t\tqueueid = 0;\n+\t\tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\t\tif (rte_lcore_is_enabled(lcore_id) == 0)\n+\t\t\t\tcontinue;\n+\n+\t\t\tqconf = &lcore_conf[lcore_id];\n+\n+\t\t\tif (numa_on)\n+\t\t\t\tsocketid = (uint8_t)rte_lcore_to_socket_id(\n+\t\t\t\t\tlcore_id);\n+\t\t\telse\n+\t\t\t\tsocketid = 0;\n+\n+\t\t\tprintf(\"txq=%u,%d,%d \", lcore_id, queueid, socketid);\n+\t\t\tfflush(stdout);\n+\n+\t\t\ttxconf = &dev_info.default_txconf;\n+\t\t\ttxconf->offloads = local_port_conf.txmode.offloads;\n+\t\t\tret = rte_eth_tx_queue_setup(portid, queueid, nb_txd,\n+\t\t\t\t\t\t socketid, txconf);\n+\t\t\tif (ret < 0)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t \"rte_eth_tx_queue_setup: err=%d, \"\n+\t\t\t\t\t \"port=%d\\n\",\n+\t\t\t\t\t ret, portid);\n+\t\t\tqueueid++;\n+\t\t}\n+\n+\t\tprintf(\"\\n\");\n+\t}\n+\n+\tfor (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {\n+\t\tif (rte_lcore_is_enabled(lcore_id) == 0)\n+\t\t\tcontinue;\n+\t\tqconf = &lcore_conf[lcore_id];\n+\t\tprintf(\"\\nInitializing rx queues on lcore %u ... \", lcore_id);\n+\t\tfflush(stdout);\n+\t\t/* Init RX queues */\n+\t\tfor (queue = 0; queue < qconf->n_rx_queue; ++queue) {\n+\t\t\tstruct rte_eth_rxconf rxq_conf;\n+\n+\t\t\tportid = qconf->rx_queue_list[queue].port_id;\n+\t\t\tqueueid = qconf->rx_queue_list[queue].queue_id;\n+\n+\t\t\tif (numa_on)\n+\t\t\t\tsocketid = (uint8_t)rte_lcore_to_socket_id(\n+\t\t\t\t\tlcore_id);\n+\t\t\telse\n+\t\t\t\tsocketid = 0;\n+\n+\t\t\tprintf(\"rxq=%d,%d,%d \", portid, queueid, socketid);\n+\t\t\tfflush(stdout);\n+\n+\t\t\trte_eth_dev_info_get(portid, &dev_info);\n+\t\t\trxq_conf = dev_info.default_rxconf;\n+\t\t\trxq_conf.offloads = port_conf.rxmode.offloads;\n+\t\t\tif (!per_port_pool)\n+\t\t\t\tret = rte_eth_rx_queue_setup(\n+\t\t\t\t\tportid, queueid, nb_rxd, socketid,\n+\t\t\t\t\t&rxq_conf, pktmbuf_pool[0][socketid]);\n+\t\t\telse\n+\t\t\t\tret = rte_eth_rx_queue_setup(\n+\t\t\t\t\tportid, queueid, nb_rxd, socketid,\n+\t\t\t\t\t&rxq_conf,\n+\t\t\t\t\tpktmbuf_pool[portid][socketid]);\n+\t\t\tif (ret < 0)\n+\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t\t \"rte_eth_rx_queue_setup: err=%d, \"\n+\t\t\t\t\t \"port=%d\\n\",\n+\t\t\t\t\t ret, portid);\n+\n+\t\t}\n+\t}\n+\n+\tprintf(\"\\n\");\n+\n+\t/* Start ports */\n+\tRTE_ETH_FOREACH_DEV(portid)\n+\t{\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0)\n+\t\t\tcontinue;\n+\n+\t\t/* Start device */\n+\t\tret = rte_eth_dev_start(portid);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"rte_eth_dev_start: err=%d, port=%d\\n\", ret,\n+\t\t\t\t portid);\n+\n+\t\t/*\n+\t\t * If enabled, put device in promiscuous mode.\n+\t\t * This allows IO forwarding mode to forward packets\n+\t\t * to itself through 2 cross-connected ports of the\n+\t\t * target machine.\n+\t\t */\n+\t\tif (promiscuous_on)\n+\t\t\trte_eth_promiscuous_enable(portid);\n+\t}\n+\n+\tprintf(\"\\n\");\n+\n+\tcheck_all_ports_link_status(enabled_port_mask);\n+\n+\t/* Stop ports */\n+\tRTE_ETH_FOREACH_DEV(portid) {\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0)\n+\t\t\tcontinue;\n+\t\tprintf(\"Closing port %d...\", portid);\n+\t\trte_eth_dev_stop(portid);\n+\t\trte_eth_dev_close(portid);\n+\t\tprintf(\" Done\\n\");\n+\t}\n \tprintf(\"Bye...\\n\");\n \n \treturn ret;\n", "prefixes": [ "v5", "26/29" ] }