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GET /api/patches/67991/?format=api
{ "id": 67991, "url": "https://patches.dpdk.org/api/patches/67991/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200408082921.31000-26-mk@semihalf.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200408082921.31000-26-mk@semihalf.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200408082921.31000-26-mk@semihalf.com", "date": "2020-04-08T08:29:16", "name": "[v3,25/30] net/ena: limit refill threshold by fixed value", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c8f4b0898f042fbc694bf4c78d73ddddb74a5aa4", "submitter": { "id": 786, "url": "https://patches.dpdk.org/api/people/786/?format=api", "name": "Michal Krawczyk", "email": "mk@semihalf.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200408082921.31000-26-mk@semihalf.com/mbox/", "series": [ { "id": 9246, "url": "https://patches.dpdk.org/api/series/9246/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=9246", "date": "2020-04-08T08:28:51", "name": "Update ENA driver to v2.1.0", "version": 3, "mbox": "https://patches.dpdk.org/series/9246/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/67991/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/67991/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F24E8A0597;\n\tWed, 8 Apr 2020 10:33:46 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 01BC51C1E2;\n\tWed, 8 Apr 2020 10:30:04 +0200 (CEST)", "from mail-lj1-f194.google.com (mail-lj1-f194.google.com\n [209.85.208.194]) by dpdk.org (Postfix) with ESMTP id 0981E1C115\n for <dev@dpdk.org>; Wed, 8 Apr 2020 10:29:58 +0200 (CEST)", "by mail-lj1-f194.google.com with SMTP id p10so6713355ljn.1\n for <dev@dpdk.org>; Wed, 08 Apr 2020 01:29:58 -0700 (PDT)", "from mkPC.semihalf.local (193-106-246-138.noc.fibertech.net.pl.\n [193.106.246.138])\n by smtp.gmail.com with ESMTPSA id e8sm765685lja.3.2020.04.08.01.29.56\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 08 Apr 2020 01:29:56 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=semihalf-com.20150623.gappssmtp.com; s=20150623;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=/kYh8shi4DGZscYSsWJJmp7vlK+UMm6qliWJ9GVFOHU=;\n b=JfoaejCHIYpw3/dOETFj6QU9pmT8Y0lxIEuYn4zEvXn7AAWKsiycVTFlJodqQByjvn\n g/x+VWDW7MmazWNNnkDsA4gREeaQwpt2HaLOZlfIT1Kq4NxKFJojeLTfIWq4pNdBMi64\n LT39KDO7LexIbStDdi0zUM93P9d0K1mLCiuSuRTgMpm1W6Dm3GUmut8a6eTQF48JKCwP\n PuNcmqmfnEdBp9rU6IZVRDsOSY9AEptiobSWb11pDtCjD0Go0DwYHcdWfFTbyAqmroyo\n 6CXx3sLRYuH5cCQiwyOGmpSan62+Lw64CMhEYZ1cE+qs8hPMMS4BTQGG10h707zSE5VB\n 8ehQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=/kYh8shi4DGZscYSsWJJmp7vlK+UMm6qliWJ9GVFOHU=;\n b=qzPYHrc3Yg1pxi3HABys4+hGBtIrBoD2MtCXO5eDURQwbGCFhbgfA4Lf5rUBEYs9sA\n TCuWzGT4VAlUWEqOSm0Cnr0hwLch9uwB5gyUetm4O4v4JOlCtUuupXc8jzSTyCAMqYs1\n vf4PeoAd9BxSN4FJbeuitbOsrzNeLEDt6216CKHO/oBpfnfv0sWknnoWQ1yK6kpOb5x2\n gZqQQMQ3JAQidgJr4SZetqqEV1+7YbdorI1OxvENdwFv5vluvqQb6xTz8lYgsDP3UjrY\n +XABu1Iy7G+bN1wMmnohd6+B30GqmO+FGWH0vae1pMxtRyLI3DYCZAjng7F2H8HXArhq\n I3lA==", "X-Gm-Message-State": "AGi0PuaOkxmbGYaABWpPmbGo6Y8P1AZVX89Vg677Wi2hxQKk8PiBgXBw\n lrksehEZcu7O5v2Ao+izwVnYOc3HVTE=", "X-Google-Smtp-Source": "\n APiQypI1PLzrCnJ+ma5lbaKK5jua2Hql4T5pSC+vbRfXRgpWMkIZ1fNlX68IQ1p49RHqPs07pbjAIA==", "X-Received": "by 2002:a2e:9f13:: with SMTP id u19mr4310780ljk.14.1586334597345;\n Wed, 08 Apr 2020 01:29:57 -0700 (PDT)", "From": "Michal Krawczyk <mk@semihalf.com>", "To": "dev@dpdk.org", "Cc": "mw@semihalf.com, mba@semihalf.com, gtzalik@amazon.com, evgenys@amazon.com,\n igorch@amazon.com, ferruh.yigit@intel.com, arybchenko@solarflare.com,\n Michal Krawczyk <mk@semihalf.com>", "Date": "Wed, 8 Apr 2020 10:29:16 +0200", "Message-Id": "<20200408082921.31000-26-mk@semihalf.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20200408082921.31000-1-mk@semihalf.com>", "References": "<20200408082921.31000-1-mk@semihalf.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3 25/30] net/ena: limit refill threshold by\n\tfixed value", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Divider used for both Tx and Rx cleanup/refill threshold can cause too\nbig delay in case of the really big rings - for example if the 8k Rx\nring will be used, the refill won't trigger unless 1024 threshold will\nbe reached. It will also cause driver to try to allocate that much\ndescriptors.\n\nLimiting it by fixed value - 256 in that case, would limit maximum\ntime spent in repopulate function.\n\nSigned-off-by: Michal Krawczyk <mk@semihalf.com>\nReviewed-by: Igor Chauskin <igorch@amazon.com>\nReviewed-by: Guy Tzalik <gtzalik@amazon.com>\n---\n drivers/net/ena/ena_ethdev.c | 27 ++++++++++++++-------------\n drivers/net/ena/ena_ethdev.h | 10 ++++++++++\n 2 files changed, 24 insertions(+), 13 deletions(-)", "diff": "diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c\nindex 9d76ebb0d9..7804a5c85d 100644\n--- a/drivers/net/ena/ena_ethdev.c\n+++ b/drivers/net/ena/ena_ethdev.c\n@@ -35,14 +35,6 @@\n /*reverse version of ENA_IO_RXQ_IDX*/\n #define ENA_IO_RXQ_IDX_REV(q)\t((q - 1) / 2)\n \n-/* While processing submitted and completed descriptors (rx and tx path\n- * respectively) in a loop it is desired to:\n- * - perform batch submissions while populating sumbissmion queue\n- * - avoid blocking transmission of other packets during cleanup phase\n- * Hence the utilization ratio of 1/8 of a queue size.\n- */\n-#define ENA_RING_DESCS_RATIO(ring_size)\t(ring_size / 8)\n-\n #define __MERGE_64B_H_L(h, l) (((uint64_t)h << 32) | l)\n #define TEST_BIT(val, bit_shift) (val & (1UL << bit_shift))\n \n@@ -2146,7 +2138,8 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tstruct ena_ring *rx_ring = (struct ena_ring *)(rx_queue);\n \tunsigned int ring_size = rx_ring->ring_size;\n \tunsigned int ring_mask = ring_size - 1;\n-\tunsigned int refill_required;\n+\tunsigned int free_queue_entries;\n+\tunsigned int refill_threshold;\n \tuint16_t next_to_clean = rx_ring->next_to_clean;\n \tuint16_t descs_in_use;\n \tstruct rte_mbuf *mbuf;\n@@ -2215,11 +2208,15 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \trx_ring->rx_stats.cnt += completed;\n \trx_ring->next_to_clean = next_to_clean;\n \n-\trefill_required = ena_com_free_q_entries(rx_ring->ena_com_io_sq);\n+\tfree_queue_entries = ena_com_free_q_entries(rx_ring->ena_com_io_sq);\n+\trefill_threshold =\n+\t\tRTE_MIN(ring_size / ENA_REFILL_THRESH_DIVIDER,\n+\t\t(unsigned int)ENA_REFILL_THRESH_PACKET);\n+\n \t/* Burst refill to save doorbells, memory barriers, const interval */\n-\tif (refill_required > ENA_RING_DESCS_RATIO(ring_size)) {\n+\tif (free_queue_entries > refill_threshold) {\n \t\tena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);\n-\t\tena_populate_rx_queue(rx_ring, refill_required);\n+\t\tena_populate_rx_queue(rx_ring, free_queue_entries);\n \t}\n \n \treturn completed;\n@@ -2358,6 +2355,7 @@ static uint16_t eth_ena_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \tuint16_t seg_len;\n \tunsigned int ring_size = tx_ring->ring_size;\n \tunsigned int ring_mask = ring_size - 1;\n+\tunsigned int cleanup_budget;\n \tstruct ena_com_tx_ctx ena_tx_ctx;\n \tstruct ena_tx_buffer *tx_info;\n \tstruct ena_com_buf *ebuf;\n@@ -2515,9 +2513,12 @@ static uint16_t eth_ena_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t/* Put back descriptor to the ring for reuse */\n \t\ttx_ring->empty_tx_reqs[next_to_clean & ring_mask] = req_id;\n \t\tnext_to_clean++;\n+\t\tcleanup_budget =\n+\t\t\tRTE_MIN(ring_size / ENA_REFILL_THRESH_DIVIDER,\n+\t\t\t(unsigned int)ENA_REFILL_THRESH_PACKET);\n \n \t\t/* If too many descs to clean, leave it for another run */\n-\t\tif (unlikely(total_tx_descs > ENA_RING_DESCS_RATIO(ring_size)))\n+\t\tif (unlikely(total_tx_descs > cleanup_budget))\n \t\t\tbreak;\n \t}\n \ttx_ring->tx_stats.available_desc =\ndiff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h\nindex 6bcca08563..13d87d48f0 100644\n--- a/drivers/net/ena/ena_ethdev.h\n+++ b/drivers/net/ena/ena_ethdev.h\n@@ -30,6 +30,16 @@\n #define ENA_WD_TIMEOUT_SEC\t3\n #define ENA_DEVICE_KALIVE_TIMEOUT (ENA_WD_TIMEOUT_SEC * rte_get_timer_hz())\n \n+/* While processing submitted and completed descriptors (rx and tx path\n+ * respectively) in a loop it is desired to:\n+ * - perform batch submissions while populating sumbissmion queue\n+ * - avoid blocking transmission of other packets during cleanup phase\n+ * Hence the utilization ratio of 1/8 of a queue size or max value if the size\n+ * of the ring is very big - like 8k Rx rings.\n+ */\n+#define ENA_REFILL_THRESH_DIVIDER 8\n+#define ENA_REFILL_THRESH_PACKET 256\n+\n struct ena_adapter;\n \n enum ena_ring_type {\n", "prefixes": [ "v3", "25/30" ] }