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GET /api/patches/67606/?format=api
{ "id": 67606, "url": "https://patches.dpdk.org/api/patches/67606/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200401142127.13715-22-mk@semihalf.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200401142127.13715-22-mk@semihalf.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200401142127.13715-22-mk@semihalf.com", "date": "2020-04-01T14:21:19", "name": "[v2,21/29] net/ena: refactor Rx path", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d15cd1f12a3f8a754f3749e4d5652905bdd56307", "submitter": { "id": 786, "url": "https://patches.dpdk.org/api/people/786/?format=api", "name": "Michal Krawczyk", "email": "mk@semihalf.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200401142127.13715-22-mk@semihalf.com/mbox/", "series": [ { "id": 9153, "url": "https://patches.dpdk.org/api/series/9153/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=9153", "date": "2020-04-01T14:20:58", "name": "Update ENA driver to v2.1.0", "version": 2, "mbox": "https://patches.dpdk.org/series/9153/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/67606/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/67606/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 19E4BA057B;\n\tWed, 1 Apr 2020 16:25:32 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BD26B1C10A;\n\tWed, 1 Apr 2020 16:22:11 +0200 (CEST)", "from mail-lj1-f193.google.com (mail-lj1-f193.google.com\n [209.85.208.193]) by dpdk.org (Postfix) with ESMTP id CDCF61C0D7\n for <dev@dpdk.org>; Wed, 1 Apr 2020 16:22:06 +0200 (CEST)", "by mail-lj1-f193.google.com with SMTP id g27so25878647ljn.10\n for <dev@dpdk.org>; Wed, 01 Apr 2020 07:22:06 -0700 (PDT)", "from mkPC.semihalf.local (193-106-246-138.noc.fibertech.net.pl.\n [193.106.246.138])\n by smtp.gmail.com with ESMTPSA id r21sm1435961ljp.29.2020.04.01.07.22.04\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 01 Apr 2020 07:22:05 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=semihalf-com.20150623.gappssmtp.com; s=20150623;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=Hzuw+Q9xcF6a6oNgbJAu90TcvAlAjoQEzzwdgF3k44w=;\n b=ixEc6CTQ6lYraybUM7Dtwb36UC1A652tQi90m/wJ+Huk6JkeFgTJNdgCVv1pt9x+vf\n uGm9ZZj71rNWApbxQSrTiGfBvqu7LqjeIifRkire+30mzUe8+nuuHCqrAJ5qN5yGIpjR\n 8zcNrstMkNutGYAqsByWBLl3l0OSPequYFBBfmMwwskyK0VE3qmqT28kji1F/002T3Vc\n SwbCCuXvYgn6yG/n5q6IXnYbZzODlwJCWqdDmWE91fFLdFurYw/v//VtTcNid+y8bcpu\n BmsDTIvL/Q6VugymNw+N2FgwE6d9uV8+eJWFn6VO6+BbaEg3aIbvDI3yjkDfEbW6b23N\n 0xkg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=Hzuw+Q9xcF6a6oNgbJAu90TcvAlAjoQEzzwdgF3k44w=;\n b=oBImbzr/qwjOtGfnqUE11GQXudvBTLerEJUAnFm3VbMmQjqCAtUVKqfa8XJT5ZJpXt\n IEe5wj7zdZv55iZdce3UkEIvQyE/9ze6z3vy43LykYNRqofcKM43vXkEFr/sjyrWg0Ne\n 1qS1Dh0ufB57gJN4hYAPoHsjL9gu4CP+NGH/6svs7aEYWo4p2UEONRiaeVVce+vKS8Xu\n TJIuRAqhYMfSFOA8FfKvSVfFFohYnBbGWKCOgt2Ndqb5zP0PLFu1NqWYBQqEBQ+9rbsj\n xaAwk7qJQWnlQissIYaAJeI0qaLHBxczCmXIvgB8HMJljI+nLRnB4BfB5iM5hyt1U+Bk\n j+Dw==", "X-Gm-Message-State": "AGi0PubLlNN9THtt51DTSyjBRPBHOtbD2KeY1JhvWOFA60ePXfZjXqPg\n Z1QBHJcxfnIjhHFjbVrbYBgasLyZGDA=", "X-Google-Smtp-Source": "\n APiQypITrwnPvpyBZAKrZ0ry+VBd8+suKMU6i3ZSUloYVOdOI2ItSZL5NYyt1gXZar+pOiyl48IBgg==", "X-Received": "by 2002:a2e:9b07:: with SMTP id u7mr12774393lji.110.1585750925933;\n Wed, 01 Apr 2020 07:22:05 -0700 (PDT)", "From": "Michal Krawczyk <mk@semihalf.com>", "To": "dev@dpdk.org", "Cc": "mw@semihalf.com, mba@semihalf.com, gtzalik@amazon.com, evgenys@amazon.com,\n igorch@amazon.com, Michal Krawczyk <mk@semihalf.com>", "Date": "Wed, 1 Apr 2020 16:21:19 +0200", "Message-Id": "<20200401142127.13715-22-mk@semihalf.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20200401142127.13715-1-mk@semihalf.com>", "References": "<20200401142127.13715-1-mk@semihalf.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 21/29] net/ena: refactor Rx path", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "* Split main Rx function into multiple ones - the body of the main\n was very big and further there were 2 nested loops, which were\n making the code hard to read\n* Rework how the Rx mbuf chains are being created - Instead of having\n while loop which has conditional check if it's first segment, handle\n this segment outside the loop and if more fragments are existing,\n process them inside.\n* Initialize Rx mbuf using simple function - it's the common thing for\n the 1st and next segments.\n* Create structure for Rx buffer to align it with Tx path, other ENA\n drivers and to make the variable name more descriptive - on DPDK, Rx\n buffer must hold only mbuf, so initially array of mbufs was used as\n the buffers. However, it was misleading, as it was named\n \"rx_buffer_info\". To make it more clear, the structure holding mbuf\n pointer was added and now there is possibility to expand it in the\n future without reworking the driver.\n* Remove redundant variables and conditional checks.\n\nSigned-off-by: Michal Krawczyk <mk@semihalf.com>\nReviewed-by: Igor Chauskin <igorch@amazon.com>\nReviewed-by: Guy Tzalik <gtzalik@amazon.com>\n---\n drivers/net/ena/ena_ethdev.c | 182 ++++++++++++++++++++++-------------\n drivers/net/ena/ena_ethdev.h | 8 +-\n 2 files changed, 124 insertions(+), 66 deletions(-)", "diff": "diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c\nindex 64c91531a7..1a9c28122b 100644\n--- a/drivers/net/ena/ena_ethdev.c\n+++ b/drivers/net/ena/ena_ethdev.c\n@@ -188,6 +188,12 @@ static int ena_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \t\t\t uint16_t nb_desc, unsigned int socket_id,\n \t\t\t const struct rte_eth_rxconf *rx_conf,\n \t\t\t struct rte_mempool *mp);\n+static inline void ena_init_rx_mbuf(struct rte_mbuf *mbuf, uint16_t len);\n+static struct rte_mbuf *ena_rx_mbuf(struct ena_ring *rx_ring,\n+\t\t\t\t struct ena_com_rx_buf_info *ena_bufs,\n+\t\t\t\t uint32_t descs,\n+\t\t\t\t uint16_t *next_to_clean,\n+\t\t\t\t uint8_t offset);\n static uint16_t eth_ena_recv_pkts(void *rx_queue,\n \t\t\t\t struct rte_mbuf **rx_pkts, uint16_t nb_pkts);\n static int ena_populate_rx_queue(struct ena_ring *rxq, unsigned int count);\n@@ -749,11 +755,13 @@ static void ena_rx_queue_release_bufs(struct ena_ring *ring)\n {\n \tunsigned int i;\n \n-\tfor (i = 0; i < ring->ring_size; ++i)\n-\t\tif (ring->rx_buffer_info[i]) {\n-\t\t\trte_mbuf_raw_free(ring->rx_buffer_info[i]);\n-\t\t\tring->rx_buffer_info[i] = NULL;\n+\tfor (i = 0; i < ring->ring_size; ++i) {\n+\t\tstruct ena_rx_buffer *rx_info = &ring->rx_buffer_info[i];\n+\t\tif (rx_info->mbuf) {\n+\t\t\trte_mbuf_raw_free(rx_info->mbuf);\n+\t\t\trx_info->mbuf = NULL;\n \t\t}\n+\t}\n }\n \n static void ena_tx_queue_release_bufs(struct ena_ring *ring)\n@@ -1365,8 +1373,8 @@ static int ena_rx_queue_setup(struct rte_eth_dev *dev,\n \trxq->mb_pool = mp;\n \n \trxq->rx_buffer_info = rte_zmalloc(\"rxq->buffer_info\",\n-\t\t\t\t\t sizeof(struct rte_mbuf *) * nb_desc,\n-\t\t\t\t\t RTE_CACHE_LINE_SIZE);\n+\t\tsizeof(struct ena_rx_buffer) * nb_desc,\n+\t\tRTE_CACHE_LINE_SIZE);\n \tif (!rxq->rx_buffer_info) {\n \t\tPMD_DRV_LOG(ERR, \"failed to alloc mem for rx buffer info\\n\");\n \t\treturn -ENOMEM;\n@@ -1434,15 +1442,17 @@ static int ena_populate_rx_queue(struct ena_ring *rxq, unsigned int count)\n \t\tuint16_t next_to_use_masked = next_to_use & ring_mask;\n \t\tstruct rte_mbuf *mbuf = mbufs[i];\n \t\tstruct ena_com_buf ebuf;\n+\t\tstruct ena_rx_buffer *rx_info;\n \n \t\tif (likely((i + 4) < count))\n \t\t\trte_prefetch0(mbufs[i + 4]);\n \n \t\treq_id = rxq->empty_rx_reqs[next_to_use_masked];\n \t\trc = validate_rx_req_id(rxq, req_id);\n-\t\tif (unlikely(rc < 0))\n+\t\tif (unlikely(rc))\n \t\t\tbreak;\n-\t\trxq->rx_buffer_info[req_id] = mbuf;\n+\n+\t\trx_info = &rxq->rx_buffer_info[req_id];\n \n \t\t/* prepare physical address for DMA transaction */\n \t\tebuf.paddr = mbuf->buf_iova + RTE_PKTMBUF_HEADROOM;\n@@ -1452,9 +1462,9 @@ static int ena_populate_rx_queue(struct ena_ring *rxq, unsigned int count)\n \t\t\t\t\t\t&ebuf, req_id);\n \t\tif (unlikely(rc)) {\n \t\t\tPMD_DRV_LOG(WARNING, \"failed adding rx desc\\n\");\n-\t\t\trxq->rx_buffer_info[req_id] = NULL;\n \t\t\tbreak;\n \t\t}\n+\t\trx_info->mbuf = mbuf;\n \t\tnext_to_use++;\n \t}\n \n@@ -2052,6 +2062,83 @@ static int ena_infos_get(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+static inline void ena_init_rx_mbuf(struct rte_mbuf *mbuf, uint16_t len)\n+{\n+\tmbuf->data_len = len;\n+\tmbuf->data_off = RTE_PKTMBUF_HEADROOM;\n+\tmbuf->refcnt = 1;\n+\tmbuf->next = NULL;\n+}\n+\n+static struct rte_mbuf *ena_rx_mbuf(struct ena_ring *rx_ring,\n+\t\t\t\t struct ena_com_rx_buf_info *ena_bufs,\n+\t\t\t\t uint32_t descs,\n+\t\t\t\t uint16_t *next_to_clean,\n+\t\t\t\t uint8_t offset)\n+{\n+\tstruct rte_mbuf *mbuf;\n+\tstruct rte_mbuf *mbuf_head;\n+\tstruct ena_rx_buffer *rx_info;\n+\tunsigned int ring_mask = rx_ring->ring_size - 1;\n+\tuint16_t ntc, len, req_id, buf = 0;\n+\n+\tif (unlikely(descs == 0))\n+\t\treturn NULL;\n+\n+\tntc = *next_to_clean;\n+\n+\tlen = ena_bufs[buf].len;\n+\treq_id = ena_bufs[buf].req_id;\n+\tif (unlikely(validate_rx_req_id(rx_ring, req_id)))\n+\t\treturn NULL;\n+\n+\trx_info = &rx_ring->rx_buffer_info[req_id];\n+\n+\tmbuf = rx_info->mbuf;\n+\tRTE_ASSERT(mbuf != NULL);\n+\n+\tena_init_rx_mbuf(mbuf, len);\n+\n+\t/* Fill the mbuf head with the data specific for 1st segment. */\n+\tmbuf_head = mbuf;\n+\tmbuf_head->nb_segs = descs;\n+\tmbuf_head->port = rx_ring->port_id;\n+\tmbuf_head->pkt_len = len;\n+\tmbuf_head->data_off += offset;\n+\n+\trx_info->mbuf = NULL;\n+\trx_ring->empty_rx_reqs[ntc & ring_mask] = req_id;\n+\t++ntc;\n+\n+\twhile (--descs) {\n+\t\t++buf;\n+\t\tlen = ena_bufs[buf].len;\n+\t\treq_id = ena_bufs[buf].req_id;\n+\t\tif (unlikely(validate_rx_req_id(rx_ring, req_id))) {\n+\t\t\trte_mbuf_raw_free(mbuf_head);\n+\t\t\treturn NULL;\n+\t\t}\n+\n+\t\trx_info = &rx_ring->rx_buffer_info[req_id];\n+\t\tRTE_ASSERT(rx_info->mbuf != NULL);\n+\n+\t\t/* Create an mbuf chain. */\n+\t\tmbuf->next = rx_info->mbuf;\n+\t\tmbuf = mbuf->next;\n+\n+\t\tena_init_rx_mbuf(mbuf, len);\n+\t\tmbuf_head->pkt_len += len;\n+\n+\t\trx_info->mbuf = NULL;\n+\t\trx_ring->empty_rx_reqs[ntc & ring_mask] = req_id;\n+\t\t++ntc;\n+\t}\n+\n+\t*next_to_clean = ntc;\n+\n+\treturn mbuf_head;\n+}\n+\n static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t\t\t uint16_t nb_pkts)\n {\n@@ -2060,16 +2147,10 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tunsigned int ring_mask = ring_size - 1;\n \tuint16_t next_to_clean = rx_ring->next_to_clean;\n \tuint16_t desc_in_use = 0;\n-\tuint16_t req_id;\n-\tunsigned int recv_idx = 0;\n-\tstruct rte_mbuf *mbuf = NULL;\n-\tstruct rte_mbuf *mbuf_head = NULL;\n-\tstruct rte_mbuf *mbuf_prev = NULL;\n-\tstruct rte_mbuf **rx_buff_info = rx_ring->rx_buffer_info;\n-\tunsigned int completed;\n-\n+\tstruct rte_mbuf *mbuf;\n+\tuint16_t completed;\n \tstruct ena_com_rx_ctx ena_rx_ctx;\n-\tint rc = 0;\n+\tint i, rc = 0;\n \n \t/* Check adapter state */\n \tif (unlikely(rx_ring->adapter->state != ENA_ADAPTER_STATE_RUNNING)) {\n@@ -2083,8 +2164,6 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\tnb_pkts = desc_in_use;\n \n \tfor (completed = 0; completed < nb_pkts; completed++) {\n-\t\tint segments = 0;\n-\n \t\tena_rx_ctx.max_bufs = rx_ring->sgl_size;\n \t\tena_rx_ctx.ena_bufs = rx_ring->ena_bufs;\n \t\tena_rx_ctx.descs = 0;\n@@ -2102,63 +2181,36 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t\treturn 0;\n \t\t}\n \n-\t\tif (unlikely(ena_rx_ctx.descs == 0))\n-\t\t\tbreak;\n-\n-\t\twhile (segments < ena_rx_ctx.descs) {\n-\t\t\treq_id = ena_rx_ctx.ena_bufs[segments].req_id;\n-\t\t\trc = validate_rx_req_id(rx_ring, req_id);\n-\t\t\tif (unlikely(rc)) {\n-\t\t\t\tif (segments != 0)\n-\t\t\t\t\trte_mbuf_raw_free(mbuf_head);\n-\t\t\t\tbreak;\n-\t\t\t}\n-\n-\t\t\tmbuf = rx_buff_info[req_id];\n-\t\t\trx_buff_info[req_id] = NULL;\n-\t\t\tmbuf->data_len = ena_rx_ctx.ena_bufs[segments].len;\n-\t\t\tmbuf->data_off = RTE_PKTMBUF_HEADROOM;\n-\t\t\tmbuf->refcnt = 1;\n-\t\t\tmbuf->next = NULL;\n-\t\t\tif (unlikely(segments == 0)) {\n-\t\t\t\tmbuf->nb_segs = ena_rx_ctx.descs;\n-\t\t\t\tmbuf->port = rx_ring->port_id;\n-\t\t\t\tmbuf->pkt_len = 0;\n-\t\t\t\tmbuf->data_off += ena_rx_ctx.pkt_offset;\n-\t\t\t\tmbuf_head = mbuf;\n-\t\t\t} else {\n-\t\t\t\t/* for multi-segment pkts create mbuf chain */\n-\t\t\t\tmbuf_prev->next = mbuf;\n+\t\tmbuf = ena_rx_mbuf(rx_ring,\n+\t\t\tena_rx_ctx.ena_bufs,\n+\t\t\tena_rx_ctx.descs,\n+\t\t\t&next_to_clean,\n+\t\t\tena_rx_ctx.pkt_offset);\n+\t\tif (unlikely(mbuf == NULL)) {\n+\t\t\tfor (i = 0; i < ena_rx_ctx.descs; ++i) {\n+\t\t\t\trx_ring->empty_rx_reqs[next_to_clean & ring_mask] =\n+\t\t\t\t\trx_ring->ena_bufs[i].req_id;\n+\t\t\t\t++next_to_clean;\n \t\t\t}\n-\t\t\tmbuf_head->pkt_len += mbuf->data_len;\n-\n-\t\t\tmbuf_prev = mbuf;\n-\t\t\trx_ring->empty_rx_reqs[next_to_clean & ring_mask] =\n-\t\t\t\treq_id;\n-\t\t\tsegments++;\n-\t\t\tnext_to_clean++;\n-\t\t}\n-\t\tif (unlikely(rc))\n \t\t\tbreak;\n+\t\t}\n \n \t\t/* fill mbuf attributes if any */\n-\t\tena_rx_mbuf_prepare(mbuf_head, &ena_rx_ctx);\n+\t\tena_rx_mbuf_prepare(mbuf, &ena_rx_ctx);\n \n-\t\tif (unlikely(mbuf_head->ol_flags &\n+\t\tif (unlikely(mbuf->ol_flags &\n \t\t\t\t(PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD))) {\n \t\t\trte_atomic64_inc(&rx_ring->adapter->drv_stats->ierrors);\n \t\t\t++rx_ring->rx_stats.bad_csum;\n \t\t}\n \n-\t\tmbuf_head->hash.rss = ena_rx_ctx.hash;\n+\t\tmbuf->hash.rss = ena_rx_ctx.hash;\n \n-\t\t/* pass to DPDK application head mbuf */\n-\t\trx_pkts[recv_idx] = mbuf_head;\n-\t\trecv_idx++;\n-\t\trx_ring->rx_stats.bytes += mbuf_head->pkt_len;\n+\t\trx_pkts[completed] = mbuf;\n+\t\trx_ring->rx_stats.bytes += mbuf->pkt_len;\n \t}\n \n-\trx_ring->rx_stats.cnt += recv_idx;\n+\trx_ring->rx_stats.cnt += completed;\n \trx_ring->next_to_clean = next_to_clean;\n \n \tdesc_in_use = desc_in_use - completed + 1;\n@@ -2168,7 +2220,7 @@ static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\tena_populate_rx_queue(rx_ring, ring_size - desc_in_use);\n \t}\n \n-\treturn recv_idx;\n+\treturn completed;\n }\n \n static uint16_t\ndiff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h\nindex 99191ac3e7..9df34136da 100644\n--- a/drivers/net/ena/ena_ethdev.h\n+++ b/drivers/net/ena/ena_ethdev.h\n@@ -44,6 +44,12 @@ struct ena_tx_buffer {\n \tstruct ena_com_buf bufs[ENA_PKT_MAX_BUFS];\n };\n \n+/* Rx buffer holds only pointer to the mbuf - may be expanded in the future */\n+struct ena_rx_buffer {\n+\tstruct rte_mbuf *mbuf;\n+\tstruct ena_com_buf ena_buf;\n+};\n+\n struct ena_calc_queue_size_ctx {\n \tstruct ena_com_dev_get_features_ctx *get_feat_ctx;\n \tstruct ena_com_dev *ena_dev;\n@@ -89,7 +95,7 @@ struct ena_ring {\n \n \tunion {\n \t\tstruct ena_tx_buffer *tx_buffer_info; /* contex of tx packet */\n-\t\tstruct rte_mbuf **rx_buffer_info; /* contex of rx packet */\n+\t\tstruct ena_rx_buffer *rx_buffer_info; /* contex of rx packet */\n \t};\n \tstruct rte_mbuf **rx_refill_buffer;\n \tunsigned int ring_size; /* number of tx/rx_buffer_info's entries */\n", "prefixes": [ "v2", "21/29" ] }