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GET /api/patches/67592/?format=api
{ "id": 67592, "url": "https://patches.dpdk.org/api/patches/67592/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200401142127.13715-8-mk@semihalf.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200401142127.13715-8-mk@semihalf.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200401142127.13715-8-mk@semihalf.com", "date": "2020-04-01T14:21:05", "name": "[v2,07/29] net/ena/base: add accelerated LLQ mode", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4912fe94da0341411b729c57451fdcce9c46594f", "submitter": { "id": 786, "url": "https://patches.dpdk.org/api/people/786/?format=api", "name": "Michal Krawczyk", "email": "mk@semihalf.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200401142127.13715-8-mk@semihalf.com/mbox/", "series": [ { "id": 9153, "url": "https://patches.dpdk.org/api/series/9153/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=9153", "date": "2020-04-01T14:20:58", "name": "Update ENA driver to v2.1.0", "version": 2, "mbox": "https://patches.dpdk.org/series/9153/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/67592/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/67592/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7FBCEA057B;\n\tWed, 1 Apr 2020 16:22:55 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B9B051BF0B;\n\tWed, 1 Apr 2020 16:21:49 +0200 (CEST)", "from mail-lj1-f193.google.com (mail-lj1-f193.google.com\n [209.85.208.193]) by dpdk.org (Postfix) with ESMTP id A34821BEDF\n for <dev@dpdk.org>; Wed, 1 Apr 2020 16:21:47 +0200 (CEST)", "by mail-lj1-f193.google.com with SMTP id p10so25711074ljn.1\n for <dev@dpdk.org>; Wed, 01 Apr 2020 07:21:47 -0700 (PDT)", "from mkPC.semihalf.local (193-106-246-138.noc.fibertech.net.pl.\n [193.106.246.138])\n by smtp.gmail.com with ESMTPSA id r21sm1435961ljp.29.2020.04.01.07.21.45\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 01 Apr 2020 07:21:45 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=semihalf-com.20150623.gappssmtp.com; s=20150623;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding;\n bh=JkIhcQNPmRKfzIfELRoF5vpS3N2p0O4RxY3SsWLr2XY=;\n b=fJbL3qcW5i6Yu+oKXyBI1jMxuukT0ImC6dWRDPTLNnuL9RhwCQyvsM8UahKpJuY3DY\n PsIaf1ikOgotLvUVIGA6b9vaacvM7X1hf1v85LeKkn86VNNINyZgzy0+74qAH23THCN3\n UlvTqSujFSltCXrjXe7vDvetZBgYUbJMTnSnJ6yNZXltgcvKvtp4u8ME3XwodLLBzDGs\n P5D+3YpIFdIZtm03Ex2t6gua6iXqJZzc+zvNRJD0jnEzrJqUw+WJSNbfCrviTs8jgJdd\n TYb4X+rdQzm2/T1CSNdwoBmqEbrqGiedLJjXiDc8ONK4v5Lnb/xGb8rcAp+D3X4WxCzo\n HYfQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version:content-transfer-encoding;\n bh=JkIhcQNPmRKfzIfELRoF5vpS3N2p0O4RxY3SsWLr2XY=;\n b=HWregM+hGqCpzvHRzzfNtvcGAkQ1/QzCRF+0VVaPkGgcfnoTkTIME29dY1AUg6OGb2\n RIqfL0mfvX7Vd9OUbQVfUqy2ElPsx2T5KQdtcXmvPnGQfCBVGumzdmhU13vEijcIEBe7\n S5KjgOetouiBZ99nBraxcFZTB/7BExEYSFguWy/gLoYkfqOKZ/qsse18rNptaprD4MJ5\n ydzEtHcB7t+imobL/zjmuwVPsYyYO5RDtM/PQ4r0ANoCzfUE79vqU1iRf4wapTo0z8W9\n L6ZMDX7JGwb/GHOLauX0ISZy2nRIh/zpYvZpNRpMvRD5wXQGwYwAOJjpeSZPKdCXowBi\n 31HA==", "X-Gm-Message-State": "AGi0Pubeb/u5yjNsS1bGZFLdWY+McubYBt4sB4k8F7+kFhpKtj+Rwi6X\n DwhH82Cc8lJbabOJ9Wi6e6P8dbXnKmA=", "X-Google-Smtp-Source": "\n APiQypIg64DRPAYQLtPOiQWKqQXmkKX/HhErxHgSjVGxJs23ZCW3oJEk4osJWGJjh+EWswQd8ZXtng==", "X-Received": "by 2002:a2e:9585:: with SMTP id w5mr13775051ljh.178.1585750906763;\n Wed, 01 Apr 2020 07:21:46 -0700 (PDT)", "From": "Michal Krawczyk <mk@semihalf.com>", "To": "dev@dpdk.org", "Cc": "mw@semihalf.com, mba@semihalf.com, gtzalik@amazon.com, evgenys@amazon.com,\n igorch@amazon.com, Michal Krawczyk <mk@semihalf.com>", "Date": "Wed, 1 Apr 2020 16:21:05 +0200", "Message-Id": "<20200401142127.13715-8-mk@semihalf.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20200401142127.13715-1-mk@semihalf.com>", "References": "<20200401142127.13715-1-mk@semihalf.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 07/29] net/ena/base: add accelerated LLQ mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "In order to use the accelerated LLQ, the driver must limit the Tx burst\nand be aware that the device has the meta caching disabled. In that\nsituation, the meta descriptor must be valid on each Tx packet.\n\nSigned-off-by: Michal Krawczyk <mk@semihalf.com>\nReviewed-by: Igor Chauskin <igorch@amazon.com>\nReviewed-by: Guy Tzalik <gtzalik@amazon.com>\n---\n drivers/net/ena/base/ena_com.c | 20 +++++++-\n drivers/net/ena/base/ena_com.h | 3 ++\n .../net/ena/base/ena_defs/ena_admin_defs.h | 39 +++++++++++++--\n drivers/net/ena/base/ena_eth_com.c | 49 +++++++++++++------\n 4 files changed, 91 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c\nindex 19815db9ad..d15b7f22dc 100644\n--- a/drivers/net/ena/base/ena_com.c\n+++ b/drivers/net/ena/base/ena_com.c\n@@ -378,6 +378,8 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev,\n \t\t 0x0, io_sq->llq_info.desc_list_entry_size);\n \t\tio_sq->llq_buf_ctrl.descs_left_in_line =\n \t\t\tio_sq->llq_info.descs_num_before_header;\n+\t\tio_sq->disable_meta_caching =\n+\t\t\tio_sq->llq_info.disable_meta_caching;\n \n \t\tif (io_sq->llq_info.max_entries_in_tx_burst > 0)\n \t\t\tio_sq->entries_in_tx_burst_left =\n@@ -595,6 +597,14 @@ static int ena_com_set_llq(struct ena_com_dev *ena_dev)\n \tcmd.u.llq.desc_num_before_header_enabled = llq_info->descs_num_before_header;\n \tcmd.u.llq.descriptors_stride_ctrl_enabled = llq_info->desc_stride_ctrl;\n \n+\tif (llq_info->disable_meta_caching)\n+\t\tcmd.u.llq.accel_mode.u.set.enabled_flags |=\n+\t\t\tBIT(ENA_ADMIN_DISABLE_META_CACHING);\n+\n+\tif (llq_info->max_entries_in_tx_burst)\n+\t\tcmd.u.llq.accel_mode.u.set.enabled_flags |=\n+\t\t\tBIT(ENA_ADMIN_LIMIT_TX_BURST);\n+\n \tret = ena_com_execute_admin_command(admin_queue,\n \t\t\t\t\t (struct ena_admin_aq_entry *)&cmd,\n \t\t\t\t\t sizeof(cmd),\n@@ -714,9 +724,15 @@ static int ena_com_config_llq_info(struct ena_com_dev *ena_dev,\n \t\t\t supported_feat,\n \t\t\t llq_info->descs_num_before_header);\n \t}\n+\t/* Check for accelerated queue supported */\n+\tllq_info->disable_meta_caching =\n+\t\tllq_features->accel_mode.u.get.supported_flags &\n+\t\tBIT(ENA_ADMIN_DISABLE_META_CACHING);\n \n-\tllq_info->max_entries_in_tx_burst =\n-\t\t(u16)(llq_features->max_tx_burst_size /\tllq_default_cfg->llq_ring_entry_size_value);\n+\tif (llq_features->accel_mode.u.get.supported_flags & BIT(ENA_ADMIN_LIMIT_TX_BURST))\n+\t\tllq_info->max_entries_in_tx_burst =\n+\t\t\tllq_features->accel_mode.u.get.max_tx_burst_size /\n+\t\t\tllq_default_cfg->llq_ring_entry_size_value;\n \n \trc = ena_com_set_llq(ena_dev);\n \tif (rc)\ndiff --git a/drivers/net/ena/base/ena_com.h b/drivers/net/ena/base/ena_com.h\nindex 0e34a13fde..9f2c6ea8ee 100644\n--- a/drivers/net/ena/base/ena_com.h\n+++ b/drivers/net/ena/base/ena_com.h\n@@ -82,6 +82,7 @@ struct ena_com_llq_info {\n \tu16 descs_num_before_header;\n \tu16 descs_per_entry;\n \tu16 max_entries_in_tx_burst;\n+\tbool disable_meta_caching;\n };\n \n struct ena_com_io_cq {\n@@ -146,6 +147,8 @@ struct ena_com_io_sq {\n \tenum queue_direction direction;\n \tenum ena_admin_placement_policy_type mem_queue_type;\n \n+\tbool disable_meta_caching;\n+\n \tu32 msix_vector;\n \tstruct ena_com_tx_meta cached_tx_meta;\n \tstruct ena_com_llq_info llq_info;\ndiff --git a/drivers/net/ena/base/ena_defs/ena_admin_defs.h b/drivers/net/ena/base/ena_defs/ena_admin_defs.h\nindex fb4d4d03f0..020dc78e26 100644\n--- a/drivers/net/ena/base/ena_defs/ena_admin_defs.h\n+++ b/drivers/net/ena/base/ena_defs/ena_admin_defs.h\n@@ -469,6 +469,36 @@ enum ena_admin_llq_stride_ctrl {\n \tENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY = 2,\n };\n \n+enum ena_admin_accel_mode_feat {\n+\tENA_ADMIN_DISABLE_META_CACHING = 0,\n+\tENA_ADMIN_LIMIT_TX_BURST = 1,\n+};\n+\n+struct ena_admin_accel_mode_get {\n+\t/* bit field of enum ena_admin_accel_mode_feat */\n+\tuint16_t supported_flags;\n+\n+\t/* maximum burst size between two doorbells. The size is in bytes */\n+\tuint16_t max_tx_burst_size;\n+};\n+\n+struct ena_admin_accel_mode_set {\n+\t/* bit field of enum ena_admin_accel_mode_feat */\n+\tuint16_t enabled_flags;\n+\n+\tuint16_t reserved;\n+};\n+\n+struct ena_admin_accel_mode_req {\n+\tunion {\n+\t\tuint32_t raw[2];\n+\n+\t\tstruct ena_admin_accel_mode_get get;\n+\n+\t\tstruct ena_admin_accel_mode_set set;\n+\t} u;\n+};\n+\n struct ena_admin_feature_llq_desc {\n \tuint32_t max_llq_num;\n \n@@ -514,10 +544,13 @@ struct ena_admin_feature_llq_desc {\n \t/* the stride control the driver selected to use */\n \tuint16_t descriptors_stride_ctrl_enabled;\n \n-\t/* Maximum size in bytes taken by llq entries in a single tx burst.\n-\t * Set to 0 when there is no such limit.\n+\t/* reserved */\n+\tuint32_t reserved1;\n+\n+\t/* accelerated low latency queues requirment. driver needs to\n+\t * support those requirments in order to use accelerated llq\n \t */\n-\tuint32_t max_tx_burst_size;\n+\tstruct ena_admin_accel_mode_req accel_mode;\n };\n \n struct ena_admin_queue_ext_feature_fields {\ndiff --git a/drivers/net/ena/base/ena_eth_com.c b/drivers/net/ena/base/ena_eth_com.c\nindex d4d44226df..aabc294fb7 100644\n--- a/drivers/net/ena/base/ena_eth_com.c\n+++ b/drivers/net/ena/base/ena_eth_com.c\n@@ -258,11 +258,10 @@ static u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,\n \treturn count;\n }\n \n-static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,\n-\t\t\t\t\t\t\tstruct ena_com_tx_ctx *ena_tx_ctx)\n+static int ena_com_create_meta(struct ena_com_io_sq *io_sq,\n+\t\t\t struct ena_com_tx_meta *ena_meta)\n {\n \tstruct ena_eth_io_tx_meta_desc *meta_desc = NULL;\n-\tstruct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;\n \n \tmeta_desc = get_sq_desc(io_sq);\n \tmemset(meta_desc, 0x0, sizeof(struct ena_eth_io_tx_meta_desc));\n@@ -282,12 +281,13 @@ static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,\n \n \t/* Extended meta desc */\n \tmeta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK;\n-\tmeta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;\n \tmeta_desc->len_ctrl |= (io_sq->phase <<\n \t\tENA_ETH_IO_TX_META_DESC_PHASE_SHIFT) &\n \t\tENA_ETH_IO_TX_META_DESC_PHASE_MASK;\n \n \tmeta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_FIRST_MASK;\n+\tmeta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;\n+\n \tmeta_desc->word2 |= ena_meta->l3_hdr_len &\n \t\tENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK;\n \tmeta_desc->word2 |= (ena_meta->l3_hdr_offset <<\n@@ -298,13 +298,34 @@ static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,\n \t\tENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT) &\n \t\tENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK;\n \n-\tmeta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;\n+\treturn ena_com_sq_update_tail(io_sq);\n+}\n \n-\t/* Cached the meta desc */\n-\tmemcpy(&io_sq->cached_tx_meta, ena_meta,\n-\t sizeof(struct ena_com_tx_meta));\n+static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,\n+\t\t\t\t\t\t struct ena_com_tx_ctx *ena_tx_ctx,\n+\t\t\t\t\t\t bool *have_meta)\n+{\n+\tstruct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;\n \n-\treturn ena_com_sq_update_tail(io_sq);\n+\t/* When disable meta caching is set, don't bother to save the meta and\n+\t * compare it to the stored version, just create the meta\n+\t */\n+\tif (io_sq->disable_meta_caching) {\n+\t\tif (unlikely(!ena_tx_ctx->meta_valid))\n+\t\t\treturn ENA_COM_INVAL;\n+\n+\t\t*have_meta = true;\n+\t\treturn ena_com_create_meta(io_sq, ena_meta);\n+\t} else if (ena_com_meta_desc_changed(io_sq, ena_tx_ctx)) {\n+\t\t*have_meta = true;\n+\t\t/* Cache the meta desc */\n+\t\tmemcpy(&io_sq->cached_tx_meta, ena_meta,\n+\t\t sizeof(struct ena_com_tx_meta));\n+\t\treturn ena_com_create_meta(io_sq, ena_meta);\n+\t} else {\n+\t\t*have_meta = false;\n+\t\treturn ENA_COM_OK;\n+\t}\n }\n \n static void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,\n@@ -380,12 +401,10 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,\n \tif (unlikely(rc))\n \t\treturn rc;\n \n-\thave_meta = ena_tx_ctx->meta_valid && ena_com_meta_desc_changed(io_sq,\n-\t\t\tena_tx_ctx);\n-\tif (have_meta) {\n-\t\trc = ena_com_create_and_store_tx_meta_desc(io_sq, ena_tx_ctx);\n-\t\tif (unlikely(rc))\n-\t\t\treturn rc;\n+\trc = ena_com_create_and_store_tx_meta_desc(io_sq, ena_tx_ctx, &have_meta);\n+\tif (unlikely(rc)) {\n+\t\tena_trc_err(\"failed to create and store tx meta desc\\n\");\n+\t\treturn rc;\n \t}\n \n \t/* If the caller doesn't want to send packets */\n", "prefixes": [ "v2", "07/29" ] }