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GET /api/patches/66964/?format=api
{ "id": 66964, "url": "https://patches.dpdk.org/api/patches/66964/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1584672375-376187-10-git-send-email-alvinx.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1584672375-376187-10-git-send-email-alvinx.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1584672375-376187-10-git-send-email-alvinx.zhang@intel.com", "date": "2020-03-20T02:46:10", "name": "[v2,09/14] net/igc: implement feature of VLAN", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "bca79ddcf7174b8b7e4845a4c3dc68352ef596e6", "submitter": { "id": 1398, "url": "https://patches.dpdk.org/api/people/1398/?format=api", "name": "Alvin Zhang", "email": "alvinx.zhang@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1584672375-376187-10-git-send-email-alvinx.zhang@intel.com/mbox/", "series": [ { "id": 8992, "url": "https://patches.dpdk.org/api/series/8992/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=8992", "date": "2020-03-20T02:46:01", "name": "igc PMD", "version": 2, "mbox": "https://patches.dpdk.org/series/8992/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/66964/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/66964/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9AA7DA0583;\n\tFri, 20 Mar 2020 03:52:20 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id CE54D1C0C0;\n\tFri, 20 Mar 2020 03:51:17 +0100 (CET)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id 462761C0AC\n for <dev@dpdk.org>; Fri, 20 Mar 2020 03:51:10 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 19 Mar 2020 19:51:09 -0700", "from unknown (HELO dpdk-zhangalvin-dev.sh.intel.com)\n ([10.240.183.54])\n by fmsmga002.fm.intel.com with ESMTP; 19 Mar 2020 19:51:07 -0700" ], "IronPort-SDR": [ "\n Ax9csvUR9vYPvu5qAPGJwc93Kqc2YpMPGOPU5xq4las1zGarTsMzpYYC9mWCRmvIeChnrLT9fB\n DnsLpbv42WtQ==", "\n Wvb61LamE0ak2qhX81Q8cXIKldzof75pi4ahFi8EbzrptGqo6WCrPwNKYliFeoKt5Hae8AQHtD\n nO7P4yfhMitg==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.72,283,1580803200\"; d=\"scan'208\";a=\"280290227\"", "From": "alvinx.zhang@intel.com", "To": "dev@dpdk.org, xiaolong.ye@intel.com, haiyue.wang@intel.com,\n qi.z.zhang@intel.com, beilei.xing@intel.com", "Date": "Fri, 20 Mar 2020 10:46:10 +0800", "Message-Id": "<1584672375-376187-10-git-send-email-alvinx.zhang@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1584672375-376187-1-git-send-email-alvinx.zhang@intel.com>", "References": "<1583742247-370386-1-git-send-email-alvinx.zhang@intel.com>\n <1584672375-376187-1-git-send-email-alvinx.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 09/14] net/igc: implement feature of VLAN", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Alvin Zhang <alvinx.zhang@intel.com>\n\nBelow ops ware added:\nvlan_filter_set\nvlan_offload_set\nvlan_tpid_set\nvlan_strip_queue_set\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\n\nv2: fix max packet length fault when extend vlan is enabled or disabled\n---\n doc/guides/nics/features/igc.ini | 2 +\n drivers/net/igc/igc_ethdev.c | 209 +++++++++++++++++++++++++++++++++++++++\n drivers/net/igc/igc_ethdev.h | 13 +++\n drivers/net/igc/igc_txrx.c | 28 ++++++\n drivers/net/igc/igc_txrx.h | 3 +-\n 5 files changed, 254 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/nics/features/igc.ini b/doc/guides/nics/features/igc.ini\nindex 81d2a3b..f5c862b 100644\n--- a/doc/guides/nics/features/igc.ini\n+++ b/doc/guides/nics/features/igc.ini\n@@ -29,6 +29,8 @@ Rx interrupt = Y\n Flow control = Y\n RSS key update = Y\n RSS reta update = Y\n+VLAN filter = Y\n+VLAN offload = Y\n Linux UIO = Y\n Linux VFIO = Y\n x86-64 = Y\ndiff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c\nindex 33bef51..f546e22 100644\n--- a/drivers/net/igc/igc_ethdev.c\n+++ b/drivers/net/igc/igc_ethdev.c\n@@ -43,6 +43,13 @@\n /* MSI-X other interrupt vector */\n #define IGC_MSIX_OTHER_INTR_VEC\t\t0\n \n+/* External VLAN Enable bit mask */\n+#define IGC_CTRL_EXT_EXT_VLAN\t\t(1 << 26)\n+\n+/* External VLAN Ether Type bit mask and shift */\n+#define IGC_VET_EXT\t\t\t0xFFFF0000\n+#define IGC_VET_EXT_SHIFT\t\t16\n+\n /* Per Queue Good Packets Received Count */\n #define IGC_PQGPRC(idx)\t\t(0x10010 + 0x100 * (idx))\n /* Per Queue Good Octets Received Count */\n@@ -220,6 +227,11 @@ static int eth_igc_rss_hash_update(struct rte_eth_dev *dev,\n \t\t\tstruct rte_eth_rss_conf *rss_conf);\n static int eth_igc_rss_hash_conf_get(struct rte_eth_dev *dev,\n \t\t\tstruct rte_eth_rss_conf *rss_conf);\n+static int\n+eth_igc_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);\n+static int eth_igc_vlan_offload_set(struct rte_eth_dev *dev, int mask);\n+static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,\n+\t\t enum rte_vlan_type vlan_type, uint16_t tpid);\n \n static const struct eth_dev_ops eth_igc_ops = {\n \t.dev_configure\t\t= eth_igc_configure,\n@@ -272,6 +284,10 @@ static int eth_igc_rss_hash_conf_get(struct rte_eth_dev *dev,\n \t.reta_query\t\t= eth_igc_rss_reta_query,\n \t.rss_hash_update\t= eth_igc_rss_hash_update,\n \t.rss_hash_conf_get\t= eth_igc_rss_hash_conf_get,\n+\t.vlan_filter_set\t= eth_igc_vlan_filter_set,\n+\t.vlan_offload_set\t= eth_igc_vlan_offload_set,\n+\t.vlan_tpid_set\t\t= eth_igc_vlan_tpid_set,\n+\t.vlan_strip_queue_set\t= eth_igc_vlan_strip_queue_set,\n };\n \n /*\n@@ -942,6 +958,11 @@ static int eth_igc_rss_hash_conf_get(struct rte_eth_dev *dev,\n \n \tigc_clear_hw_cntrs_base_generic(hw);\n \n+\t/* VLAN Offload Settings */\n+\teth_igc_vlan_offload_set(dev,\n+\t\tETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK |\n+\t\tETH_VLAN_EXTEND_MASK);\n+\n \t/* Setup link speed and duplex */\n \tspeeds = &dev->data->dev_conf.link_speeds;\n \tif (*speeds == ETH_LINK_SPEED_AUTONEG) {\n@@ -2352,6 +2373,194 @@ static int eth_igc_rss_hash_conf_get(struct rte_eth_dev *dev,\n }\n \n static int\n+eth_igc_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tstruct igc_vfta *shadow_vfta = IGC_DEV_PRIVATE_VFTA(dev);\n+\tuint32_t vfta;\n+\tuint32_t vid_idx;\n+\tuint32_t vid_bit;\n+\n+\tvid_idx = (vlan_id >> IGC_VFTA_ENTRY_SHIFT) & IGC_VFTA_ENTRY_MASK;\n+\tvid_bit = 1u << (vlan_id & IGC_VFTA_ENTRY_BIT_SHIFT_MASK);\n+\tvfta = shadow_vfta->vfta[vid_idx];\n+\tif (on)\n+\t\tvfta |= vid_bit;\n+\telse\n+\t\tvfta &= ~vid_bit;\n+\tIGC_WRITE_REG_ARRAY(hw, IGC_VFTA, vid_idx, vfta);\n+\n+\t/* update local VFTA copy */\n+\tshadow_vfta->vfta[vid_idx] = vfta;\n+\n+\treturn 0;\n+}\n+\n+static void\n+igc_vlan_hw_filter_disable(struct rte_eth_dev *dev)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tigc_read_reg_check_clear_bits(hw, IGC_RCTL,\n+\t\t\tIGC_RCTL_CFIEN | IGC_RCTL_VFE);\n+}\n+\n+static void\n+igc_vlan_hw_filter_enable(struct rte_eth_dev *dev)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tstruct igc_vfta *shadow_vfta = IGC_DEV_PRIVATE_VFTA(dev);\n+\tuint32_t reg_val;\n+\tint i;\n+\n+\t/* Filter Table Enable, CFI not used for packet acceptance */\n+\treg_val = IGC_READ_REG(hw, IGC_RCTL);\n+\treg_val &= ~IGC_RCTL_CFIEN;\n+\treg_val |= IGC_RCTL_VFE;\n+\tIGC_WRITE_REG(hw, IGC_RCTL, reg_val);\n+\n+\t/* restore VFTA table */\n+\tfor (i = 0; i < IGC_VFTA_SIZE; i++)\n+\t\tIGC_WRITE_REG_ARRAY(hw, IGC_VFTA, i, shadow_vfta->vfta[i]);\n+}\n+\n+static void\n+igc_vlan_hw_strip_disable(struct rte_eth_dev *dev)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\n+\tigc_read_reg_check_clear_bits(hw, IGC_CTRL, IGC_CTRL_VME);\n+}\n+\n+static void\n+igc_vlan_hw_strip_enable(struct rte_eth_dev *dev)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\n+\tigc_read_reg_check_set_bits(hw, IGC_CTRL, IGC_CTRL_VME);\n+}\n+\n+static int\n+igc_vlan_hw_extend_disable(struct rte_eth_dev *dev)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tuint32_t ctrl_ext;\n+\n+\tctrl_ext = IGC_READ_REG(hw, IGC_CTRL_EXT);\n+\n+\t/* if extend vlan hasn't been enabled */\n+\tif ((ctrl_ext & IGC_CTRL_EXT_EXT_VLAN) == 0)\n+\t\treturn 0;\n+\n+\tif ((dev->data->dev_conf.rxmode.offloads &\n+\t\t\tDEV_RX_OFFLOAD_JUMBO_FRAME) == 0)\n+\t\tgoto write_ext_vlan;\n+\n+\t/* Update maximum packet length */\n+\tif (dev->data->dev_conf.rxmode.max_rx_pkt_len <\n+\t\tRTE_ETHER_MIN_MTU + VLAN_TAG_SIZE) {\n+\t\tPMD_DRV_LOG(ERR, \"maximum packet length %u error, \"\n+\t\t\t\t\"here minimum value should be %u\",\n+\t\t\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len,\n+\t\t\t\tVLAN_TAG_SIZE + RTE_ETHER_MIN_MTU);\n+\t\treturn -EINVAL;\n+\t}\n+\tdev->data->dev_conf.rxmode.max_rx_pkt_len -= VLAN_TAG_SIZE;\n+\tIGC_WRITE_REG(hw, IGC_RLPML,\n+\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len);\n+\n+write_ext_vlan:\n+\tIGC_WRITE_REG(hw, IGC_CTRL_EXT, ctrl_ext & ~IGC_CTRL_EXT_EXT_VLAN);\n+\treturn 0;\n+}\n+\n+static int\n+igc_vlan_hw_extend_enable(struct rte_eth_dev *dev)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tuint32_t ctrl_ext;\n+\n+\tctrl_ext = IGC_READ_REG(hw, IGC_CTRL_EXT);\n+\n+\t/* if extend vlan has been enabled */\n+\tif (ctrl_ext & IGC_CTRL_EXT_EXT_VLAN)\n+\t\treturn 0;\n+\n+\tif ((dev->data->dev_conf.rxmode.offloads &\n+\t\t\tDEV_RX_OFFLOAD_JUMBO_FRAME) == 0)\n+\t\tgoto write_ext_vlan;\n+\n+\t/* Update maximum packet length */\n+\tif (dev->data->dev_conf.rxmode.max_rx_pkt_len >\n+\t\tMAX_RX_JUMBO_FRAME_SIZE - VLAN_TAG_SIZE) {\n+\t\tPMD_DRV_LOG(ERR, \"maximum packet length %u error, \"\n+\t\t\t\t\"maximum value is %u\",\n+\t\t\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len +\n+\t\t\t\tVLAN_TAG_SIZE, MAX_RX_JUMBO_FRAME_SIZE);\n+\t\treturn -EINVAL;\n+\t}\n+\tdev->data->dev_conf.rxmode.max_rx_pkt_len += VLAN_TAG_SIZE;\n+\tIGC_WRITE_REG(hw, IGC_RLPML,\n+\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len);\n+\n+write_ext_vlan:\n+\tIGC_WRITE_REG(hw, IGC_CTRL_EXT, ctrl_ext | IGC_CTRL_EXT_EXT_VLAN);\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_vlan_offload_set(struct rte_eth_dev *dev, int mask)\n+{\n+\tstruct rte_eth_rxmode *rxmode;\n+\n+\trxmode = &dev->data->dev_conf.rxmode;\n+\tif (mask & ETH_VLAN_STRIP_MASK) {\n+\t\tif (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP)\n+\t\t\tigc_vlan_hw_strip_enable(dev);\n+\t\telse\n+\t\t\tigc_vlan_hw_strip_disable(dev);\n+\t}\n+\n+\tif (mask & ETH_VLAN_FILTER_MASK) {\n+\t\tif (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER)\n+\t\t\tigc_vlan_hw_filter_enable(dev);\n+\t\telse\n+\t\t\tigc_vlan_hw_filter_disable(dev);\n+\t}\n+\n+\tif (mask & ETH_VLAN_EXTEND_MASK) {\n+\t\tif (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)\n+\t\t\treturn igc_vlan_hw_extend_enable(dev);\n+\t\telse\n+\t\t\treturn igc_vlan_hw_extend_disable(dev);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,\n+\t\t enum rte_vlan_type vlan_type,\n+\t\t uint16_t tpid)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tuint32_t reg_val;\n+\n+\t/* only outer TPID of double VLAN can be configured*/\n+\tif (vlan_type == ETH_VLAN_TYPE_OUTER) {\n+\t\treg_val = IGC_READ_REG(hw, IGC_VET);\n+\t\treg_val = (reg_val & (~IGC_VET_EXT)) |\n+\t\t\t((uint32_t)tpid << IGC_VET_EXT_SHIFT);\n+\t\tIGC_WRITE_REG(hw, IGC_VET, reg_val);\n+\n+\t\treturn 0;\n+\t}\n+\n+\t/* all other TPID values are read-only*/\n+\tPMD_DRV_LOG(ERR, \"Not supported\");\n+\treturn -ENOTSUP;\n+}\n+\n+static int\n eth_igc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \tstruct rte_pci_device *pci_dev)\n {\ndiff --git a/drivers/net/igc/igc_ethdev.h b/drivers/net/igc/igc_ethdev.h\nindex 6d4fc33..7e967b7 100644\n--- a/drivers/net/igc/igc_ethdev.h\n+++ b/drivers/net/igc/igc_ethdev.h\n@@ -17,6 +17,10 @@\n #endif\n \n #define IGC_RSS_RDT_SIZD\t\t128\n+\n+/* VLAN filter table size */\n+#define IGC_VFTA_SIZE\t\t\t128\n+\n #define IGC_QUEUE_PAIRS_NUM\t\t4\n \n #define IGC_HKEY_MAX_INDEX\t\t10\n@@ -116,6 +120,11 @@ struct igc_hw_queue_stats {\n \t/* per transmit queue drop packet count */\n };\n \n+/* local vfta copy */\n+struct igc_vfta {\n+\tuint32_t vfta[IGC_VFTA_SIZE];\n+};\n+\n /*\n * Structure to store private data for each driver instance (for each port).\n */\n@@ -127,6 +136,7 @@ struct igc_adapter {\n \tint16_t rxq_stats_map[IGC_QUEUE_PAIRS_NUM];\n \n \tstruct igc_interrupt\tintr;\n+\tstruct igc_vfta\tshadow_vfta;\n \tbool\t\tstopped;\n };\n \n@@ -144,6 +154,9 @@ struct igc_adapter {\n #define IGC_DEV_PRIVATE_INTR(_dev) \\\n \t(&((struct igc_adapter *)(_dev)->data->dev_private)->intr)\n \n+#define IGC_DEV_PRIVATE_VFTA(_dev) \\\n+\t(&((struct igc_adapter *)(_dev)->data->dev_private)->shadow_vfta)\n+\n static inline void\n igc_read_reg_check_set_bits(struct igc_hw *hw, uint32_t reg, uint32_t bits)\n {\ndiff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c\nindex 1d10f75..2fdb4f7 100644\n--- a/drivers/net/igc/igc_txrx.c\n+++ b/drivers/net/igc/igc_txrx.c\n@@ -2122,3 +2122,31 @@ int eth_igc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \tqinfo->conf.tx_thresh.wthresh = txq->wthresh;\n \tqinfo->conf.offloads = txq->offloads;\n }\n+\n+void\n+eth_igc_vlan_strip_queue_set(struct rte_eth_dev *dev,\n+\t\t\tuint16_t rx_queue_id, int on)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tstruct igc_rx_queue *rxq = dev->data->rx_queues[rx_queue_id];\n+\tuint32_t reg_val;\n+\n+\tif (rx_queue_id >= IGC_QUEUE_PAIRS_NUM) {\n+\t\tPMD_DRV_LOG(ERR, \"Queue index(%u) illegal, max is %u\",\n+\t\t\trx_queue_id, IGC_QUEUE_PAIRS_NUM - 1);\n+\t\treturn;\n+\t}\n+\n+\treg_val = IGC_READ_REG(hw, IGC_DVMOLR(rx_queue_id));\n+\tif (on) {\n+\t\t/* If vlan been stripped off, the CRC is meaningless. */\n+\t\treg_val |= IGC_DVMOLR_STRVLAN | IGC_DVMOLR_STRCRC;\n+\t\trxq->offloads |= ETH_VLAN_STRIP_MASK;\n+\t} else {\n+\t\treg_val &= ~(IGC_DVMOLR_STRVLAN | IGC_DVMOLR_HIDVLAN);\n+\t\tif (dev->data->dev_conf.rxmode.offloads & ETH_VLAN_STRIP_MASK)\n+\t\t\trxq->offloads &= ~ETH_VLAN_STRIP_MASK;\n+\t}\n+\n+\tIGC_WRITE_REG(hw, IGC_DVMOLR(rx_queue_id), reg_val);\n+}\ndiff --git a/drivers/net/igc/igc_txrx.h b/drivers/net/igc/igc_txrx.h\nindex e594acc..df7b071 100644\n--- a/drivers/net/igc/igc_txrx.h\n+++ b/drivers/net/igc/igc_txrx.h\n@@ -44,7 +44,8 @@ void eth_igc_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tstruct rte_eth_rxq_info *qinfo);\n void eth_igc_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tstruct rte_eth_txq_info *qinfo);\n-\n+void eth_igc_vlan_strip_queue_set(struct rte_eth_dev *dev,\n+\t\t\tuint16_t rx_queue_id, int on);\n #ifdef __cplusplus\n }\n #endif\n", "prefixes": [ "v2", "09/14" ] }