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GET /api/patches/66380/?format=api
{ "id": 66380, "url": "https://patches.dpdk.org/api/patches/66380/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1583742247-370386-1-git-send-email-alvinx.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1583742247-370386-1-git-send-email-alvinx.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1583742247-370386-1-git-send-email-alvinx.zhang@intel.com", "date": "2020-03-09T08:23:53", "name": "[v1,01/15] net/igc: add igc PMD", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7f5bac151f7476b74e23d0db358d5becf6ed2369", "submitter": { "id": 1398, "url": "https://patches.dpdk.org/api/people/1398/?format=api", "name": "Alvin Zhang", "email": "alvinx.zhang@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1583742247-370386-1-git-send-email-alvinx.zhang@intel.com/mbox/", "series": [ { "id": 8831, "url": "https://patches.dpdk.org/api/series/8831/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=8831", "date": "2020-03-09T08:23:53", "name": "[v1,01/15] net/igc: add igc PMD", "version": 1, "mbox": "https://patches.dpdk.org/series/8831/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/66380/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/66380/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D8666A052E;\n\tMon, 9 Mar 2020 09:28:43 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BAF541BFFC;\n\tMon, 9 Mar 2020 09:28:43 +0100 (CET)", "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by dpdk.org (Postfix) with ESMTP id F0AD31BFFB\n for <dev@dpdk.org>; Mon, 9 Mar 2020 09:28:41 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 09 Mar 2020 01:28:41 -0700", "from unknown (HELO dpdk-zhangalvin-dev.sh.intel.com)\n ([10.240.179.50])\n by orsmga002.jf.intel.com with ESMTP; 09 Mar 2020 01:28:38 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,518,1574150400\"; d=\"scan'208\";a=\"260350620\"", "From": "alvinx.zhang@intel.com", "To": "dev@dpdk.org", "Cc": "haiyue.wang@intel.com, xiaolong.ye@intel.com, qi.z.zhang@intel.com,\n beilei.xing@intel.com, Alvin Zhang <alvinx.zhang@intel.com>", "Date": "Mon, 9 Mar 2020 16:23:53 +0800", "Message-Id": "<1583742247-370386-1-git-send-email-alvinx.zhang@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "Subject": "[dpdk-dev] [PATCH v1 01/15] net/igc: add igc PMD", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Alvin Zhang <alvinx.zhang@intel.com>\n\nImplement device detection and loading.\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\n---\n MAINTAINERS | 7 +\n config/common_base | 7 +\n doc/guides/nics/features/igc.ini | 8 +\n doc/guides/nics/igc.rst | 39 +++++\n doc/guides/nics/index.rst | 1 +\n drivers/net/Makefile | 1 +\n drivers/net/igc/Makefile | 25 ++++\n drivers/net/igc/igc_ethdev.c | 249 ++++++++++++++++++++++++++++++++\n drivers/net/igc/igc_ethdev.h | 18 +++\n drivers/net/igc/igc_logs.c | 21 +++\n drivers/net/igc/igc_logs.h | 34 +++++\n drivers/net/igc/meson.build | 7 +\n drivers/net/igc/rte_pmd_igc_version.map | 3 +\n drivers/net/meson.build | 1 +\n mk/rte.app.mk | 1 +\n 15 files changed, 422 insertions(+)\n create mode 100644 doc/guides/nics/features/igc.ini\n create mode 100644 doc/guides/nics/igc.rst\n create mode 100644 drivers/net/igc/Makefile\n create mode 100644 drivers/net/igc/igc_ethdev.c\n create mode 100644 drivers/net/igc/igc_ethdev.h\n create mode 100644 drivers/net/igc/igc_logs.c\n create mode 100644 drivers/net/igc/igc_logs.h\n create mode 100644 drivers/net/igc/meson.build\n create mode 100644 drivers/net/igc/rte_pmd_igc_version.map", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex c378555..68a92b4 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -704,6 +704,13 @@ F: drivers/net/ipn3ke/\n F: doc/guides/nics/ipn3ke.rst\n F: doc/guides/nics/features/ipn3ke.ini\n \n+Intel igc\n+M: Alvin Zhang <alvinx.zhang@intel.com>\n+T: git://dpdk.org/next/dpdk-next-net-intel\n+F: drivers/net/igc/\n+F: doc/guides/nics/igc.rst\n+F: doc/guides/nics/features/igc.ini\n+\n Marvell mvpp2\n M: Tomasz Duszynski <tdu@semihalf.com>\n M: Liron Himi <lironh@marvell.com>\ndiff --git a/config/common_base b/config/common_base\nindex c31175f..ebc7323 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -283,6 +283,13 @@ CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n\n CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n\n \n #\n+# Compile burst-oriented IGC PMD drivers\n+#\n+CONFIG_RTE_LIBRTE_IGC_PMD=y\n+CONFIG_RTE_LIBRTE_IGC_DEBUG_RX=n\n+CONFIG_RTE_LIBRTE_IGC_DEBUG_TX=n\n+\n+#\n # Compile burst-oriented HINIC PMD driver\n #\n CONFIG_RTE_LIBRTE_HINIC_PMD=n\ndiff --git a/doc/guides/nics/features/igc.ini b/doc/guides/nics/features/igc.ini\nnew file mode 100644\nindex 0000000..ad75cc4\n--- /dev/null\n+++ b/doc/guides/nics/features/igc.ini\n@@ -0,0 +1,8 @@\n+; Supported features of the 'igc' network poll mode driver.\n+;\n+; Refer to default.ini for the full list of available PMD features.\n+;\n+[Features]\n+Linux UIO = Y\n+Linux VFIO = Y\n+x86-64 = Y\ndiff --git a/doc/guides/nics/igc.rst b/doc/guides/nics/igc.rst\nnew file mode 100644\nindex 0000000..4c7176a\n--- /dev/null\n+++ b/doc/guides/nics/igc.rst\n@@ -0,0 +1,39 @@\n+.. SPDX-License-Identifier: BSD-3-Clause\n+ Copyright(c) 2016 Intel Corporation.\n+\n+IGC Poll Mode Driver\n+======================\n+\n+The IGC PMD (librte_pmd_igc) provides poll mode driver support for\n+Foxville and Greenvile I225 Series Network Adapters.\n+\n+\n+Config File Options\n+~~~~~~~~~~~~~~~~~~~\n+\n+The following options can be modified in the ``config`` file.\n+Please note that enabling debugging options may affect system performance.\n+\n+- ``CONFIG_RTE_LIBRTE_IGC_PMD`` (default ``y``)\n+\n+ Toggle compilation of the ``librte_pmd_igc`` driver.\n+\n+- ``CONFIG_RTE_LIBRTE_IGC_DEBUG_*`` (default ``n``)\n+\n+ Toggle display of generic debugging messages.\n+\n+\n+Driver compilation and testing\n+------------------------------\n+\n+Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`\n+for details.\n+\n+\n+Supported Chipsets and NICs\n+---------------------------\n+\n+Foxville LM (I225 LM): Client 2.5G LAN vPro Corporate\n+Greenville (I220 V): Client 1G LAN Consumer\n+Foxville V (I225 V): Client 2.5G LAN Consumer\n+Foxville I (I225 I): Client 2.5G Industrial Temp\ndiff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst\nindex 6d88028..7312d56 100644\n--- a/doc/guides/nics/index.rst\n+++ b/doc/guides/nics/index.rst\n@@ -32,6 +32,7 @@ Network Interface Controller Drivers\n i40e\n ice\n igb\n+ igc\n ionic\n ipn3ke\n ixgbe\ndiff --git a/drivers/net/Makefile b/drivers/net/Makefile\nindex 4a7f155..b57841d 100644\n--- a/drivers/net/Makefile\n+++ b/drivers/net/Makefile\n@@ -61,6 +61,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD) += thunderx\n DIRS-$(CONFIG_RTE_LIBRTE_VDEV_NETVSC_PMD) += vdev_netvsc\n DIRS-$(CONFIG_RTE_LIBRTE_VIRTIO_PMD) += virtio\n DIRS-$(CONFIG_RTE_LIBRTE_VMXNET3_PMD) += vmxnet3\n+DIRS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += igc\n \n ifeq ($(CONFIG_RTE_LIBRTE_KNI),y)\n DIRS-$(CONFIG_RTE_LIBRTE_PMD_KNI) += kni\ndiff --git a/drivers/net/igc/Makefile b/drivers/net/igc/Makefile\nnew file mode 100644\nindex 0000000..7b51daf\n--- /dev/null\n+++ b/drivers/net/igc/Makefile\n@@ -0,0 +1,25 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright(c) 2010-2020 Intel Corporation\n+\n+include $(RTE_SDK)/mk/rte.vars.mk\n+\n+#\n+# library name\n+#\n+LIB = librte_pmd_igc.a\n+\n+CFLAGS += -O3\n+CFLAGS += $(WERROR_FLAGS)\n+LDLIBS += -lrte_eal\n+LDLIBS += -lrte_ethdev\n+LDLIBS += -lrte_bus_pci\n+\n+EXPORT_MAP := rte_pmd_igc_version.map\n+\n+#\n+# all source are stored in SRCS-y\n+#\n+SRCS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += igc_logs.c\n+SRCS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += igc_ethdev.c\n+\n+include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c\nnew file mode 100644\nindex 0000000..2baba69\n--- /dev/null\n+++ b/drivers/net/igc/igc_ethdev.c\n@@ -0,0 +1,249 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2020 Intel Corporation\n+ */\n+\n+#include <rte_pci.h>\n+#include <rte_bus_pci.h>\n+#include <rte_ethdev_driver.h>\n+#include <rte_ethdev_pci.h>\n+\n+#include \"igc_logs.h\"\n+#include \"igc_ethdev.h\"\n+\n+#define IGC_INTEL_VENDOR_ID\t\t0x8086\n+#define IGC_DEV_ID_I225_LM\t\t0x15F2\n+#define IGC_DEV_ID_I225_V\t\t0x15F3\n+#define IGC_DEV_ID_I225_K\t\t0x3100\n+#define IGC_DEV_ID_I225_I\t\t0x15F8\n+#define IGC_DEV_ID_I220_V\t\t0x15F7\n+\n+static const struct rte_pci_id pci_id_igc_map[] = {\n+\t{ RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_LM) },\n+\t{ RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_V) },\n+\t{ RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_I) },\n+\t{ RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_V) },\n+\t{ RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_K) },\n+\t{ .vendor_id = 0, /* sentinel */ },\n+};\n+\n+static int eth_igc_configure(struct rte_eth_dev *dev);\n+static int eth_igc_link_update(struct rte_eth_dev *dev, int wait_to_complete);\n+static void eth_igc_stop(struct rte_eth_dev *dev);\n+static int eth_igc_start(struct rte_eth_dev *dev);\n+static void eth_igc_close(struct rte_eth_dev *dev);\n+static int eth_igc_reset(struct rte_eth_dev *dev);\n+static int eth_igc_promiscuous_enable(struct rte_eth_dev *dev);\n+static int eth_igc_promiscuous_disable(struct rte_eth_dev *dev);\n+static int eth_igc_infos_get(struct rte_eth_dev *dev,\n+\t\t\tstruct rte_eth_dev_info *dev_info);\n+static int\n+eth_igc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,\n+\t\tuint16_t nb_rx_desc, unsigned int socket_id,\n+\t\tconst struct rte_eth_rxconf *rx_conf,\n+\t\tstruct rte_mempool *mb_pool);\n+static int\n+eth_igc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n+\t\tuint16_t nb_desc, unsigned int socket_id,\n+\t\tconst struct rte_eth_txconf *tx_conf);\n+\n+static const struct eth_dev_ops eth_igc_ops = {\n+\t.dev_configure\t\t= eth_igc_configure,\n+\t.link_update\t\t= eth_igc_link_update,\n+\t.dev_stop\t\t= eth_igc_stop,\n+\t.dev_start\t\t= eth_igc_start,\n+\t.dev_close\t\t= eth_igc_close,\n+\t.dev_reset\t\t= eth_igc_reset,\n+\t.promiscuous_enable\t= eth_igc_promiscuous_enable,\n+\t.promiscuous_disable\t= eth_igc_promiscuous_disable,\n+\t.dev_infos_get\t\t= eth_igc_infos_get,\n+\t.rx_queue_setup\t\t= eth_igc_rx_queue_setup,\n+\t.tx_queue_setup\t\t= eth_igc_tx_queue_setup,\n+};\n+\n+static int\n+eth_igc_configure(struct rte_eth_dev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_link_update(struct rte_eth_dev *dev, int wait_to_complete)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+\tRTE_SET_USED(wait_to_complete);\n+\treturn 0;\n+}\n+\n+static void\n+eth_igc_stop(struct rte_eth_dev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+}\n+\n+static int\n+eth_igc_start(struct rte_eth_dev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+\treturn 0;\n+}\n+\n+static void\n+eth_igc_close(struct rte_eth_dev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\t RTE_SET_USED(dev);\n+}\n+\n+static int\n+eth_igc_dev_init(struct rte_eth_dev *dev)\n+{\n+\tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\tdev->dev_ops = ð_igc_ops;\n+\n+\t/*\n+\t * for secondary processes, we don't initialize any further as primary\n+\t * has already done this work. Only check we don't need a different\n+\t * RX function.\n+\t */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\trte_eth_copy_pci_info(dev, pci_dev);\n+\n+\tdev->data->mac_addrs = rte_zmalloc(\"igc\",\n+\t\tRTE_ETHER_ADDR_LEN, 0);\n+\tif (dev->data->mac_addrs == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d bytes needed to \"\n+\t\t\t\t\"store MAC addresses\", RTE_ETHER_ADDR_LEN);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\t/* Pass the information to the rte_eth_dev_close() that it should also\n+\t * release the private port resources.\n+\t */\n+\tdev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;\n+\n+\tPMD_INIT_LOG(DEBUG, \"port_id %d vendorID=0x%x deviceID=0x%x\",\n+\t\t\tdev->data->port_id, pci_dev->id.vendor_id,\n+\t\t\tpci_dev->id.device_id);\n+\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_dev_uninit(__rte_unused struct rte_eth_dev *eth_dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn -EPERM;\n+\n+\teth_igc_close(eth_dev);\n+\treturn 0;\n+}\n+\n+/*\n+ * Reset PF device.\n+ */\n+static int\n+eth_igc_reset(struct rte_eth_dev *dev)\n+{\n+\tint ret;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tret = eth_igc_dev_uninit(dev);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\treturn eth_igc_dev_init(dev);\n+}\n+\n+static int\n+eth_igc_promiscuous_enable(struct rte_eth_dev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_promiscuous_disable(struct rte_eth_dev *dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+\tdev_info->max_rx_queues = IGC_QUEUE_PAIRS_NUM;\n+\tdev_info->max_tx_queues = IGC_QUEUE_PAIRS_NUM;\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,\n+\t\tuint16_t nb_rx_desc, unsigned int socket_id,\n+\t\tconst struct rte_eth_rxconf *rx_conf,\n+\t\tstruct rte_mempool *mb_pool)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+\tRTE_SET_USED(rx_queue_id);\n+\tRTE_SET_USED(nb_rx_desc);\n+\tRTE_SET_USED(socket_id);\n+\tRTE_SET_USED(rx_conf);\n+\tRTE_SET_USED(mb_pool);\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n+\t\tuint16_t nb_desc, unsigned int socket_id,\n+\t\tconst struct rte_eth_txconf *tx_conf)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tRTE_SET_USED(dev);\n+\tRTE_SET_USED(queue_idx);\n+\tRTE_SET_USED(nb_desc);\n+\tRTE_SET_USED(socket_id);\n+\tRTE_SET_USED(tx_conf);\n+\treturn 0;\n+}\n+\n+static int\n+eth_igc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n+\tstruct rte_pci_device *pci_dev)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\treturn rte_eth_dev_pci_generic_probe(pci_dev, 0, eth_igc_dev_init);\n+}\n+\n+static int\n+eth_igc_pci_remove(struct rte_pci_device *pci_dev __rte_unused)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\treturn rte_eth_dev_pci_generic_remove(pci_dev, eth_igc_dev_uninit);\n+}\n+\n+static struct rte_pci_driver rte_igc_pmd = {\n+\t.id_table = pci_id_igc_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,\n+\t.probe = eth_igc_pci_probe,\n+\t.remove = eth_igc_pci_remove,\n+};\n+\n+RTE_PMD_REGISTER_PCI(net_igc, rte_igc_pmd);\n+RTE_PMD_REGISTER_PCI_TABLE(net_igc, pci_id_igc_map);\n+RTE_PMD_REGISTER_KMOD_DEP(net_igc, \"* igb_uio | uio_pci_generic | vfio-pci\");\ndiff --git a/drivers/net/igc/igc_ethdev.h b/drivers/net/igc/igc_ethdev.h\nnew file mode 100644\nindex 0000000..a774413\n--- /dev/null\n+++ b/drivers/net/igc/igc_ethdev.h\n@@ -0,0 +1,18 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2020 Intel Corporation\n+ */\n+\n+#ifndef _IGC_ETHDEV_H_\n+#define _IGC_ETHDEV_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#define IGC_QUEUE_PAIRS_NUM\t\t4\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _IGC_ETHDEV_H_ */\ndiff --git a/drivers/net/igc/igc_logs.c b/drivers/net/igc/igc_logs.c\nnew file mode 100644\nindex 0000000..c653783\n--- /dev/null\n+++ b/drivers/net/igc/igc_logs.c\n@@ -0,0 +1,21 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Intel Corporation\n+ */\n+\n+#include \"igc_logs.h\"\n+#include \"rte_common.h\"\n+\n+/* declared as extern in igc_logs.h */\n+int igc_logtype_init = -1;\n+int igc_logtype_driver = -1;\n+\n+RTE_INIT(igc_init_log)\n+{\n+\tigc_logtype_init = rte_log_register(\"pmd.net.igc.init\");\n+\tif (igc_logtype_init >= 0)\n+\t\trte_log_set_level(igc_logtype_init, RTE_LOG_INFO);\n+\n+\tigc_logtype_driver = rte_log_register(\"pmd.net.igc.driver\");\n+\tif (igc_logtype_driver >= 0)\n+\t\trte_log_set_level(igc_logtype_driver, RTE_LOG_INFO);\n+}\ndiff --git a/drivers/net/igc/igc_logs.h b/drivers/net/igc/igc_logs.h\nnew file mode 100644\nindex 0000000..eed4f46\n--- /dev/null\n+++ b/drivers/net/igc/igc_logs.h\n@@ -0,0 +1,34 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2020 Intel Corporation\n+ */\n+\n+#ifndef _IGC_LOGS_H_\n+#define _IGC_LOGS_H_\n+\n+#include <rte_log.h>\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+extern int igc_logtype_init;\n+extern int igc_logtype_driver;\n+\n+#define PMD_INIT_LOG(level, fmt, args...) \\\n+\trte_log(RTE_LOG_ ## level, igc_logtype_init, \\\n+\t\t\"%s(): \" fmt \"\\n\", __func__, ##args)\n+\n+#define PMD_INIT_FUNC_TRACE() PMD_INIT_LOG(DEBUG, \" >>\")\n+\n+#define PMD_DRV_LOG_RAW(level, fmt, args...) \\\n+\trte_log(RTE_LOG_ ## level, igc_logtype_driver, \"%s(): \" fmt, \\\n+\t\t__func__, ## args)\n+\n+#define PMD_DRV_LOG(level, fmt, args...) \\\n+\tPMD_DRV_LOG_RAW(level, fmt \"\\n\", ## args)\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _IGC_LOGS_H_ */\ndiff --git a/drivers/net/igc/meson.build b/drivers/net/igc/meson.build\nnew file mode 100644\nindex 0000000..927938f\n--- /dev/null\n+++ b/drivers/net/igc/meson.build\n@@ -0,0 +1,7 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright(c) 2020 Intel Corporation\n+\n+sources = files(\n+\t'igc_logs.c',\n+\t'igc_ethdev.c'\n+)\ndiff --git a/drivers/net/igc/rte_pmd_igc_version.map b/drivers/net/igc/rte_pmd_igc_version.map\nnew file mode 100644\nindex 0000000..f9f17e4\n--- /dev/null\n+++ b/drivers/net/igc/rte_pmd_igc_version.map\n@@ -0,0 +1,3 @@\n+DPDK_20.0 {\n+\tlocal: *;\n+};\ndiff --git a/drivers/net/meson.build b/drivers/net/meson.build\nindex b0ea8fe..7d0ae3b 100644\n--- a/drivers/net/meson.build\n+++ b/drivers/net/meson.build\n@@ -49,6 +49,7 @@ drivers = ['af_packet',\n \t'vhost',\n \t'virtio',\n \t'vmxnet3',\n+\t'igc',\n ]\n std_deps = ['ethdev', 'kvargs'] # 'ethdev' also pulls in mbuf, net, eal etc\n std_deps += ['bus_pci'] # very many PMDs depend on PCI, so make std\ndiff --git a/mk/rte.app.mk b/mk/rte.app.mk\nindex d295ca0..afd570b 100644\n--- a/mk/rte.app.mk\n+++ b/mk/rte.app.mk\n@@ -184,6 +184,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_HNS3_PMD) += -lrte_pmd_hns3\n _LDLIBS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += -lrte_pmd_i40e\n _LDLIBS-$(CONFIG_RTE_LIBRTE_IAVF_PMD) += -lrte_pmd_iavf\n _LDLIBS-$(CONFIG_RTE_LIBRTE_ICE_PMD) += -lrte_pmd_ice\n+_LDLIBS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += -lrte_pmd_igc\n IAVF-y := $(CONFIG_RTE_LIBRTE_IAVF_PMD)\n ifeq ($(findstring y,$(IAVF-y)),y)\n _LDLIBS-y += -lrte_common_iavf\n", "prefixes": [ "v1", "01/15" ] }