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GET /api/patches/66035/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 66035,
    "url": "https://patches.dpdk.org/api/patches/66035/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200225094642.29239-1-rnagadheeraj@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200225094642.29239-1-rnagadheeraj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200225094642.29239-1-rnagadheeraj@marvell.com",
    "date": "2020-02-25T09:46:41",
    "name": "[v2,1/2] crypto/nitrox: fix invalid CSR register address generation",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "48b7944ce286f16f291f07db4aafa480ffa06616",
    "submitter": {
        "id": 1365,
        "url": "https://patches.dpdk.org/api/people/1365/?format=api",
        "name": "Nagadheeraj Rottela",
        "email": "rnagadheeraj@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200225094642.29239-1-rnagadheeraj@marvell.com/mbox/",
    "series": [
        {
            "id": 8680,
            "url": "https://patches.dpdk.org/api/series/8680/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=8680",
            "date": "2020-02-25T09:46:41",
            "name": "[v2,1/2] crypto/nitrox: fix invalid CSR register address generation",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/8680/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/66035/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/66035/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 23C05A0524;\n\tTue, 25 Feb 2020 10:46:53 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 011AB1BFB5;\n\tTue, 25 Feb 2020 10:46:53 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id A7BB61BC24\n for <dev@dpdk.org>; Tue, 25 Feb 2020 10:46:51 +0100 (CET)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 01P9fItY021116; Tue, 25 Feb 2020 01:46:50 -0800",
            "from sc-exch03.marvell.com ([199.233.58.183])\n by mx0a-0016f401.pphosted.com with ESMTP id 2yb2hvbeme-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 25 Feb 2020 01:46:50 -0800",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 25 Feb 2020 01:46:49 -0800",
            "from SC-EXCH03.marvell.com (10.93.176.83) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 25 Feb 2020 01:46:48 -0800",
            "from hyd1399.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 25 Feb 2020 01:46:45 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0818; bh=CiazbzdsLZFep5DzhD6BY8PZNdDYtVcG8tBumfJ3+/I=;\n b=vnB5c0dbLdosQoqdsnn6WBllCKMkYj0fhjDxQWbv8StxeL49PCCmcEh1cAR+MbYVx7GU\n t5n+vLHrRlS6ECDDySJRoKi8qQge5NrP5kA+0p4kK7fdoXbr4ofpAGx4hFr/ac9qL8r0\n P80vRyZesBwf1ExbGmtokX+aCFharNQg9Jak3V1cVbYLNS4KpoiWY8HYrlOtD3YNVV6n\n ZVATuQzQPBhv4aODr4F53DXH8Og9hJ5h79pzLyu4zoE++tnQaL8fk7jrzSAENpUXw/P7\n KGShvXy45XToqCG/Wn307riBviDrrv5UjI9PP7v6M26BOtyPC62+whqlNgwx9jejLO1v CA==",
        "From": "Nagadheeraj Rottela <rnagadheeraj@marvell.com>",
        "To": "<thomas@monjalon.net>, <akhil.goyal@nxp.com>",
        "CC": "<dev@dpdk.org>, <jsrikanth@marvell.com>, Nagadheeraj Rottela\n <rnagadheeraj@marvell.com>",
        "Date": "Tue, 25 Feb 2020 15:16:41 +0530",
        "Message-ID": "<20200225094642.29239-1-rnagadheeraj@marvell.com>",
        "X-Mailer": "git-send-email 2.13.6",
        "In-Reply-To": "<20200220110431.30074-1-rnagadheeraj@marvell.com>",
        "References": "<20200220110431.30074-1-rnagadheeraj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-02-25_02:2020-02-21,\n 2020-02-25 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v2 1/2] crypto/nitrox: fix invalid CSR register\n\taddress generation",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will\nevaluate to incorrect values due to unintended sign extension from int\nto unsigned long. To fix this, add UL suffix to the constants in these\nmacros.\n\nCoverity issue: 349899, 349905, 349911, 349921, 349923\n\nFixes: 32e4930d5a3b (\"crypto/nitrox: add hardware queue management\")\n\nSigned-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>\n---\n drivers/crypto/nitrox/nitrox_csr.h | 18 +++++++++---------\n 1 file changed, 9 insertions(+), 9 deletions(-)",
    "diff": "diff --git a/drivers/crypto/nitrox/nitrox_csr.h b/drivers/crypto/nitrox/nitrox_csr.h\nindex 8cd92e38b..b4c969b26 100644\n--- a/drivers/crypto/nitrox/nitrox_csr.h\n+++ b/drivers/crypto/nitrox/nitrox_csr.h\n@@ -12,15 +12,15 @@\n #define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset))\n \n /* NPS packet registers */\n-#define NPS_PKT_IN_INSTR_CTLX(_i)\t(0x10060 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_INSTR_BADDRX(_i)\t(0x10068 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_INSTR_RSIZEX(_i)\t(0x10070 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_DONE_CNTSX(_i)\t(0x10080 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i)\t(0x10078 + ((_i) * 0x40000))\n-#define NPS_PKT_IN_INT_LEVELSX(_i)\t\t(0x10088 + ((_i) * 0x40000))\n-#define NPS_PKT_SLC_CTLX(_i)\t\t(0x10000 + ((_i) * 0x40000))\n-#define NPS_PKT_SLC_CNTSX(_i)\t\t(0x10008 + ((_i) * 0x40000))\n-#define NPS_PKT_SLC_INT_LEVELSX(_i)\t(0x10010 + ((_i) * 0x40000))\n+#define NPS_PKT_IN_INSTR_CTLX(_i)\t(0x10060UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_INSTR_BADDRX(_i)\t(0x10068UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_INSTR_RSIZEX(_i)\t(0x10070UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_DONE_CNTSX(_i)\t(0x10080UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i)\t(0x10078UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_IN_INT_LEVELSX(_i)\t\t(0x10088UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_SLC_CTLX(_i)\t\t(0x10000UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_SLC_CNTSX(_i)\t\t(0x10008UL + ((_i) * 0x40000UL))\n+#define NPS_PKT_SLC_INT_LEVELSX(_i)\t(0x10010UL + ((_i) * 0x40000UL))\n \n /* AQM Virtual Function Registers */\n #define AQMQ_QSZX(_i)\t\t\t(0x20008 + ((_i)*0x40000))\n",
    "prefixes": [
        "v2",
        "1/2"
    ]
}