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GET /api/patches/65981/?format=api
{ "id": 65981, "url": "https://patches.dpdk.org/api/patches/65981/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1582233467-3123-1-git-send-email-viacheslavo@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1582233467-3123-1-git-send-email-viacheslavo@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1582233467-3123-1-git-send-email-viacheslavo@mellanox.com", "date": "2020-02-20T21:17:47", "name": "net/mlx5: fix last completed built descriptor", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "fb822bb36a4faf43837658d200531d596dacf322", "submitter": { "id": 1102, "url": "https://patches.dpdk.org/api/people/1102/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@mellanox.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1582233467-3123-1-git-send-email-viacheslavo@mellanox.com/mbox/", "series": [ { "id": 8645, "url": "https://patches.dpdk.org/api/series/8645/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=8645", "date": "2020-02-20T21:17:47", "name": "net/mlx5: fix last completed built descriptor", "version": 1, "mbox": "https://patches.dpdk.org/series/8645/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/65981/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/65981/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 43482A0525;\n\tThu, 20 Feb 2020 22:17:54 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3514958C4;\n\tThu, 20 Feb 2020 22:17:53 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 29D3958C4\n for <dev@dpdk.org>; Thu, 20 Feb 2020 22:17:51 +0100 (CET)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n viacheslavo@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 20 Feb 2020 23:17:50 +0200", "from pegasus11.mtr.labs.mlnx (pegasus11.mtr.labs.mlnx\n [10.210.16.104])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 01KLHo0m030098;\n Thu, 20 Feb 2020 23:17:50 +0200", "from pegasus11.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 01KLHni9003164;\n Thu, 20 Feb 2020 21:17:49 GMT", "(from viacheslavo@localhost)\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 01KLHngO003162;\n Thu, 20 Feb 2020 21:17:49 GMT" ], "X-Authentication-Warning": "pegasus11.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f", "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, thomas@monjalon.net,\n ferruh.yigit@intel.com, stable@dpdk.org", "Date": "Thu, 20 Feb 2020 21:17:47 +0000", "Message-Id": "<1582233467-3123-1-git-send-email-viacheslavo@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "Subject": "[dpdk-dev] [PATCH] net/mlx5: fix last completed built descriptor", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The routine sending packets with Multi-Packet Write method assigns\nthe wqe_last variable with transmit descriptor (WQE - work queue entry)\nbeing built. If send queue is close to full state, the WQE has no data\nyet (trying to put the first packet) and there is no enough space\nin descriptor for the next packet the WQE is discarded and the stored\nwqe_last value becomes invalid - points to the discarded WQE.\n\nThe mlx5_tx_burst_request_completion() routine might set the completion\nrequest flags in the WQE pointed by wqe_last, it is safe, but the next\nmlx5_tx_burst call uses the WQE as the first free one and request\ncompletion flags might be overwritten and completion request will be\nlost causing the transmit datapath malfunction.\n\nFixes: 8b581c690a54 (\"net/mlx5: move Tx complete request routine\")\nCc: stable@dpdk.org\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx5/mlx5_rxtx.c | 51 +++++++++++++++++++++++++++-----------------\n 1 file changed, 31 insertions(+), 20 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex 0df811b..2b4fc2a 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -2262,6 +2262,7 @@ enum mlx5_txcmp_code {\n \t (uint16_t)(txq->wqe_ci - txq->wqe_comp) >= txq->wqe_thres)) {\n \t\tvolatile struct mlx5_wqe *last = loc->wqe_last;\n \n+\t\tMLX5_ASSERT(last);\n \t\ttxq->elts_comp = head;\n \t\tif (MLX5_TXOFF_CONFIG(INLINE))\n \t\t\ttxq->wqe_comp = txq->wqe_ci;\n@@ -3921,6 +3922,8 @@ enum mlx5_txcmp_code {\n * Total size of descriptor/data in bytes.\n * @param slen\n * Accumulated statistics, data bytes sent.\n+ * @param wqem\n+ * The base WQE for the eMPW/MPW descriptor.\n * @param olx\n * Configured Tx offloads mask. It is fully defined at\n * compile time and may be used for optimization.\n@@ -3934,9 +3937,10 @@ enum mlx5_txcmp_code {\n \t\t struct mlx5_txq_local *restrict loc,\n \t\t unsigned int len,\n \t\t unsigned int slen,\n+\t\t struct mlx5_wqe *restrict wqem,\n \t\t unsigned int olx __rte_unused)\n {\n-\tstruct mlx5_wqe_dseg *dseg = &loc->wqe_last->dseg[0];\n+\tstruct mlx5_wqe_dseg *dseg = &wqem->dseg[0];\n \n \tMLX5_ASSERT(MLX5_TXOFF_CONFIG(INLINE));\n #ifdef MLX5_PMD_SOFT_COUNTERS\n@@ -3963,9 +3967,10 @@ enum mlx5_txcmp_code {\n \t\tMLX5_ASSERT((len % MLX5_WSEG_SIZE) == 0);\n \t\tlen = len / MLX5_WSEG_SIZE + 2;\n \t}\n-\tloc->wqe_last->cseg.sq_ds = rte_cpu_to_be_32(txq->qp_num_8s | len);\n+\twqem->cseg.sq_ds = rte_cpu_to_be_32(txq->qp_num_8s | len);\n \ttxq->wqe_ci += (len + 3) / 4;\n \tloc->wqe_free -= (len + 3) / 4;\n+\tloc->wqe_last = wqem;\n }\n \n /**\n@@ -4202,7 +4207,7 @@ enum mlx5_txcmp_code {\n \tpkts_n -= loc->pkts_sent;\n \tfor (;;) {\n \t\tstruct mlx5_wqe_dseg *restrict dseg;\n-\t\tstruct mlx5_wqe_eseg *restrict eseg;\n+\t\tstruct mlx5_wqe *restrict wqem;\n \t\tenum mlx5_txcmp_code ret;\n \t\tunsigned int room, part, nlim;\n \t\tunsigned int slen = 0;\n@@ -4221,22 +4226,21 @@ enum mlx5_txcmp_code {\n \t\t\treturn MLX5_TXCMP_CODE_EXIT;\n \t\tif (likely(pkts_n > 1))\n \t\t\trte_prefetch0(*pkts);\n-\t\tloc->wqe_last = txq->wqes + (txq->wqe_ci & txq->wqe_m);\n+\t\twqem = txq->wqes + (txq->wqe_ci & txq->wqe_m);\n \t\t/*\n \t\t * Build eMPW title WQEBB:\n \t\t * - Control Segment, eMPW opcode, zero DS\n \t\t * - Ethernet Segment, no inline\n \t\t */\n-\t\tmlx5_tx_cseg_init(txq, loc, loc->wqe_last, 0,\n+\t\tmlx5_tx_cseg_init(txq, loc, wqem, 0,\n \t\t\t\t MLX5_OPCODE_ENHANCED_MPSW, olx);\n-\t\tmlx5_tx_eseg_none(txq, loc, loc->wqe_last,\n+\t\tmlx5_tx_eseg_none(txq, loc, wqem,\n \t\t\t\t olx & ~MLX5_TXOFF_CONFIG_VLAN);\n-\t\teseg = &loc->wqe_last->eseg;\n-\t\tdseg = &loc->wqe_last->dseg[0];\n+\t\tdseg = &wqem->dseg[0];\n \t\t/* Store the packet length for legacy MPW. */\n \t\tif (MLX5_TXOFF_CONFIG(MPW))\n-\t\t\teseg->mss = rte_cpu_to_be_16\n-\t\t\t\t\t(rte_pktmbuf_data_len(loc->mbuf));\n+\t\t\twqem->eseg.mss = rte_cpu_to_be_16\n+\t\t\t\t\t (rte_pktmbuf_data_len(loc->mbuf));\n \t\troom = RTE_MIN(MLX5_WQE_SIZE_MAX / MLX5_WQE_SIZE,\n \t\t\t loc->wqe_free) * MLX5_WQE_SIZE -\n \t\t\t\t\tMLX5_WQE_CSEG_SIZE -\n@@ -4273,7 +4277,8 @@ enum mlx5_txcmp_code {\n \t\t\t\t * We have some successfully built\n \t\t\t\t * packet Data Segments to send.\n \t\t\t\t */\n-\t\t\t\tmlx5_tx_idone_empw(txq, loc, part, slen, olx);\n+\t\t\t\tmlx5_tx_idone_empw(txq, loc, part,\n+\t\t\t\t\t\t slen, wqem, olx);\n \t\t\t\treturn MLX5_TXCMP_CODE_ERROR;\n \t\t\t}\n \t\t\t/* Inline or not inline - that's the Question. */\n@@ -4295,7 +4300,7 @@ enum mlx5_txcmp_code {\n \t\t\t\t\t * No pointer and inline descriptor\n \t\t\t\t\t * intermix for legacy MPW sessions.\n \t\t\t\t\t */\n-\t\t\t\t\tif (loc->wqe_last->dseg[0].bcount)\n+\t\t\t\t\tif (wqem->dseg[0].bcount)\n \t\t\t\t\t\tbreak;\n \t\t\t\t}\n \t\t\t} else {\n@@ -4344,7 +4349,7 @@ enum mlx5_txcmp_code {\n \t\t\t */\n \t\t\tif (MLX5_TXOFF_CONFIG(MPW) &&\n \t\t\t part != room &&\n-\t\t\t loc->wqe_last->dseg[0].bcount == RTE_BE32(0))\n+\t\t\t wqem->dseg[0].bcount == RTE_BE32(0))\n \t\t\t\tbreak;\n \t\t\t/*\n \t\t\t * Not inlinable VLAN packets are\n@@ -4374,7 +4379,8 @@ enum mlx5_txcmp_code {\n \t\t\t\t * continue build descriptors.\n \t\t\t\t */\n \t\t\t\tpart -= room;\n-\t\t\t\tmlx5_tx_idone_empw(txq, loc, part, slen, olx);\n+\t\t\t\tmlx5_tx_idone_empw(txq, loc, part,\n+\t\t\t\t\t\t slen, wqem, olx);\n \t\t\t\treturn MLX5_TXCMP_CODE_EXIT;\n \t\t\t}\n \t\t\tloc->mbuf = *pkts++;\n@@ -4388,7 +4394,8 @@ enum mlx5_txcmp_code {\n \t\t\t */\n \t\t\tif (ret == MLX5_TXCMP_CODE_MULTI) {\n \t\t\t\tpart -= room;\n-\t\t\t\tmlx5_tx_idone_empw(txq, loc, part, slen, olx);\n+\t\t\t\tmlx5_tx_idone_empw(txq, loc, part,\n+\t\t\t\t\t\t slen, wqem, olx);\n \t\t\t\tif (unlikely(!loc->elts_free ||\n \t\t\t\t\t !loc->wqe_free))\n \t\t\t\t\treturn MLX5_TXCMP_CODE_EXIT;\n@@ -4397,7 +4404,8 @@ enum mlx5_txcmp_code {\n \t\t\tMLX5_ASSERT(NB_SEGS(loc->mbuf) == 1);\n \t\t\tif (ret == MLX5_TXCMP_CODE_TSO) {\n \t\t\t\tpart -= room;\n-\t\t\t\tmlx5_tx_idone_empw(txq, loc, part, slen, olx);\n+\t\t\t\tmlx5_tx_idone_empw(txq, loc, part,\n+\t\t\t\t\t\t slen, wqem, olx);\n \t\t\t\tif (unlikely(!loc->elts_free ||\n \t\t\t\t\t !loc->wqe_free))\n \t\t\t\t\treturn MLX5_TXCMP_CODE_EXIT;\n@@ -4405,7 +4413,8 @@ enum mlx5_txcmp_code {\n \t\t\t}\n \t\t\tif (ret == MLX5_TXCMP_CODE_SINGLE) {\n \t\t\t\tpart -= room;\n-\t\t\t\tmlx5_tx_idone_empw(txq, loc, part, slen, olx);\n+\t\t\t\tmlx5_tx_idone_empw(txq, loc, part,\n+\t\t\t\t\t\t slen, wqem, olx);\n \t\t\t\tif (unlikely(!loc->elts_free ||\n \t\t\t\t\t !loc->wqe_free))\n \t\t\t\t\treturn MLX5_TXCMP_CODE_EXIT;\n@@ -4414,7 +4423,8 @@ enum mlx5_txcmp_code {\n \t\t\tif (ret != MLX5_TXCMP_CODE_EMPW) {\n \t\t\t\tMLX5_ASSERT(false);\n \t\t\t\tpart -= room;\n-\t\t\t\tmlx5_tx_idone_empw(txq, loc, part, slen, olx);\n+\t\t\t\tmlx5_tx_idone_empw(txq, loc, part,\n+\t\t\t\t\t\t slen, wqem, olx);\n \t\t\t\treturn MLX5_TXCMP_CODE_ERROR;\n \t\t\t}\n \t\t\t/* Check if we have minimal room left. */\n@@ -4429,7 +4439,8 @@ enum mlx5_txcmp_code {\n \t\t\t * - software parser settings\n \t\t\t * - packets length (legacy MPW only)\n \t\t\t */\n-\t\t\tif (!mlx5_tx_match_empw(txq, eseg, loc, dlen, olx))\n+\t\t\tif (!mlx5_tx_match_empw(txq, &wqem->eseg,\n+\t\t\t\t\t\tloc, dlen, olx))\n \t\t\t\tbreak;\n \t\t\t/* Packet attributes match, continue the same eMPW. */\n \t\t\tif ((uintptr_t)dseg >= (uintptr_t)txq->wqes_end)\n@@ -4443,7 +4454,7 @@ enum mlx5_txcmp_code {\n \t\tpart -= room;\n \t\tif (unlikely(!part))\n \t\t\treturn MLX5_TXCMP_CODE_EXIT;\n-\t\tmlx5_tx_idone_empw(txq, loc, part, slen, olx);\n+\t\tmlx5_tx_idone_empw(txq, loc, part, slen, wqem, olx);\n \t\tif (unlikely(!loc->elts_free ||\n \t\t\t !loc->wqe_free))\n \t\t\treturn MLX5_TXCMP_CODE_EXIT;\n", "prefixes": [] }