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GET /api/patches/65606/?format=api
{ "id": 65606, "url": "https://patches.dpdk.org/api/patches/65606/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200206042713.6761-1-vattunuru@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200206042713.6761-1-vattunuru@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200206042713.6761-1-vattunuru@marvell.com", "date": "2020-02-06T04:27:13", "name": "[v1,1/1] net/octeontx2: fix flow control initial state", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "acb74871b3349b02958b56a3745bde2db265a953", "submitter": { "id": 1277, "url": "https://patches.dpdk.org/api/people/1277/?format=api", "name": "Vamsi Krishna Attunuru", "email": "vattunuru@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200206042713.6761-1-vattunuru@marvell.com/mbox/", "series": [ { "id": 8441, "url": "https://patches.dpdk.org/api/series/8441/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=8441", "date": "2020-02-06T04:27:13", "name": "[v1,1/1] net/octeontx2: fix flow control initial state", "version": 1, "mbox": "https://patches.dpdk.org/series/8441/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/65606/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/65606/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3A242A04FA;\n\tThu, 6 Feb 2020 05:27:31 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 273721C1E9;\n\tThu, 6 Feb 2020 05:27:30 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 287A41C1D9;\n Thu, 6 Feb 2020 05:27:28 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 0164QWg5031320; Wed, 5 Feb 2020 20:27:28 -0800", "from sc-exch03.marvell.com ([199.233.58.183])\n by mx0a-0016f401.pphosted.com with ESMTP id 2xyhmte20f-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Wed, 05 Feb 2020 20:27:28 -0800", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 5 Feb\n 2020 20:27:26 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Wed, 5 Feb 2020 20:27:26 -0800", "from hyd1vattunuru-dt.caveonetworks.com (unknown [10.29.52.72])\n by maili.marvell.com (Postfix) with ESMTP id 295A53F73BA;\n Wed, 5 Feb 2020 20:27:24 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-type; s=pfpt0818;\n bh=Q09sDRl15WCfPhuXY4kg8BlQHXlR9xdFWRsssrIeSEw=;\n b=fHL6uXkxSsHljXHNfNmcD9GDlE+9KO/LDo+zwy7zVAxgOsDlGrL4tb8nYyeWHclyRhFA\n xMAIuYFiqmbvcKLLJ1qy8fSdoQ5Ja2nRTiJH84bsWCkAuCbyIyBTC8enmRvhb9zbqhdd\n qBtrzq+/X6mAel3quNxnZjqv2D4lawwzy/ws52ZrF6qYQOVIueT9Tkis6N0grIB134+Q\n EtBew8oFEDWfYKCF97Bvk8IcUCQl4IjdMk2QZVZ07ggYUgAGHUV3euEYHDfRKyg8kxOF\n PfhoPYL8CLLAD5lDk0MvemYL75NaIysRYtkxYREFYuXEsoa4jUXN9/OlCPaCMJ/rqtl3 /Q==", "From": "<vattunuru@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n <stable@dpdk.org>", "Date": "Thu, 6 Feb 2020 09:57:13 +0530", "Message-ID": "<20200206042713.6761-1-vattunuru@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-02-05_06:2020-02-04,\n 2020-02-05 signatures=0", "Subject": "[dpdk-dev] [PATCH v1 1/1] net/octeontx2: fix flow control initial\n\tstate", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Vamsi Attunuru <vattunuru@marvell.com>\n\nCurrently when application requests for RTE_FC_NONE earlier\nthan PMD's internal fc mode update, flow control set routine\nis returning without updating the flow control state.\n\nPatch updates the PMD's internal fc mode details during\ndev_configure to ensure any flow control set requests\nissued later are handled properly.\n\nFixes: 609945f1ce90 (\"net/octeontx2: support flow control\")\nCc: stable@dpdk.org\n\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\n---\n drivers/net/octeontx2/otx2_ethdev.c | 6 ++++++\n drivers/net/octeontx2/otx2_ethdev.h | 2 ++\n drivers/net/octeontx2/otx2_flow_ctrl.c | 35 ++++++++++++++++++++++++++++++----\n 3 files changed, 39 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex 1ec234b..25b1c5c 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -1727,6 +1727,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)\n \t\tgoto cq_fini;\n \t}\n \n+\trc = otx2_nix_flow_ctrl_init(eth_dev);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to init flow ctrl mode %d\", rc);\n+\t\tgoto cq_fini;\n+\t}\n+\n \trc = otx2_nix_mc_addr_list_install(eth_dev);\n \tif (rc < 0) {\n \t\totx2_err(\"Failed to install mc address list rc=%d\", rc);\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex 49fed95..4b3ad95 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -509,6 +509,8 @@ int otx2_cgx_mac_addr_set(struct rte_eth_dev *eth_dev,\n \t\t\t struct rte_ether_addr *addr);\n \n /* Flow Control */\n+int otx2_nix_flow_ctrl_init(struct rte_eth_dev *eth_dev);\n+\n int otx2_nix_flow_ctrl_get(struct rte_eth_dev *eth_dev,\n \t\t\t struct rte_eth_fc_conf *fc_conf);\n \ndiff --git a/drivers/net/octeontx2/otx2_flow_ctrl.c b/drivers/net/octeontx2/otx2_flow_ctrl.c\nindex 1c6929e..76bf481 100644\n--- a/drivers/net/octeontx2/otx2_flow_ctrl.c\n+++ b/drivers/net/octeontx2/otx2_flow_ctrl.c\n@@ -200,16 +200,14 @@ int\n otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev)\n {\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_fc_info *fc = &dev->fc_info;\n \tstruct rte_eth_fc_conf fc_conf;\n \n \tif (otx2_dev_is_lbk(dev) || otx2_dev_is_sdp(dev))\n \t\treturn 0;\n \n \tmemset(&fc_conf, 0, sizeof(struct rte_eth_fc_conf));\n-\t/* Both Rx & Tx flow ctrl get enabled(RTE_FC_FULL) in HW\n-\t * by AF driver, update those info in PMD structure.\n-\t */\n-\totx2_nix_flow_ctrl_get(eth_dev, &fc_conf);\n+\tfc_conf.mode = fc->mode;\n \n \t/* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */\n \tif (otx2_dev_is_Ax(dev) &&\n@@ -223,3 +221,32 @@ otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev)\n \n \treturn otx2_nix_flow_ctrl_set(eth_dev, &fc_conf);\n }\n+\n+int\n+otx2_nix_flow_ctrl_init(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_fc_info *fc = &dev->fc_info;\n+\tstruct rte_eth_fc_conf fc_conf;\n+\tint rc;\n+\n+\tif (otx2_dev_is_lbk(dev) || otx2_dev_is_sdp(dev))\n+\t\treturn 0;\n+\n+\tmemset(&fc_conf, 0, sizeof(struct rte_eth_fc_conf));\n+\t/* Both Rx & Tx flow ctrl get enabled(RTE_FC_FULL) in HW\n+\t * by AF driver, update those info in PMD structure.\n+\t */\n+\trc = otx2_nix_flow_ctrl_get(eth_dev, &fc_conf);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\tfc->mode = fc_conf.mode;\n+\tfc->rx_pause = (fc_conf.mode == RTE_FC_FULL) ||\n+\t\t\t(fc_conf.mode == RTE_FC_RX_PAUSE);\n+\tfc->tx_pause = (fc_conf.mode == RTE_FC_FULL) ||\n+\t\t\t(fc_conf.mode == RTE_FC_TX_PAUSE);\n+\n+exit:\n+\treturn rc;\n+}\n", "prefixes": [ "v1", "1/1" ] }