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GET /api/patches/63131/?format=api
{ "id": 63131, "url": "https://patches.dpdk.org/api/patches/63131/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20191120034808.2760-4-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191120034808.2760-4-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20191120034808.2760-4-pbhagavatula@marvell.com", "date": "2019-11-20T03:48:04", "name": "[v2,3/6] net/octeontx: cleanup redudant mbox structs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "48367b377389768047fc7fc1615b2dde1fbd9416", "submitter": { "id": 1183, "url": "https://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20191120034808.2760-4-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 7533, "url": "https://patches.dpdk.org/api/series/7533/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=7533", "date": "2019-11-20T03:48:01", "name": "octeontx: sync with latest SDK", "version": 2, "mbox": "https://patches.dpdk.org/series/7533/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/63131/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/63131/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 129CFA04C1;\n\tWed, 20 Nov 2019 04:48:47 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B06491BE89;\n\tWed, 20 Nov 2019 04:48:23 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 0597D1BC25\n for <dev@dpdk.org>; Wed, 20 Nov 2019 04:48:21 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n xAK3jAq2022863 for <dev@dpdk.org>; Tue, 19 Nov 2019 19:48:21 -0800", "from sc-exch01.marvell.com ([199.233.58.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 2wc82vnp33-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 19 Nov 2019 19:48:21 -0800", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 19 Nov\n 2019 19:48:19 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n Transport; Tue, 19 Nov 2019 19:48:19 -0800", "from BG-LT7430.marvell.com (unknown [10.28.17.72])\n by maili.marvell.com (Postfix) with ESMTP id 03AB53F703F;\n Tue, 19 Nov 2019 19:48:17 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=4sT1HqJ49o3ZHlEJmQsVIiuRDUGIv7Emsi7nkQac+jY=;\n b=GwpdqOCCaa2WxWOCcmWHkqqI9Rj8feKOZX3S5xzlGuzuUOIf2QkGIjSn/+DTXAjqK0D/\n /6c0cvLTOI90zwPNCYKrJtlqcW7nBZiE7SCP6XQlQ6jIO5RWJzm2SkhxFCAvixBsUTno\n KGTj/PtlF8u2h40hx/avKnzem0huTfwo74X6FGCUA+ciWOmcVS0ZKq2nnRxCShDrEWro\n 8qlS50Fwv7xJ0FfKDkR0c9ZJ0ZO7YgMFc7nGFPKNGby9De6XFrh0NBapyK1UY8Khav5z\n 2Us9ajrUwqcHJNtwjNHrs8ngvqJzLolCnD0nu2joQMJ0CV9Y9ZYs/Z3gt6vN6HERn/z+ EA==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>", "CC": "<dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "Date": "Wed, 20 Nov 2019 09:18:04 +0530", "Message-ID": "<20191120034808.2760-4-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20191120034808.2760-1-pbhagavatula@marvell.com>", "References": "<20191120034808.2760-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.95,18.0.572\n definitions=2019-11-19_08:2019-11-15,2019-11-19 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 3/6] net/octeontx: cleanup redudant mbox\n\tstructs", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nCleanup redudant mail box structures.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/net/octeontx/base/octeontx_pkivf.c | 25 +--\n drivers/net/octeontx/base/octeontx_pkivf.h | 242 +++------------------\n 2 files changed, 43 insertions(+), 224 deletions(-)", "diff": "diff --git a/drivers/net/octeontx/base/octeontx_pkivf.c b/drivers/net/octeontx/base/octeontx_pkivf.c\nindex 783b2a2e5..8ce041955 100644\n--- a/drivers/net/octeontx/base/octeontx_pkivf.c\n+++ b/drivers/net/octeontx/base/octeontx_pkivf.c\n@@ -30,9 +30,7 @@ octeontx_pki_port_open(int port)\n {\n \tuint16_t global_domain = octeontx_get_global_domain();\n \tstruct octeontx_mbox_hdr hdr;\n-\tmbox_pki_port_t port_type = {\n-\t\t.port_type = OCTTX_PORT_TYPE_NET,\n-\t};\n+\tpki_port_type_t port_type;\n \tint i, res;\n \n \t/* Check if atleast one PKI vf is in application domain. */\n@@ -45,11 +43,12 @@ octeontx_pki_port_open(int port)\n \tif (i == PKI_VF_MAX)\n \t\treturn -ENODEV;\n \n+\tport_type.port_type = OCTTX_PORT_TYPE_NET;\n \thdr.coproc = OCTEONTX_PKI_COPROC;\n \thdr.msg = MBOX_PKI_PORT_OPEN;\n \thdr.vfid = port;\n \n-\tres = octeontx_mbox_send(&hdr, &port_type, sizeof(mbox_pki_port_t),\n+\tres = octeontx_mbox_send(&hdr, &port_type, sizeof(pki_port_type_t),\n \t\t\t\t NULL, 0);\n \tif (res < 0)\n \t\treturn -EACCES;\n@@ -62,8 +61,8 @@ octeontx_pki_port_hash_config(int port, pki_hash_cfg_t *hash_cfg)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_hash_cfg_t h_cfg = *(mbox_pki_hash_cfg_t *)hash_cfg;\n-\tint len = sizeof(mbox_pki_hash_cfg_t);\n+\tpki_hash_cfg_t h_cfg = *(pki_hash_cfg_t *)hash_cfg;\n+\tint len = sizeof(pki_hash_cfg_t);\n \n \thdr.coproc = OCTEONTX_PKI_COPROC;\n \thdr.msg = MBOX_PKI_PORT_HASH_CONFIG;\n@@ -82,8 +81,8 @@ octeontx_pki_port_pktbuf_config(int port, pki_pktbuf_cfg_t *buf_cfg)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_pktbuf_cfg_t b_cfg = *(mbox_pki_pktbuf_cfg_t *)buf_cfg;\n-\tint len = sizeof(mbox_pki_pktbuf_cfg_t);\n+\tpki_pktbuf_cfg_t b_cfg = *(pki_pktbuf_cfg_t *)buf_cfg;\n+\tint len = sizeof(pki_pktbuf_cfg_t);\n \n \thdr.coproc = OCTEONTX_PKI_COPROC;\n \thdr.msg = MBOX_PKI_PORT_PKTBUF_CONFIG;\n@@ -101,8 +100,8 @@ octeontx_pki_port_create_qos(int port, pki_qos_cfg_t *qos_cfg)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_qos_cfg_t q_cfg = *(mbox_pki_qos_cfg_t *)qos_cfg;\n-\tint len = sizeof(mbox_pki_qos_cfg_t);\n+\tpki_qos_cfg_t q_cfg = *(pki_qos_cfg_t *)qos_cfg;\n+\tint len = sizeof(pki_qos_cfg_t);\n \n \thdr.coproc = OCTEONTX_PKI_COPROC;\n \thdr.msg = MBOX_PKI_PORT_CREATE_QOS;\n@@ -122,9 +121,9 @@ octeontx_pki_port_errchk_config(int port, pki_errchk_cfg_t *cfg)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_errcheck_cfg_t e_cfg;\n-\te_cfg = *((mbox_pki_errcheck_cfg_t *)(cfg));\n-\tint len = sizeof(mbox_pki_errcheck_cfg_t);\n+\tpki_errchk_cfg_t e_cfg;\n+\te_cfg = *((pki_errchk_cfg_t *)(cfg));\n+\tint len = sizeof(pki_errchk_cfg_t);\n \n \thdr.coproc = OCTEONTX_PKI_COPROC;\n \thdr.msg = MBOX_PKI_PORT_ERRCHK_CONFIG;\ndiff --git a/drivers/net/octeontx/base/octeontx_pkivf.h b/drivers/net/octeontx/base/octeontx_pkivf.h\nindex c2a944404..d541dc3bd 100644\n--- a/drivers/net/octeontx/base/octeontx_pkivf.h\n+++ b/drivers/net/octeontx/base/octeontx_pkivf.h\n@@ -39,15 +39,6 @@\n \n #define MBOX_PKI_MAX_QOS_ENTRY 64\n \n-/* pki pkind parse mode */\n-enum {\n-\tMBOX_PKI_PARSE_LA_TO_LG = 0,\n-\tMBOX_PKI_PARSE_LB_TO_LG = 1,\n-\tMBOX_PKI_PARSE_LC_TO_LG = 3,\n-\tMBOX_PKI_PARSE_LG = 0x3f,\n-\tMBOX_PKI_PARSE_NOTHING = 0x7f\n-};\n-\n /* PKI maximum constants */\n #define PKI_VF_MAX\t\t\t(32)\n #define PKI_MAX_PKTLEN\t\t\t(32768)\n@@ -60,189 +51,37 @@ enum {\n \tOCTTX_PORT_TYPE_MAX\n };\n \n-/* pki port config */\n-typedef struct mbox_pki_port_type {\n-\tuint8_t port_type;\n-} mbox_pki_port_t;\n-\n-/* pki port config */\n-typedef struct mbox_pki_port_cfg {\n-\tuint8_t port_type;\n-\tstruct {\n-\t\tuint8_t fcs_pres:1;\n-\t\tuint8_t fcs_skip:1;\n-\t\tuint8_t inst_skip:1;\n-\t\tuint8_t parse_mode:1;\n-\t\tuint8_t mpls_parse:1;\n-\t\tuint8_t inst_hdr_parse:1;\n-\t\tuint8_t fulc_parse:1;\n-\t\tuint8_t dsa_parse:1;\n-\t\tuint8_t hg2_parse:1;\n-\t\tuint8_t hg_parse:1;\n-\t} mmask;\n-\tuint8_t fcs_pres;\n-\tuint8_t fcs_skip;\n-\tuint8_t inst_skip;\n-\tuint8_t parse_mode;\n-\tuint8_t mpls_parse;\n-\tuint8_t inst_hdr_parse;\n-\tuint8_t fulc_parse;\n-\tuint8_t dsa_parse;\n-\tuint8_t hg2_parse;\n-\tuint8_t hg_parse;\n-} mbox_pki_prt_cfg_t;\n-\n-/* pki Flow/style packet buffer config */\n-typedef struct mbox_pki_port_pktbuf_cfg {\n-\tuint8_t port_type;\n-\tstruct {\n-\t\tuint16_t f_mbuff_size:1;\n-\t\tuint16_t f_wqe_skip:1;\n-\t\tuint16_t f_first_skip:1;\n-\t\tuint16_t f_later_skip:1;\n-\t\tuint16_t f_pkt_outside_wqe:1;\n-\t\tuint16_t f_wqe_endian:1;\n-\t\tuint16_t f_cache_mode:1;\n-\t} mmask;\n-\tuint16_t mbuff_size;\n-\tuint16_t wqe_skip;\n-\tuint16_t first_skip;\n-\tuint16_t later_skip;\n-\tuint8_t pkt_outside_wqe;\n-\tuint8_t wqe_endian;\n-\tuint8_t cache_mode;\n-} mbox_pki_pktbuf_cfg_t;\n-\n-/* pki flow/style tag config */\n-typedef struct mbox_pki_port_hash_cfg {\n-\tuint8_t port_type;\n-\tuint32_t tag_slf:1;\n-\tuint32_t tag_sle:1;\n-\tuint32_t tag_sld:1;\n-\tuint32_t tag_slc:1;\n-\tuint32_t tag_dlf:1;\n-\tuint32_t tag_dle:1;\n-\tuint32_t tag_dld:1;\n-\tuint32_t tag_dlc:1;\n-\tuint32_t tag_prt:1;\n-\tuint32_t tag_vlan0:1;\n-\tuint32_t tag_vlan1:1;\n-\tuint32_t tag_ip_pctl:1;\n-\tuint32_t tag_sync:1;\n-\tuint32_t tag_spi:1;\n-\tuint32_t tag_gtp:1;\n-\tuint32_t tag_vni:1;\n-} mbox_pki_hash_cfg_t;\n-\n-/* pki flow/style errcheck config */\n-typedef struct mbox_pki_port_errcheck_cfg {\n-\tuint8_t port_type;\n-\tstruct {\n-\t\tuint32_t f_ip6_udp_opt:1;\n-\t\tuint32_t f_lenerr_en:1;\n-\t\tuint32_t f_maxerr_en:1;\n-\t\tuint32_t f_minerr_en:1;\n-\t\tuint32_t f_fcs_chk:1;\n-\t\tuint32_t f_fcs_strip:1;\n-\t\tuint32_t f_len_lf:1;\n-\t\tuint32_t f_len_le:1;\n-\t\tuint32_t f_len_ld:1;\n-\t\tuint32_t f_len_lc:1;\n-\t\tuint32_t f_csum_lf:1;\n-\t\tuint32_t f_csum_le:1;\n-\t\tuint32_t f_csum_ld:1;\n-\t\tuint32_t f_csum_lc:1;\n-\t\tuint32_t f_min_frame_len;\n-\t\tuint32_t f_max_frame_len;\n-\t} mmask;\n-\tuint64_t ip6_udp_opt:1;\n-\tuint64_t lenerr_en:1;\n-\tuint64_t maxerr_en:1;\n-\tuint64_t minerr_en:1;\n-\tuint64_t fcs_chk:1;\n-\tuint64_t fcs_strip:1;\n-\tuint64_t len_lf:1;\n-\tuint64_t len_le:1;\n-\tuint64_t len_ld:1;\n-\tuint64_t len_lc:1;\n-\tuint64_t csum_lf:1;\n-\tuint64_t csum_le:1;\n-\tuint64_t csum_ld:1;\n-\tuint64_t csum_lc:1;\n-\tuint64_t min_frame_len;\n-\tuint64_t max_frame_len;\n-} mbox_pki_errcheck_cfg_t;\n+/* pki pkind parse mode */\n+enum {\n+\tPKI_PARSE_LA_TO_LG = 0,\n+\tPKI_PARSE_LB_TO_LG = 1,\n+\tPKI_PARSE_LC_TO_LG = 3,\n+\tPKI_PARSE_LG = 0x3f,\n+\tPKI_PARSE_NOTHING = 0x7f\n+};\n \n /* CACHE MODE*/\n enum {\n-\tMBOX_PKI_OPC_MODE_STT = 0LL,\n-\tMBOX_PKI_OPC_MODE_STF = 1LL,\n-\tMBOX_PKI_OPC_MODE_STF1_STT = 2LL,\n-\tMBOX_PKI_OPC_MODE_STF2_STT = 3LL\n+\tPKI_OPC_MODE_STT = 0LL,\n+\tPKI_OPC_MODE_STF = 1LL,\n+\tPKI_OPC_MODE_STF1_STT = 2LL,\n+\tPKI_OPC_MODE_STF2_STT = 3LL\n };\n \n /* PKI QPG QOS*/\n enum {\n-\tMBOX_PKI_QPG_QOS_NONE = 0,\n-\tMBOX_PKI_QPG_QOS_VLAN,\n-\tMBOX_PKI_QPG_QOS_MPLS,\n-\tMBOX_PKI_QPG_QOS_DSA_SRC,\n-\tMBOX_PKI_QPG_QOS_DIFFSERV,\n-\tMBOX_PKI_QPG_QOS_HIGIG,\n-};\n-\n-struct mbox_pki_qos_entry {\n-\tuint16_t port_add;\n-\tuint16_t ggrp_ok;\n-\tuint16_t ggrp_bad;\n-\tuint16_t gaura;\n-\tuint8_t grptag_ok;\n-\tuint8_t grptag_bad;\n-\tuint8_t ena_red;\n-\tuint8_t ena_drop;\n-\tuint8_t tag_type;\n+\tPKI_QPG_QOS_NONE = 0,\n+\tPKI_QPG_QOS_VLAN,\n+\tPKI_QPG_QOS_MPLS,\n+\tPKI_QPG_QOS_DSA_SRC,\n+\tPKI_QPG_QOS_DIFFSERV,\n+\tPKI_QPG_QOS_HIGIG,\n };\n \n-/* pki flow/style enable qos */\n-typedef struct mbox_pki_port_create_qos {\n-\tuint8_t port_type;\n-\tuint8_t qpg_qos;\n-\tuint8_t num_entry;\n-\tuint8_t tag_type;\n-\tuint8_t drop_policy;\n-\tstruct mbox_pki_qos_entry qos_entry[MBOX_PKI_MAX_QOS_ENTRY];\n-} mbox_pki_qos_cfg_t;\n-\n-/* pki flow/style modify qos */\n-typedef struct mbox_pki_port_modify_qos_entry {\n-\tuint8_t port_type;\n-\tuint16_t index;\n-\tstruct {\n-\t\tuint8_t f_port_add:1;\n-\t\tuint8_t f_grp_ok:1;\n-\t\tuint8_t f_grp_bad:1;\n-\t\tuint8_t f_gaura:1;\n-\t\tuint8_t f_grptag_ok:1;\n-\t\tuint8_t f_grptag_bad:1;\n-\t\tuint8_t f_tag_type:1;\n-\t} mmask;\n-\tstruct mbox_pki_qos_entry qos_entry;\n-} mbox_pki_mod_qos_t;\n-\n-/* pki flow/style delete qos */\n-typedef struct mbox_pki_port_delete_qos_entry {\n+/* pki port config */\n+typedef struct pki_port_type {\n \tuint8_t port_type;\n-\tuint16_t index;\n-} mbox_pki_del_qos_t;\n-\n-/* pki pkind parse mode */\n-enum {\n-\tPKI_PARSE_LA_TO_LG = 0,\n-\tPKI_PARSE_LB_TO_LG = 1,\n-\tPKI_PARSE_LC_TO_LG = 3,\n-\tPKI_PARSE_LG = 0x3f,\n-\tPKI_PARSE_NOTHING = 0x7f\n-};\n+} pki_port_type_t;\n \n /* pki port config */\n typedef struct pki_port_cfg {\n@@ -351,25 +190,6 @@ typedef struct pki_port_errcheck_cfg {\n \tuint64_t max_frame_len;\n } pki_errchk_cfg_t;\n \n-\n-/* CACHE MODE*/\n-enum {\n-\tPKI_OPC_MODE_STT = 0LL,\n-\tPKI_OPC_MODE_STF = 1LL,\n-\tPKI_OPC_MODE_STF1_STT = 2LL,\n-\tPKI_OPC_MODE_STF2_STT = 3LL\n-};\n-\n-/* PKI QPG QOS*/\n-enum {\n-\tPKI_QPG_QOS_NONE = 0,\n-\tPKI_QPG_QOS_VLAN,\n-\tPKI_QPG_QOS_MPLS,\n-\tPKI_QPG_QOS_DSA_SRC,\n-\tPKI_QPG_QOS_DIFFSERV,\n-\tPKI_QPG_QOS_HIGIG,\n-};\n-\n struct pki_qos_entry {\n \tuint16_t port_add;\n \tuint16_t ggrp_ok;\n@@ -422,8 +242,8 @@ octeontx_pki_port_modify_qos(int port, pki_mod_qos_t *qos_cfg)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_mod_qos_t q_cfg = *(mbox_pki_mod_qos_t *)qos_cfg;\n-\tint len = sizeof(mbox_pki_mod_qos_t);\n+\tpki_mod_qos_t q_cfg = *(pki_mod_qos_t *)qos_cfg;\n+\tint len = sizeof(pki_mod_qos_t);\n \n \thdr.coproc = OCTEONTX_PKI_COPROC;\n \thdr.msg = MBOX_PKI_PORT_MODIFY_QOS;\n@@ -442,8 +262,8 @@ octeontx_pki_port_delete_qos(int port, pki_del_qos_t *qos_cfg)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_del_qos_t q_cfg = *(mbox_pki_del_qos_t *)qos_cfg;\n-\tint len = sizeof(mbox_pki_del_qos_t);\n+\tpki_del_qos_t q_cfg = *(pki_del_qos_t *)qos_cfg;\n+\tint len = sizeof(pki_del_qos_t);\n \n \thdr.coproc = OCTEONTX_PKI_COPROC;\n \thdr.msg = MBOX_PKI_PORT_DELETE_QOS;\n@@ -462,8 +282,8 @@ octeontx_pki_port_close(int port)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_port_t ptype;\n-\tint len = sizeof(mbox_pki_port_t);\n+\tpki_port_type_t ptype;\n+\tint len = sizeof(pki_port_type_t);\n \tmemset(&ptype, 0, len);\n \tptype.port_type = OCTTX_PORT_TYPE_NET;\n \n@@ -484,8 +304,8 @@ octeontx_pki_port_start(int port)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_port_t ptype;\n-\tint len = sizeof(mbox_pki_port_t);\n+\tpki_port_type_t ptype;\n+\tint len = sizeof(pki_port_type_t);\n \tmemset(&ptype, 0, len);\n \tptype.port_type = OCTTX_PORT_TYPE_NET;\n \n@@ -506,8 +326,8 @@ octeontx_pki_port_stop(int port)\n \tstruct octeontx_mbox_hdr hdr;\n \tint res;\n \n-\tmbox_pki_port_t ptype;\n-\tint len = sizeof(mbox_pki_port_t);\n+\tpki_port_type_t ptype;\n+\tint len = sizeof(pki_port_type_t);\n \tmemset(&ptype, 0, len);\n \tptype.port_type = OCTTX_PORT_TYPE_NET;\n \n", "prefixes": [ "v2", "3/6" ] }