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GET /api/patches/60814/?format=api
{ "id": 60814, "url": "https://patches.dpdk.org/api/patches/60814/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1570633816-4706-9-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1570633816-4706-9-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1570633816-4706-9-git-send-email-anoobj@marvell.com", "date": "2019-10-09T15:10:11", "name": "[RFC,08/13] examples/ipsec-secgw: add eventmode to ipsec-secgw", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cc38c21556a795b2a74d3e5c7748312307ea3a2d", "submitter": { "id": 1205, "url": "https://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1570633816-4706-9-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 6769, "url": "https://patches.dpdk.org/api/series/6769/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6769", "date": "2019-10-09T15:10:03", "name": "add eventmode to ipsec-secgw", "version": 1, "mbox": "https://patches.dpdk.org/series/6769/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/60814/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/60814/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3FEBF1E932;\n\tWed, 9 Oct 2019 17:11:11 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 585AC1E8FF\n\tfor <dev@dpdk.org>; Wed, 9 Oct 2019 17:11:09 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n\tx99Et1V8020519; Wed, 9 Oct 2019 08:11:08 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2vh5rqjknj-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tWed, 09 Oct 2019 08:11:08 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tWed, 9 Oct 2019 08:11:07 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Wed, 9 Oct 2019 08:11:07 -0700", "from ajoseph83.caveonetworks.com.com (unknown [10.29.45.60])\n\tby maili.marvell.com (Postfix) with ESMTP id 3D7433F704C;\n\tWed, 9 Oct 2019 08:11:03 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=63RZ+DdelOjn8vuHvtXR1oRGgDfXDafJomUVUuRVYHU=;\n\tb=Ve/xjcNCU5vHfn2S3WSFBLJDCI6f9EZlQFZ+dbpVEPrT1lr+oTT7UAkqy7isaEbViPxH\n\tRBGwVcadDzunrgn6/l836cZlinSB4n38nRmA9w70c5bY9/h3w29lHV7ej4L96K7gS9jH\n\tS30bPuxpZ4dNGPS4ndskWHWk53JSz34qs0VHsyOFJjujm+jSXRV9Xmnsvef5vTgNurHA\n\tOePz5xLZ5l6oq1fKTJNvr9CNuurkQauHnY30x5lPoWDh+RzeE7DxkNHXshjMh3dMUDnn\n\tWI/D49OuCrcNP8R90macV1SfXtjocz89tjxsqhBWwhsWU+dZwbwDMTqJx1HlHxiowyVG\n\t2A== ", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>, Radu Nicolau <radu.nicolau@intel.com>", "CC": "Anoob Joseph <anoobj@marvell.com>, Thomas Monjalon <thomas@monjalon.net>,\n\tJerin Jacob <jerinj@marvell.com>,\n\tNarayana Prasad <pathreya@marvell.com>, <dev@dpdk.org>,\n\tLukasz Bartosik <lbartosik@marvell.com>", "Date": "Wed, 9 Oct 2019 20:40:11 +0530", "Message-ID": "<1570633816-4706-9-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1570633816-4706-1-git-send-email-anoobj@marvell.com>", "References": "<1570633816-4706-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.95,1.0.8\n\tdefinitions=2019-10-09_06:2019-10-08,2019-10-09 signatures=0", "Subject": "[dpdk-dev] [RFC PATCH 08/13] examples/ipsec-secgw: add eventmode to\n\tipsec-secgw", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add eventmode support to ipsec-secgw. This uses event helper to setup\nand use the eventmode capabilities. Add driver inbound worker.\n\nExample command:\n./ipsec-secgw -c 0x1 -w 0002:02:00.0,nb_ipsec_in_sa=100 -w 0002:07:00.0\n -w 0002:0e:00.0 -w 0002:10:00.1 -- -P -p 0x3 -u 0x1\n --config \"(0,0,0),(1,0,0)\" -f a-aes-gcm-msa.cfg --transfer-mode 1\n --schedule-type 2 --process-mode 1 --process-dir 1\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Lukasz Bartosik <lbartosik@marvell.com>\n---\n examples/ipsec-secgw/Makefile | 1 +\n examples/ipsec-secgw/event_helper.c | 3 +\n examples/ipsec-secgw/event_helper.h | 26 +++\n examples/ipsec-secgw/ipsec-secgw.c | 315 +++++++++++++++++++++++++++++++++++-\n examples/ipsec-secgw/ipsec.h | 7 +\n examples/ipsec-secgw/ipsec_worker.c | 181 +++++++++++++++++++++\n examples/ipsec-secgw/meson.build | 2 +-\n 7 files changed, 527 insertions(+), 8 deletions(-)\n create mode 100644 examples/ipsec-secgw/ipsec_worker.c", "diff": "diff --git a/examples/ipsec-secgw/Makefile b/examples/ipsec-secgw/Makefile\nindex 2a76900..83983ba 100644\n--- a/examples/ipsec-secgw/Makefile\n+++ b/examples/ipsec-secgw/Makefile\n@@ -15,6 +15,7 @@ SRCS-y += sa.c\n SRCS-y += rt.c\n SRCS-y += ipsec_process.c\n SRCS-y += ipsec-secgw.c\n+SRCS-y += ipsec_worker.c\n SRCS-y += event_helper.c\n \n CFLAGS += -gdwarf-2\ndiff --git a/examples/ipsec-secgw/event_helper.c b/examples/ipsec-secgw/event_helper.c\nindex 858b855..3ca9e2f 100644\n--- a/examples/ipsec-secgw/event_helper.c\n+++ b/examples/ipsec-secgw/event_helper.c\n@@ -1003,6 +1003,9 @@ eh_find_worker(uint32_t lcore_id, struct eh_conf *conf,\n \telse\n \t\tcurr_conf.cap.burst = EH_RX_TYPE_NON_BURST;\n \n+\tcurr_conf.cap.ipsec_mode = conf->ipsec_mode;\n+\tcurr_conf.cap.ipsec_dir = conf->ipsec_dir;\n+\n \t/* Now parse the passed list and see if we have matching capabilities */\n \n \t/* Initialize the pointer used to traverse the list */\ndiff --git a/examples/ipsec-secgw/event_helper.h b/examples/ipsec-secgw/event_helper.h\nindex a66bcb3..392e073 100644\n--- a/examples/ipsec-secgw/event_helper.h\n+++ b/examples/ipsec-secgw/event_helper.h\n@@ -84,6 +84,22 @@ enum eh_tx_types {\n \tEH_TX_TYPE_NO_INTERNAL_PORT\n };\n \n+/**\n+ * Event mode ipsec mode types\n+ */\n+enum eh_ipsec_mode_types {\n+\tEH_IPSEC_MODE_TYPE_APP = 0,\n+\tEH_IPSEC_MODE_TYPE_DRIVER\n+};\n+\n+/**\n+ * Event mode ipsec direction types\n+ */\n+enum eh_ipsec_dir_types {\n+\tEH_IPSEC_DIR_TYPE_OUTBOUND = 0,\n+\tEH_IPSEC_DIR_TYPE_INBOUND,\n+};\n+\n /* Event dev params */\n struct eventdev_params {\n \tuint8_t eventdev_id;\n@@ -193,6 +209,12 @@ struct eh_conf {\n \t\t */\n \tvoid *mode_params;\n \t\t/**< Mode specific parameters */\n+\n+\t\t/** Application specific params */\n+\tenum eh_ipsec_mode_types ipsec_mode;\n+\t\t/**< Mode of ipsec run */\n+\tenum eh_ipsec_dir_types ipsec_dir;\n+\t\t/**< Direction of ipsec processing */\n };\n \n /* Workers registered by the application */\n@@ -204,6 +226,10 @@ struct eh_app_worker_params {\n \t\t\t/**< Specify status of rx type burst */\n \t\t\tuint64_t tx_internal_port : 1;\n \t\t\t/**< Specify whether tx internal port is available */\n+\t\t\tuint64_t ipsec_mode : 1;\n+\t\t\t/**< Specify ipsec processing level */\n+\t\t\tuint64_t ipsec_dir : 1;\n+\t\t\t/**< Specify direction of ipsec */\n \t\t};\n \t\tuint64_t u64;\n \t} cap;\ndiff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c\nindex 345c8e5..cb6da25 100644\n--- a/examples/ipsec-secgw/ipsec-secgw.c\n+++ b/examples/ipsec-secgw/ipsec-secgw.c\n@@ -2,6 +2,7 @@\n * Copyright(c) 2016 Intel Corporation\n */\n \n+#include <stdbool.h>\n #include <stdio.h>\n #include <stdlib.h>\n #include <stdint.h>\n@@ -14,6 +15,7 @@\n #include <sys/queue.h>\n #include <stdarg.h>\n #include <errno.h>\n+#include <signal.h>\n #include <getopt.h>\n \n #include <rte_common.h>\n@@ -41,12 +43,17 @@\n #include <rte_jhash.h>\n #include <rte_cryptodev.h>\n #include <rte_security.h>\n+#include <rte_bitmap.h>\n+#include <rte_eventdev.h>\n #include <rte_ip.h>\n #include <rte_ip_frag.h>\n \n+#include \"event_helper.h\"\n #include \"ipsec.h\"\n #include \"parser.h\"\n \n+volatile bool force_quit;\n+\n #define RTE_LOGTYPE_IPSEC RTE_LOGTYPE_USER1\n \n #define MAX_JUMBO_PKT_LEN 9600\n@@ -131,6 +138,10 @@ struct ethaddr_info ethaddr_tbl[RTE_MAX_ETHPORTS] = {\n #define CMD_LINE_OPT_CONFIG\t\t\"config\"\n #define CMD_LINE_OPT_SINGLE_SA\t\t\"single-sa\"\n #define CMD_LINE_OPT_CRYPTODEV_MASK\t\"cryptodev_mask\"\n+#define CMD_LINE_OPT_TRANSFER_MODE\t\"transfer-mode\"\n+#define CMD_LINE_OPT_SCHEDULE_TYPE\t\"schedule-type\"\n+#define CMD_LINE_OPT_IPSEC_MODE\t\t\"process-mode\"\n+#define CMD_LINE_OPT_IPSEC_DIR\t\t\"process-dir\"\n #define CMD_LINE_OPT_RX_OFFLOAD\t\t\"rxoffload\"\n #define CMD_LINE_OPT_TX_OFFLOAD\t\t\"txoffload\"\n #define CMD_LINE_OPT_REASSEMBLE\t\t\"reassemble\"\n@@ -146,7 +157,11 @@ enum {\n \tCMD_LINE_OPT_CONFIG_NUM,\n \tCMD_LINE_OPT_SINGLE_SA_NUM,\n \tCMD_LINE_OPT_CRYPTODEV_MASK_NUM,\n+\tCMD_LINE_OPT_TRANSFER_MODE_NUM,\n+\tCMD_LINE_OPT_SCHEDULE_TYPE_NUM,\n \tCMD_LINE_OPT_RX_OFFLOAD_NUM,\n+\tCMD_LINE_OPT_IPSEC_MODE_NUM,\n+\tCMD_LINE_OPT_IPSEC_DIR_NUM,\n \tCMD_LINE_OPT_TX_OFFLOAD_NUM,\n \tCMD_LINE_OPT_REASSEMBLE_NUM,\n \tCMD_LINE_OPT_MTU_NUM,\n@@ -156,6 +171,10 @@ static const struct option lgopts[] = {\n \t{CMD_LINE_OPT_CONFIG, 1, 0, CMD_LINE_OPT_CONFIG_NUM},\n \t{CMD_LINE_OPT_SINGLE_SA, 1, 0, CMD_LINE_OPT_SINGLE_SA_NUM},\n \t{CMD_LINE_OPT_CRYPTODEV_MASK, 1, 0, CMD_LINE_OPT_CRYPTODEV_MASK_NUM},\n+\t{CMD_LINE_OPT_TRANSFER_MODE, 1, 0, CMD_LINE_OPT_TRANSFER_MODE_NUM},\n+\t{CMD_LINE_OPT_SCHEDULE_TYPE, 1, 0, CMD_LINE_OPT_SCHEDULE_TYPE_NUM},\n+\t{CMD_LINE_OPT_IPSEC_MODE, 1, 0, CMD_LINE_OPT_IPSEC_MODE_NUM},\n+\t{CMD_LINE_OPT_IPSEC_DIR, 1, 0, CMD_LINE_OPT_IPSEC_DIR_NUM},\n \t{CMD_LINE_OPT_RX_OFFLOAD, 1, 0, CMD_LINE_OPT_RX_OFFLOAD_NUM},\n \t{CMD_LINE_OPT_TX_OFFLOAD, 1, 0, CMD_LINE_OPT_TX_OFFLOAD_NUM},\n \t{CMD_LINE_OPT_REASSEMBLE, 1, 0, CMD_LINE_OPT_REASSEMBLE_NUM},\n@@ -1087,8 +1106,8 @@ drain_outbound_crypto_queues(const struct lcore_conf *qconf,\n }\n \n /* main processing loop */\n-static int32_t\n-main_loop(__attribute__((unused)) void *dummy)\n+void\n+ipsec_poll_mode_worker(void)\n {\n \tstruct rte_mbuf *pkts[MAX_PKT_BURST];\n \tuint32_t lcore_id;\n@@ -1130,7 +1149,7 @@ main_loop(__attribute__((unused)) void *dummy)\n \tif (qconf->nb_rx_queue == 0) {\n \t\tRTE_LOG(DEBUG, IPSEC, \"lcore %u has nothing to do\\n\",\n \t\t\tlcore_id);\n-\t\treturn 0;\n+\t\treturn;\n \t}\n \n \tRTE_LOG(INFO, IPSEC, \"entering main loop on lcore %u\\n\", lcore_id);\n@@ -1143,7 +1162,7 @@ main_loop(__attribute__((unused)) void *dummy)\n \t\t\tlcore_id, portid, queueid);\n \t}\n \n-\twhile (1) {\n+\twhile (!force_quit) {\n \t\tcur_tsc = rte_rdtsc();\n \n \t\t/* TX queue buffer drain */\n@@ -1270,6 +1289,10 @@ print_usage(const char *prgname)\n \t\t\" --config (port,queue,lcore)[,(port,queue,lcore)]\"\n \t\t\" [--single-sa SAIDX]\"\n \t\t\" [--cryptodev_mask MASK]\"\n+\t\t\" [--transfer-mode MODE]\"\n+\t\t\" [--schedule-type TYPE]\"\n+\t\t\" [--process-mode MODE]\"\n+\t\t\" [--process-dir DIR]\"\n \t\t\" [--\" CMD_LINE_OPT_RX_OFFLOAD \" RX_OFFLOAD_MASK]\"\n \t\t\" [--\" CMD_LINE_OPT_TX_OFFLOAD \" TX_OFFLOAD_MASK]\"\n \t\t\" [--\" CMD_LINE_OPT_REASSEMBLE \" REASSEMBLE_TABLE_SIZE]\"\n@@ -1291,6 +1314,22 @@ print_usage(const char *prgname)\n \t\t\" bypassing the SP\\n\"\n \t\t\" --cryptodev_mask MASK: Hexadecimal bitmask of the crypto\\n\"\n \t\t\" devices to configure\\n\"\n+\t\t\" --transfer-mode MODE\\n\"\n+\t\t\" 0: Packet transfer via polling (default)\\n\"\n+\t\t\" 1: Packet transfer via eventdev\\n\"\n+\t\t\" --schedule-type TYPE queue schedule type, used only when\\n\"\n+\t\t\" transfer mode is set to eventdev\\n\"\n+\t\t\" 0: Ordered (default)\\n\"\n+\t\t\" 1: Atomic\\n\"\n+\t\t\" 2: Parallel\\n\"\n+\t\t\" --process-mode MODE processing mode, used only when\\n\"\n+\t\t\"\t\t transfer mode is set to eventdev\\n\"\n+\t\t\" 0: application mode (default)\\n\"\n+\t\t\" 1: driver mode\\n\"\n+\t\t\" --process-dir DIR processing direction, used only when\\n\"\n+\t\t\" transfer mode is set to eventdev\\n\"\n+\t\t\" 0: outbound (default)\\n\"\n+\t\t\" 1: inbound\\n\"\n \t\t\" --\" CMD_LINE_OPT_RX_OFFLOAD\n \t\t\": bitmask of the RX HW offload capabilities to enable/use\\n\"\n \t\t\" (DEV_RX_OFFLOAD_*)\\n\"\n@@ -1424,7 +1463,85 @@ print_app_sa_prm(const struct app_sa_prm *prm)\n }\n \n static int32_t\n-parse_args(int32_t argc, char **argv)\n+eh_parse_decimal(const char *str)\n+{\n+\tchar *end = NULL;\n+\tunsigned long num;\n+\n+\tnum = strtoul(str, &end, 10);\n+\tif ((str[0] == '\\0') || (end == NULL) || (*end != '\\0'))\n+\t\treturn -EINVAL;\n+\n+\treturn num;\n+}\n+\n+static int\n+parse_transfer_mode(struct eh_conf *conf, const char *optarg)\n+{\n+\tint32_t parsed_dec;\n+\n+\tparsed_dec = eh_parse_decimal(optarg);\n+\tif (parsed_dec != EH_PKT_TRANSFER_MODE_POLL &&\n+\t parsed_dec != EH_PKT_TRANSFER_MODE_EVENT) {\n+\t\tprintf(\"Unsupported packet transfer mode\");\n+\t\treturn -EINVAL;\n+\t}\n+\tconf->mode = parsed_dec;\n+\treturn 0;\n+}\n+\n+static int\n+parse_schedule_type(struct eh_conf *conf, const char *optarg)\n+{\n+\tstruct eventmode_conf *em_conf = NULL;\n+\tint32_t parsed_dec;\n+\n+\tparsed_dec = eh_parse_decimal(optarg);\n+\tif (parsed_dec != RTE_SCHED_TYPE_ORDERED &&\n+\t parsed_dec != RTE_SCHED_TYPE_ATOMIC &&\n+\t parsed_dec != RTE_SCHED_TYPE_PARALLEL)\n+\t\treturn -EINVAL;\n+\n+\t/* Get eventmode conf */\n+\tem_conf = (struct eventmode_conf *)(conf->mode_params);\n+\n+\tem_conf->ext_params.sched_type = parsed_dec;\n+\n+\treturn 0;\n+}\n+\n+static int\n+parse_ipsec_mode(struct eh_conf *conf, const char *optarg)\n+{\n+\tint32_t parsed_dec;\n+\n+\tparsed_dec = eh_parse_decimal(optarg);\n+\tif (parsed_dec != EH_IPSEC_MODE_TYPE_APP &&\n+\t parsed_dec != EH_IPSEC_MODE_TYPE_DRIVER) {\n+\t\tprintf(\"Unsupported ipsec mode\");\n+\t\treturn -EINVAL;\n+\t}\n+\tconf->ipsec_mode = parsed_dec;\n+\treturn 0;\n+}\n+\n+static int\n+parse_ipsec_dir(struct eh_conf *conf, const char *optarg)\n+{\n+\tint32_t parsed_dec;\n+\n+\tparsed_dec = eh_parse_decimal(optarg);\n+\tif (parsed_dec != EH_IPSEC_DIR_TYPE_INBOUND &&\n+\t parsed_dec != EH_IPSEC_DIR_TYPE_OUTBOUND) {\n+\t\tprintf(\"Unsupported ipsec mode\");\n+\t\treturn -EINVAL;\n+\t}\n+\tconf->ipsec_dir = parsed_dec;\n+\treturn 0;\n+}\n+\n+static int32_t\n+parse_args(int32_t argc, char **argv, struct eh_conf *eh_conf)\n {\n \tint32_t opt, ret;\n \tchar **argvopt;\n@@ -1533,6 +1650,43 @@ parse_args(int32_t argc, char **argv)\n \t\t\t/* else */\n \t\t\tenabled_cryptodev_mask = ret;\n \t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_TRANSFER_MODE_NUM:\n+\t\t\tret = parse_transfer_mode(eh_conf, optarg);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tprintf(\"Invalid packet transfer mode\\n\");\n+\t\t\t\tprint_usage(prgname);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_SCHEDULE_TYPE_NUM:\n+\t\t\tret = parse_schedule_type(eh_conf, optarg);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tprintf(\"Invalid queue schedule type\\n\");\n+\t\t\t\tprint_usage(prgname);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_IPSEC_MODE_NUM:\n+\t\t\tret = parse_ipsec_mode(eh_conf, optarg);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tprintf(\"Invalid ipsec mode\\n\");\n+\t\t\t\tprint_usage(prgname);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tbreak;\n+\n+\t\tcase CMD_LINE_OPT_IPSEC_DIR_NUM:\n+\t\t\tret = parse_ipsec_dir(eh_conf, optarg);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tprintf(\"Invalid ipsec direction\\n\");\n+\t\t\t\tprint_usage(prgname);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t\tbreak;\n+\n \t\tcase CMD_LINE_OPT_RX_OFFLOAD_NUM:\n \t\t\tret = parse_mask(optarg, &dev_rx_offload);\n \t\t\tif (ret != 0) {\n@@ -2378,6 +2532,114 @@ reassemble_init(void)\n \treturn rc;\n }\n \n+static struct eh_conf *\n+eh_conf_init(void)\n+{\n+\tstruct eh_conf *conf = NULL;\n+\tstruct eventmode_conf *em_conf = NULL;\n+\tunsigned int eth_core_id;\n+\tuint32_t nb_bytes;\n+\tvoid *mem = NULL;\n+\n+\t/* Allocate memory for config */\n+\tconf = calloc(1, sizeof(struct eh_conf));\n+\tif (conf == NULL) {\n+\t\tprintf(\"Failed allocating memory for eventmode helper conf\");\n+\t\tgoto err;\n+\t}\n+\n+\t/* Set default conf */\n+\n+\t/* Packet transfer mode: poll */\n+\tconf->mode = EH_PKT_TRANSFER_MODE_POLL;\n+\tconf->ipsec_mode = EH_IPSEC_MODE_TYPE_APP;\n+\tconf->ipsec_dir = EH_IPSEC_DIR_TYPE_OUTBOUND;\n+\n+\t/* Keep all ethernet ports enabled by default */\n+\tconf->eth_portmask = -1;\n+\n+\t/* Allocate memory for event mode params */\n+\tconf->mode_params =\n+\t\tcalloc(1, sizeof(struct eventmode_conf));\n+\tif (conf->mode_params == NULL) {\n+\t\tprintf(\"Failed allocating memory for event mode params\");\n+\t\tgoto err;\n+\t}\n+\n+\t/* Get eventmode conf */\n+\tem_conf = (struct eventmode_conf *)(conf->mode_params);\n+\n+\t/* Allocate and initialize bitmap for eth cores */\n+\tnb_bytes = rte_bitmap_get_memory_footprint(RTE_MAX_LCORE);\n+\tif (!nb_bytes) {\n+\t\tprintf(\"Failed getting bitmap footprint\");\n+\t\tgoto err;\n+\t}\n+\n+\tmem = rte_zmalloc(\"event-helper-ethcore-bitmap\", nb_bytes,\n+\t\t\t RTE_CACHE_LINE_SIZE);\n+\tif (!mem) {\n+\t\tprintf(\"Failed allocating memory for eth cores bitmap\\n\");\n+\t\tgoto err;\n+\t}\n+\n+\tem_conf->eth_core_mask = rte_bitmap_init(RTE_MAX_LCORE, mem, nb_bytes);\n+\tif (!em_conf->eth_core_mask) {\n+\t\tprintf(\"Failed initializing bitmap\");\n+\t\tgoto err;\n+\t}\n+\n+\t/* Schedule type: ordered */\n+\tem_conf->ext_params.sched_type = RTE_SCHED_TYPE_ORDERED;\n+\n+\t/* Set two cores as eth cores for Rx & Tx */\n+\n+\t/* Use first core other than master core as Rx core */\n+\teth_core_id = rte_get_next_lcore(0,\t/* curr core */\n+\t\t\t\t\t 1,\t/* skip master core */\n+\t\t\t\t\t 0\t/* wrap */);\n+\n+\trte_bitmap_set(em_conf->eth_core_mask, eth_core_id);\n+\n+\t/* Use next core as Tx core */\n+\teth_core_id = rte_get_next_lcore(eth_core_id,\t/* curr core */\n+\t\t\t\t\t 1,\t\t/* skip master core */\n+\t\t\t\t\t 0\t\t/* wrap */);\n+\n+\trte_bitmap_set(em_conf->eth_core_mask, eth_core_id);\n+\n+\treturn conf;\n+err:\n+\trte_free(mem);\n+\tfree(em_conf);\n+\tfree(conf);\n+\treturn NULL;\n+}\n+\n+static void\n+eh_conf_uninit(struct eh_conf *conf)\n+{\n+\tstruct eventmode_conf *em_conf = NULL;\n+\n+\t/* Get eventmode conf */\n+\tem_conf = (struct eventmode_conf *)(conf->mode_params);\n+\n+\t/* Free evenmode configuration memory */\n+\trte_free(em_conf->eth_core_mask);\n+\tfree(em_conf);\n+\tfree(conf);\n+}\n+\n+static void\n+signal_handler(int signum)\n+{\n+\tif (signum == SIGINT || signum == SIGTERM) {\n+\t\tprintf(\"\\n\\nSignal %d received, preparing to exit...\\n\",\n+\t\t\t\tsignum);\n+\t\tforce_quit = true;\n+\t}\n+}\n+\n int32_t\n main(int32_t argc, char **argv)\n {\n@@ -2387,6 +2649,7 @@ main(int32_t argc, char **argv)\n \tuint8_t socket_id;\n \tuint16_t portid;\n \tuint64_t req_rx_offloads, req_tx_offloads;\n+\tstruct eh_conf *eh_conf = NULL;\n \tsize_t sess_sz;\n \n \t/* init EAL */\n@@ -2396,8 +2659,17 @@ main(int32_t argc, char **argv)\n \targc -= ret;\n \targv += ret;\n \n+\tforce_quit = false;\n+\tsignal(SIGINT, signal_handler);\n+\tsignal(SIGTERM, signal_handler);\n+\n+\t/* initialize event helper configuration */\n+\teh_conf = eh_conf_init();\n+\tif (eh_conf == NULL)\n+\t\trte_exit(EXIT_FAILURE, \"Failed to init event helper config\");\n+\n \t/* parse application arguments (after the EAL ones) */\n-\tret = parse_args(argc, argv);\n+\tret = parse_args(argc, argv, eh_conf);\n \tif (ret < 0)\n \t\trte_exit(EXIT_FAILURE, \"Invalid parameters\\n\");\n \n@@ -2495,12 +2767,41 @@ main(int32_t argc, char **argv)\n \n \tcheck_all_ports_link_status(enabled_port_mask);\n \n+\t/*\n+\t * Set the enabled port mask in helper conf to be used by helper\n+\t * sub-system. This would be used while intializing devices using\n+\t * helper sub-system.\n+\t */\n+\teh_conf->eth_portmask = enabled_port_mask;\n+\n+\t/* Initialize eventmode components */\n+\teh_devs_init(eh_conf);\n+\n+\n \t/* launch per-lcore init on every lcore */\n-\trte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);\n+\trte_eal_mp_remote_launch(ipsec_launch_one_lcore, eh_conf,\n+\t\t\t\tCALL_MASTER);\n+\n \tRTE_LCORE_FOREACH_SLAVE(lcore_id) {\n \t\tif (rte_eal_wait_lcore(lcore_id) < 0)\n \t\t\treturn -1;\n \t}\n \n+\t/* Uninitialize eventmode components */\n+\teh_devs_uninit(eh_conf);\n+\n+\t/* Free eventmode configuration memory */\n+\teh_conf_uninit(eh_conf);\n+\n+\tRTE_ETH_FOREACH_DEV(portid) {\n+\t\tif ((enabled_port_mask & (1 << portid)) == 0)\n+\t\t\tcontinue;\n+\t\tprintf(\"Closing port %d...\", portid);\n+\t\trte_eth_dev_stop(portid);\n+\t\trte_eth_dev_close(portid);\n+\t\tprintf(\" Done\\n\");\n+\t}\n+\tprintf(\"Bye...\\n\");\n+\n \treturn 0;\n }\ndiff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h\nindex 1efa6e4..1ab52da 100644\n--- a/examples/ipsec-secgw/ipsec.h\n+++ b/examples/ipsec-secgw/ipsec.h\n@@ -228,6 +228,13 @@ struct ipsec_traffic {\n \tstruct traffic_type ip6;\n };\n \n+\n+void\n+ipsec_poll_mode_worker(void);\n+\n+int\n+ipsec_launch_one_lcore(void *args);\n+\n uint16_t\n ipsec_inbound(struct ipsec_ctx *ctx, struct rte_mbuf *pkts[],\n \t\tuint16_t nb_pkts, uint16_t len);\ndiff --git a/examples/ipsec-secgw/ipsec_worker.c b/examples/ipsec-secgw/ipsec_worker.c\nnew file mode 100644\nindex 0000000..6839e25\n--- /dev/null\n+++ b/examples/ipsec-secgw/ipsec_worker.c\n@@ -0,0 +1,181 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2016 Intel Corporation\n+ * Copyright (C) 2019 Marvell International Ltd.\n+ */\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <string.h>\n+#include <stdint.h>\n+#include <inttypes.h>\n+#include <sys/types.h>\n+#include <sys/queue.h>\n+#include <netinet/in.h>\n+#include <setjmp.h>\n+#include <stdarg.h>\n+#include <ctype.h>\n+#include <stdbool.h>\n+\n+#include <rte_common.h>\n+#include <rte_log.h>\n+#include <rte_memcpy.h>\n+#include <rte_atomic.h>\n+#include <rte_cycles.h>\n+#include <rte_prefetch.h>\n+#include <rte_lcore.h>\n+#include <rte_branch_prediction.h>\n+#include <rte_event_eth_tx_adapter.h>\n+#include <rte_ether.h>\n+#include <rte_ethdev.h>\n+#include <rte_eventdev.h>\n+#include <rte_malloc.h>\n+#include <rte_mbuf.h>\n+\n+#include \"ipsec.h\"\n+#include \"event_helper.h\"\n+\n+extern volatile bool force_quit;\n+\n+static inline void\n+ipsec_event_pre_forward(struct rte_mbuf *m, unsigned int portid)\n+{\n+\t/* Save the destination port in the mbuf */\n+\tm->port = portid;\n+\n+\t/* Save eth queue for Tx */\n+\trte_event_eth_tx_adapter_txq_set(m, 0);\n+}\n+\n+/*\n+ * Event mode exposes various operating modes depending on the\n+ * capabilities of the event device and the operating mode\n+ * selected.\n+ */\n+\n+/* Workers registered */\n+#define IPSEC_EVENTMODE_WORKERS\t\t1\n+\n+/*\n+ * Event mode worker\n+ * Operating parameters : non-burst - Tx internal port - driver mode - inbound\n+ */\n+static void\n+ipsec_wrkr_non_burst_int_port_drvr_mode_inb(struct eh_conf *mode_conf,\n+\t\tstruct eh_event_link_info *links, uint8_t nb_links)\n+{\n+\tstruct rte_event ev;\n+\tstruct rte_mbuf *pkt;\n+\tuint32_t lcore_id;\n+\tunsigned int nb_rx = 0;\n+\tunsigned int portid;\n+\n+\tRTE_SET_USED(mode_conf);\n+\n+\t/* Check if we have links registered for this lcore */\n+\tif (nb_links == 0) {\n+\t\t/* No links registered - exit */\n+\t\tgoto exit;\n+\t}\n+\n+\t/* Get core ID */\n+\tlcore_id = rte_lcore_id();\n+\n+\tRTE_LOG(INFO, IPSEC,\n+\t\t\"Launching event mode worker (non-burst - Tx internal port - \"\n+\t\t\"driver mode - inbound) on lcore %d\\n\", lcore_id);\n+\n+\t/* We have valid links */\n+\n+\t/* See if it's single link */\n+\tif (nb_links != 1) {\n+\t\tRTE_LOG(INFO, IPSEC,\n+\t\t\t\"Multiple links not supported. Using first link\\n\");\n+\t}\n+\n+\tRTE_LOG(INFO, IPSEC, \" -- lcoreid=%u event_port_id=%u\\n\", lcore_id,\n+\t\t\tlinks[0].event_portid);\n+\twhile (!force_quit) {\n+\t\t/* Read packet from event queues */\n+\t\tnb_rx = rte_event_dequeue_burst(links[0].eventdev_id,\n+\t\t\t\tlinks[0].event_portid,\n+\t\t\t\t&ev,\t/* events */\n+\t\t\t\t1,\t/* nb_events */\n+\t\t\t\t0\t/* timeout_ticks */);\n+\n+\t\tif (nb_rx == 0)\n+\t\t\tcontinue;\n+\n+\t\tportid = ev.queue_id;\n+\t\tpkt = ev.mbuf;\n+\n+\t\trte_prefetch0(rte_pktmbuf_mtod(pkt, void *));\n+\n+\t\t/* Process packet */\n+\t\tipsec_event_pre_forward(pkt, portid);\n+\n+\t\t/*\n+\t\t * Since tx internal port is available, events can be\n+\t\t * directly enqueued to the adapter and it would be\n+\t\t * internally submitted to the eth device.\n+\t\t */\n+\t\trte_event_eth_tx_adapter_enqueue(links[0].eventdev_id,\n+\t\t\t\tlinks[0].event_portid,\n+\t\t\t\t&ev,\t/* events */\n+\t\t\t\t1\t/* nb_events */);\n+\t}\n+\n+exit:\n+\treturn;\n+}\n+\n+static uint8_t\n+ipsec_eventmode_populate_wrkr_params(struct eh_app_worker_params *wrkrs)\n+{\n+\tuint8_t nb_wrkr_param = 0;\n+\tstruct eh_app_worker_params *wrkr;\n+\n+\t/* Save workers */\n+\twrkr = wrkrs;\n+\n+\t/* Non-burst - Tx internal port - driver mode - inbound */\n+\twrkr->cap.burst = EH_RX_TYPE_NON_BURST;\n+\twrkr->cap.tx_internal_port = EH_TX_TYPE_INTERNAL_PORT;\n+\twrkr->cap.ipsec_mode = EH_IPSEC_MODE_TYPE_DRIVER;\n+\twrkr->cap.ipsec_dir = EH_IPSEC_DIR_TYPE_INBOUND;\n+\twrkr->worker_thread = ipsec_wrkr_non_burst_int_port_drvr_mode_inb;\n+\n+\tnb_wrkr_param++;\n+\treturn nb_wrkr_param;\n+}\n+\n+static void\n+ipsec_eventmode_worker(struct eh_conf *mode_conf)\n+{\n+\tstruct eh_app_worker_params ipsec_wrkr[IPSEC_EVENTMODE_WORKERS] = {\n+\t\t\t\t\t{{{0} }, NULL } };\n+\tuint8_t nb_wrkr_param;\n+\n+\t/* Populate l2fwd_wrkr params */\n+\tnb_wrkr_param = ipsec_eventmode_populate_wrkr_params(ipsec_wrkr);\n+\n+\t/*\n+\t * The helper function will launch the correct worker after checking the\n+\t * event device's capabilities.\n+\t */\n+\teh_launch_worker(mode_conf, ipsec_wrkr, nb_wrkr_param);\n+}\n+\n+int ipsec_launch_one_lcore(void *args)\n+{\n+\tstruct eh_conf *mode_conf;\n+\n+\tmode_conf = (struct eh_conf *)args;\n+\n+\tif (mode_conf->mode == EH_PKT_TRANSFER_MODE_POLL) {\n+\t\t/* App is initialized to run in poll mode */\n+\t\tipsec_poll_mode_worker();\n+\t} else if (mode_conf->mode == EH_PKT_TRANSFER_MODE_EVENT) {\n+\t\t/* App is initialized to run in event mode */\n+\t\tipsec_eventmode_worker(mode_conf);\n+\t}\n+\treturn 0;\n+}\ndiff --git a/examples/ipsec-secgw/meson.build b/examples/ipsec-secgw/meson.build\nindex 20f4064..ab40ca5 100644\n--- a/examples/ipsec-secgw/meson.build\n+++ b/examples/ipsec-secgw/meson.build\n@@ -10,5 +10,5 @@ deps += ['security', 'lpm', 'acl', 'hash', 'ip_frag', 'ipsec', 'eventdev']\n allow_experimental_apis = true\n sources = files(\n \t'esp.c', 'ipsec.c', 'ipsec_process.c', 'ipsec-secgw.c',\n-\t'parser.c', 'rt.c', 'sa.c', 'sp4.c', 'sp6.c', 'event_helper.c'\n+\t'parser.c', 'rt.c', 'sa.c', 'sp4.c', 'sp6.c', 'event_helper.c', 'ipsec_worker.c'\n )\n", "prefixes": [ "RFC", "08/13" ] }