Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/60395/?format=api
{ "id": 60395, "url": "https://patches.dpdk.org/api/patches/60395/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20191002034716.6842-7-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191002034716.6842-7-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20191002034716.6842-7-pbhagavatula@marvell.com", "date": "2019-10-02T03:47:15", "name": "[v7,6/7] examples/eventdev_pipeline: add new Rx RSS hash offload", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fc303c5031f14e139274214223ff4472b2f66cc6", "submitter": { "id": 1183, "url": "https://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20191002034716.6842-7-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 6661, "url": "https://patches.dpdk.org/api/series/6661/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6661", "date": "2019-10-02T03:47:10", "name": "[v7,1/7] ethdev: add set ptype function", "version": 7, "mbox": "https://patches.dpdk.org/series/6661/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/60395/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/60395/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0262A1BEA7;\n\tWed, 2 Oct 2019 05:48:03 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 5223D1BE3D\n\tfor <dev@dpdk.org>; Wed, 2 Oct 2019 05:47:55 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n\tx923j91e015162; Tue, 1 Oct 2019 20:47:54 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2va71mnkmn-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tTue, 01 Oct 2019 20:47:54 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tTue, 1 Oct 2019 20:47:52 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Tue, 1 Oct 2019 20:47:52 -0700", "from BG-LT7430.marvell.com (unknown [10.28.17.20])\n\tby maili.marvell.com (Postfix) with ESMTP id 81C8B3F7051;\n\tTue, 1 Oct 2019 20:47:50 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=3v+TduBM2fi5c+nDeek3t9RNQGHkfyfbY7r81seB2lA=;\n\tb=vte+RD6hnETaVM7wvJKshJ9VLUST4+mqZEn/DpcwIv7ryhrEdbL0rk/T4YRo6P0CarOn\n\tkehKWXU7wq6wfJF3G90kkQwf1NC3mcvq85erKO1udtWE7d9m5fGNP38DYh/8fFUtX7Kj\n\t511z9+PfNYIrKGcm1fDWb0xmxMUNzGp98F1mLMOhhlymwMAe43K+yPMLxeFeZbylImsV\n\twVw++EJ+S4o5vMvLgOwJQ5CJqYa4uBQt2iM+mp23yxxFJJn3kupeVi5K3o62dI3OS/hQ\n\tzgQ7QObgycGo6v9KDkh+H48/mdHSyuBqa4r6Vybq1p/76G/g4AcbbR4WM6oNXh+AbYeH\n\tCg== ", "From": "<pbhagavatula@marvell.com>", "To": "<arybchenko@solarflare.com>, <jerinj@marvell.com>, Harry van Haaren\n\t<harry.van.haaren@intel.com>", "CC": "<dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "Date": "Wed, 2 Oct 2019 09:17:15 +0530", "Message-ID": "<20191002034716.6842-7-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20191002034716.6842-1-pbhagavatula@marvell.com>", "References": "<20191001185219.5248-1-pbhagavatula@marvell.com>\n\t<20191002034716.6842-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.95,1.0.8\n\tdefinitions=2019-10-02_03:2019-10-01,2019-10-02 signatures=0", "Subject": "[dpdk-dev] [PATCH v7 6/7] examples/eventdev_pipeline: add new Rx\n\tRSS hash offload", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nSince pipeline_generic uses `rte_mbuf::hash::rss` add the new Rx offload\nflag `DEV_RX_OFFLOAD_RSS_HASH` to inform PMD to copy the RSS hash result\ninto the mbuf.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n examples/eventdev_pipeline/main.c | 113 -----------------\n .../pipeline_worker_generic.c | 118 ++++++++++++++++++\n .../eventdev_pipeline/pipeline_worker_tx.c | 114 +++++++++++++++++\n 3 files changed, 232 insertions(+), 113 deletions(-)", "diff": "diff --git a/examples/eventdev_pipeline/main.c b/examples/eventdev_pipeline/main.c\nindex f4e57f541..a73b61d59 100644\n--- a/examples/eventdev_pipeline/main.c\n+++ b/examples/eventdev_pipeline/main.c\n@@ -242,118 +242,6 @@ parse_app_args(int argc, char **argv)\n \t}\n }\n \n-/*\n- * Initializes a given port using global settings and with the RX buffers\n- * coming from the mbuf_pool passed as a parameter.\n- */\n-static inline int\n-port_init(uint8_t port, struct rte_mempool *mbuf_pool)\n-{\n-\tstruct rte_eth_rxconf rx_conf;\n-\tstatic const struct rte_eth_conf port_conf_default = {\n-\t\t.rxmode = {\n-\t\t\t.mq_mode = ETH_MQ_RX_RSS,\n-\t\t\t.max_rx_pkt_len = RTE_ETHER_MAX_LEN,\n-\t\t},\n-\t\t.rx_adv_conf = {\n-\t\t\t.rss_conf = {\n-\t\t\t\t.rss_hf = ETH_RSS_IP |\n-\t\t\t\t\t ETH_RSS_TCP |\n-\t\t\t\t\t ETH_RSS_UDP,\n-\t\t\t}\n-\t\t}\n-\t};\n-\tconst uint16_t rx_rings = 1, tx_rings = 1;\n-\tconst uint16_t rx_ring_size = 512, tx_ring_size = 512;\n-\tstruct rte_eth_conf port_conf = port_conf_default;\n-\tint retval;\n-\tuint16_t q;\n-\tstruct rte_eth_dev_info dev_info;\n-\tstruct rte_eth_txconf txconf;\n-\n-\tif (!rte_eth_dev_is_valid_port(port))\n-\t\treturn -1;\n-\n-\trte_eth_dev_info_get(port, &dev_info);\n-\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n-\t\tport_conf.txmode.offloads |=\n-\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n-\trx_conf = dev_info.default_rxconf;\n-\trx_conf.offloads = port_conf.rxmode.offloads;\n-\n-\tport_conf.rx_adv_conf.rss_conf.rss_hf &=\n-\t\tdev_info.flow_type_rss_offloads;\n-\tif (port_conf.rx_adv_conf.rss_conf.rss_hf !=\n-\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf) {\n-\t\tprintf(\"Port %u modified RSS hash function based on hardware support,\"\n-\t\t\t\"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n-\t\t\tport,\n-\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf,\n-\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf);\n-\t}\n-\n-\t/* Configure the Ethernet device. */\n-\tretval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);\n-\tif (retval != 0)\n-\t\treturn retval;\n-\n-\t/* Allocate and set up 1 RX queue per Ethernet port. */\n-\tfor (q = 0; q < rx_rings; q++) {\n-\t\tretval = rte_eth_rx_queue_setup(port, q, rx_ring_size,\n-\t\t\t\trte_eth_dev_socket_id(port), &rx_conf,\n-\t\t\t\tmbuf_pool);\n-\t\tif (retval < 0)\n-\t\t\treturn retval;\n-\t}\n-\n-\ttxconf = dev_info.default_txconf;\n-\ttxconf.offloads = port_conf_default.txmode.offloads;\n-\t/* Allocate and set up 1 TX queue per Ethernet port. */\n-\tfor (q = 0; q < tx_rings; q++) {\n-\t\tretval = rte_eth_tx_queue_setup(port, q, tx_ring_size,\n-\t\t\t\trte_eth_dev_socket_id(port), &txconf);\n-\t\tif (retval < 0)\n-\t\t\treturn retval;\n-\t}\n-\n-\t/* Display the port MAC address. */\n-\tstruct rte_ether_addr addr;\n-\trte_eth_macaddr_get(port, &addr);\n-\tprintf(\"Port %u MAC: %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8\n-\t\t\t \" %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8 \"\\n\",\n-\t\t\t(unsigned int)port,\n-\t\t\taddr.addr_bytes[0], addr.addr_bytes[1],\n-\t\t\taddr.addr_bytes[2], addr.addr_bytes[3],\n-\t\t\taddr.addr_bytes[4], addr.addr_bytes[5]);\n-\n-\t/* Enable RX in promiscuous mode for the Ethernet device. */\n-\trte_eth_promiscuous_enable(port);\n-\n-\treturn 0;\n-}\n-\n-static int\n-init_ports(uint16_t num_ports)\n-{\n-\tuint16_t portid;\n-\n-\tif (!cdata.num_mbuf)\n-\t\tcdata.num_mbuf = 16384 * num_ports;\n-\n-\tstruct rte_mempool *mp = rte_pktmbuf_pool_create(\"packet_pool\",\n-\t\t\t/* mbufs */ cdata.num_mbuf,\n-\t\t\t/* cache_size */ 512,\n-\t\t\t/* priv_size*/ 0,\n-\t\t\t/* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE,\n-\t\t\trte_socket_id());\n-\n-\tRTE_ETH_FOREACH_DEV(portid)\n-\t\tif (port_init(portid, mp) != 0)\n-\t\t\trte_exit(EXIT_FAILURE, \"Cannot init port %\"PRIu16 \"\\n\",\n-\t\t\t\t\tportid);\n-\n-\treturn 0;\n-}\n \n static void\n do_capability_setup(uint8_t eventdev_id)\n@@ -501,7 +389,6 @@ main(int argc, char **argv)\n \tif (dev_id < 0)\n \t\trte_exit(EXIT_FAILURE, \"Error setting up eventdev\\n\");\n \n-\tinit_ports(num_ports);\n \tfdata->cap.adptr_setup(num_ports);\n \n \t/* Start the Ethernet port. */\ndiff --git a/examples/eventdev_pipeline/pipeline_worker_generic.c b/examples/eventdev_pipeline/pipeline_worker_generic.c\nindex 766c8e958..aa1678fe7 100644\n--- a/examples/eventdev_pipeline/pipeline_worker_generic.c\n+++ b/examples/eventdev_pipeline/pipeline_worker_generic.c\n@@ -271,6 +271,123 @@ setup_eventdev_generic(struct worker_data *worker_data)\n \treturn dev_id;\n }\n \n+/*\n+ * Initializes a given port using global settings and with the RX buffers\n+ * coming from the mbuf_pool passed as a parameter.\n+ */\n+static inline int\n+port_init(uint8_t port, struct rte_mempool *mbuf_pool)\n+{\n+\tstruct rte_eth_rxconf rx_conf;\n+\tstatic const struct rte_eth_conf port_conf_default = {\n+\t\t.rxmode = {\n+\t\t\t.mq_mode = ETH_MQ_RX_RSS,\n+\t\t\t.max_rx_pkt_len = RTE_ETHER_MAX_LEN,\n+\t\t},\n+\t\t.rx_adv_conf = {\n+\t\t\t.rss_conf = {\n+\t\t\t\t.rss_hf = ETH_RSS_IP |\n+\t\t\t\t\t ETH_RSS_TCP |\n+\t\t\t\t\t ETH_RSS_UDP,\n+\t\t\t}\n+\t\t}\n+\t};\n+\tconst uint16_t rx_rings = 1, tx_rings = 1;\n+\tconst uint16_t rx_ring_size = 512, tx_ring_size = 512;\n+\tstruct rte_eth_conf port_conf = port_conf_default;\n+\tint retval;\n+\tuint16_t q;\n+\tstruct rte_eth_dev_info dev_info;\n+\tstruct rte_eth_txconf txconf;\n+\n+\tif (!rte_eth_dev_is_valid_port(port))\n+\t\treturn -1;\n+\n+\trte_eth_dev_info_get(port, &dev_info);\n+\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n+\t\tport_conf.txmode.offloads |=\n+\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n+\n+\tif (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_RSS_HASH)\n+\t\tport_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;\n+\n+\trx_conf = dev_info.default_rxconf;\n+\trx_conf.offloads = port_conf.rxmode.offloads;\n+\n+\tport_conf.rx_adv_conf.rss_conf.rss_hf &=\n+\t\tdev_info.flow_type_rss_offloads;\n+\tif (port_conf.rx_adv_conf.rss_conf.rss_hf !=\n+\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf) {\n+\t\tprintf(\"Port %u modified RSS hash function based on hardware support,\"\n+\t\t\t\"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n+\t\t\tport,\n+\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf,\n+\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf);\n+\t}\n+\n+\t/* Configure the Ethernet device. */\n+\tretval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);\n+\tif (retval != 0)\n+\t\treturn retval;\n+\n+\t/* Allocate and set up 1 RX queue per Ethernet port. */\n+\tfor (q = 0; q < rx_rings; q++) {\n+\t\tretval = rte_eth_rx_queue_setup(port, q, rx_ring_size,\n+\t\t\t\trte_eth_dev_socket_id(port), &rx_conf,\n+\t\t\t\tmbuf_pool);\n+\t\tif (retval < 0)\n+\t\t\treturn retval;\n+\t}\n+\n+\ttxconf = dev_info.default_txconf;\n+\ttxconf.offloads = port_conf_default.txmode.offloads;\n+\t/* Allocate and set up 1 TX queue per Ethernet port. */\n+\tfor (q = 0; q < tx_rings; q++) {\n+\t\tretval = rte_eth_tx_queue_setup(port, q, tx_ring_size,\n+\t\t\t\trte_eth_dev_socket_id(port), &txconf);\n+\t\tif (retval < 0)\n+\t\t\treturn retval;\n+\t}\n+\n+\t/* Display the port MAC address. */\n+\tstruct rte_ether_addr addr;\n+\trte_eth_macaddr_get(port, &addr);\n+\tprintf(\"Port %u MAC: %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8\n+\t\t\t \" %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8 \"\\n\",\n+\t\t\t(unsigned int)port,\n+\t\t\taddr.addr_bytes[0], addr.addr_bytes[1],\n+\t\t\taddr.addr_bytes[2], addr.addr_bytes[3],\n+\t\t\taddr.addr_bytes[4], addr.addr_bytes[5]);\n+\n+\t/* Enable RX in promiscuous mode for the Ethernet device. */\n+\trte_eth_promiscuous_enable(port);\n+\n+\treturn 0;\n+}\n+\n+static int\n+init_ports(uint16_t num_ports)\n+{\n+\tuint16_t portid;\n+\n+\tif (!cdata.num_mbuf)\n+\t\tcdata.num_mbuf = 16384 * num_ports;\n+\n+\tstruct rte_mempool *mp = rte_pktmbuf_pool_create(\"packet_pool\",\n+\t\t\t/* mbufs */ cdata.num_mbuf,\n+\t\t\t/* cache_size */ 512,\n+\t\t\t/* priv_size*/ 0,\n+\t\t\t/* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE,\n+\t\t\trte_socket_id());\n+\n+\tRTE_ETH_FOREACH_DEV(portid)\n+\t\tif (port_init(portid, mp) != 0)\n+\t\t\trte_exit(EXIT_FAILURE, \"Cannot init port %\"PRIu16 \"\\n\",\n+\t\t\t\t\tportid);\n+\n+\treturn 0;\n+}\n+\n static void\n init_adapters(uint16_t nb_ports)\n {\n@@ -297,6 +414,7 @@ init_adapters(uint16_t nb_ports)\n \t\tadptr_p_conf.enqueue_depth =\n \t\t\tdev_info.max_event_port_enqueue_depth;\n \n+\tinit_ports(nb_ports);\n \t/* Create one adapter for all the ethernet ports. */\n \tret = rte_event_eth_rx_adapter_create(cdata.rx_adapter_id, evdev_id,\n \t\t\t&adptr_p_conf);\ndiff --git a/examples/eventdev_pipeline/pipeline_worker_tx.c b/examples/eventdev_pipeline/pipeline_worker_tx.c\nindex 8961cd656..52a1b4174 100644\n--- a/examples/eventdev_pipeline/pipeline_worker_tx.c\n+++ b/examples/eventdev_pipeline/pipeline_worker_tx.c\n@@ -603,6 +603,119 @@ service_rx_adapter(void *arg)\n \treturn 0;\n }\n \n+/*\n+ * Initializes a given port using global settings and with the RX buffers\n+ * coming from the mbuf_pool passed as a parameter.\n+ */\n+static inline int\n+port_init(uint8_t port, struct rte_mempool *mbuf_pool)\n+{\n+\tstruct rte_eth_rxconf rx_conf;\n+\tstatic const struct rte_eth_conf port_conf_default = {\n+\t\t.rxmode = {\n+\t\t\t.mq_mode = ETH_MQ_RX_RSS,\n+\t\t\t.max_rx_pkt_len = RTE_ETHER_MAX_LEN,\n+\t\t},\n+\t\t.rx_adv_conf = {\n+\t\t\t.rss_conf = {\n+\t\t\t\t.rss_hf = ETH_RSS_IP |\n+\t\t\t\t\t ETH_RSS_TCP |\n+\t\t\t\t\t ETH_RSS_UDP,\n+\t\t\t}\n+\t\t}\n+\t};\n+\tconst uint16_t rx_rings = 1, tx_rings = 1;\n+\tconst uint16_t rx_ring_size = 512, tx_ring_size = 512;\n+\tstruct rte_eth_conf port_conf = port_conf_default;\n+\tint retval;\n+\tuint16_t q;\n+\tstruct rte_eth_dev_info dev_info;\n+\tstruct rte_eth_txconf txconf;\n+\n+\tif (!rte_eth_dev_is_valid_port(port))\n+\t\treturn -1;\n+\n+\trte_eth_dev_info_get(port, &dev_info);\n+\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n+\t\tport_conf.txmode.offloads |=\n+\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n+\trx_conf = dev_info.default_rxconf;\n+\trx_conf.offloads = port_conf.rxmode.offloads;\n+\n+\tport_conf.rx_adv_conf.rss_conf.rss_hf &=\n+\t\tdev_info.flow_type_rss_offloads;\n+\tif (port_conf.rx_adv_conf.rss_conf.rss_hf !=\n+\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf) {\n+\t\tprintf(\"Port %u modified RSS hash function based on hardware support,\"\n+\t\t\t\"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n+\t\t\tport,\n+\t\t\tport_conf_default.rx_adv_conf.rss_conf.rss_hf,\n+\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf);\n+\t}\n+\n+\t/* Configure the Ethernet device. */\n+\tretval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf);\n+\tif (retval != 0)\n+\t\treturn retval;\n+\n+\t/* Allocate and set up 1 RX queue per Ethernet port. */\n+\tfor (q = 0; q < rx_rings; q++) {\n+\t\tretval = rte_eth_rx_queue_setup(port, q, rx_ring_size,\n+\t\t\t\trte_eth_dev_socket_id(port), &rx_conf,\n+\t\t\t\tmbuf_pool);\n+\t\tif (retval < 0)\n+\t\t\treturn retval;\n+\t}\n+\n+\ttxconf = dev_info.default_txconf;\n+\ttxconf.offloads = port_conf_default.txmode.offloads;\n+\t/* Allocate and set up 1 TX queue per Ethernet port. */\n+\tfor (q = 0; q < tx_rings; q++) {\n+\t\tretval = rte_eth_tx_queue_setup(port, q, tx_ring_size,\n+\t\t\t\trte_eth_dev_socket_id(port), &txconf);\n+\t\tif (retval < 0)\n+\t\t\treturn retval;\n+\t}\n+\n+\t/* Display the port MAC address. */\n+\tstruct rte_ether_addr addr;\n+\trte_eth_macaddr_get(port, &addr);\n+\tprintf(\"Port %u MAC: %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8\n+\t\t\t \" %02\" PRIx8 \" %02\" PRIx8 \" %02\" PRIx8 \"\\n\",\n+\t\t\t(unsigned int)port,\n+\t\t\taddr.addr_bytes[0], addr.addr_bytes[1],\n+\t\t\taddr.addr_bytes[2], addr.addr_bytes[3],\n+\t\t\taddr.addr_bytes[4], addr.addr_bytes[5]);\n+\n+\t/* Enable RX in promiscuous mode for the Ethernet device. */\n+\trte_eth_promiscuous_enable(port);\n+\n+\treturn 0;\n+}\n+\n+static int\n+init_ports(uint16_t num_ports)\n+{\n+\tuint16_t portid;\n+\n+\tif (!cdata.num_mbuf)\n+\t\tcdata.num_mbuf = 16384 * num_ports;\n+\n+\tstruct rte_mempool *mp = rte_pktmbuf_pool_create(\"packet_pool\",\n+\t\t\t/* mbufs */ cdata.num_mbuf,\n+\t\t\t/* cache_size */ 512,\n+\t\t\t/* priv_size*/ 0,\n+\t\t\t/* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE,\n+\t\t\trte_socket_id());\n+\n+\tRTE_ETH_FOREACH_DEV(portid)\n+\t\tif (port_init(portid, mp) != 0)\n+\t\t\trte_exit(EXIT_FAILURE, \"Cannot init port %\"PRIu16 \"\\n\",\n+\t\t\t\t\tportid);\n+\n+\treturn 0;\n+}\n+\n static void\n init_adapters(uint16_t nb_ports)\n {\n@@ -621,6 +734,7 @@ init_adapters(uint16_t nb_ports)\n \t\t.new_event_threshold = 4096,\n \t};\n \n+\tinit_ports(nb_ports);\n \tif (adptr_p_conf.new_event_threshold > dev_info.max_num_events)\n \t\tadptr_p_conf.new_event_threshold = dev_info.max_num_events;\n \tif (adptr_p_conf.dequeue_depth > dev_info.max_event_port_dequeue_depth)\n", "prefixes": [ "v7", "6/7" ] }