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GET /api/patches/59874/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 59874,
    "url": "https://patches.dpdk.org/api/patches/59874/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190926123609.28417-3-rnagadheeraj@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190926123609.28417-3-rnagadheeraj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190926123609.28417-3-rnagadheeraj@marvell.com",
    "date": "2019-09-26T12:36:49",
    "name": "[v5,2/8] crypto/nitrox: create Nitrox symmetric cryptodev",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "8a7ef7f3a738e29d307296ee88d7be0dc7960da2",
    "submitter": {
        "id": 1365,
        "url": "https://patches.dpdk.org/api/people/1365/?format=api",
        "name": "Nagadheeraj Rottela",
        "email": "rnagadheeraj@marvell.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190926123609.28417-3-rnagadheeraj@marvell.com/mbox/",
    "series": [
        {
            "id": 6550,
            "url": "https://patches.dpdk.org/api/series/6550/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6550",
            "date": "2019-09-26T12:36:45",
            "name": "add Nitrox crypto device support",
            "version": 5,
            "mbox": "https://patches.dpdk.org/series/6550/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/59874/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/59874/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        "Delivered-To": "patchwork@dpdk.org",
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        ],
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        "From": "Nagadheeraj Rottela <rnagadheeraj@marvell.com>",
        "To": "\"akhil.goyal@nxp.com\" <akhil.goyal@nxp.com>,\n\t\"pablo.de.lara.guarch@intel.com\" <pablo.de.lara.guarch@intel.com>",
        "CC": "Srikanth Jampala <jsrikanth@marvell.com>, \"dev@dpdk.org\" <dev@dpdk.org>, \n\tNagadheeraj Rottela <rnagadheeraj@marvell.com>",
        "Thread-Topic": "[PATCH v5 2/8] crypto/nitrox: create Nitrox symmetric cryptodev",
        "Thread-Index": "AQHVdGcRP6LWsRA86k61muC8YbHL4A==",
        "Date": "Thu, 26 Sep 2019 12:36:49 +0000",
        "Message-ID": "<20190926123609.28417-3-rnagadheeraj@marvell.com>",
        "References": "<20190716091016.4788-1-rnagadheeraj@marvell.com>\n\t<20190926123609.28417-1-rnagadheeraj@marvell.com>",
        "In-Reply-To": "<20190926123609.28417-1-rnagadheeraj@marvell.com>",
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        "x-ms-publictraffictype": "Email",
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        "Content-Type": "text/plain; charset=\"iso-8859-1\"",
        "Content-Transfer-Encoding": "quoted-printable",
        "MIME-Version": "1.0",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "6eb58e06-ec3e-4827-acf7-08d7427e3363",
        "X-MS-Exchange-CrossTenant-originalarrivaltime": "26 Sep 2019 12:36:49.3856\n\t(UTC)",
        "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted",
        "X-MS-Exchange-CrossTenant-id": "70e1fb47-1155-421d-87fc-2e58f638b6e0",
        "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED",
        "X-MS-Exchange-CrossTenant-userprincipalname": "r8FdTrN0lZdyqvsvvMY0iNVLAOelrot1vbcoDlSBKpNl7M/5NpVYv3149vVUGQp1dg+Vmay0XoCVlY3nNxRwZfICiuyXAbVn0J+YfwfDRe0=",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR18MB2766",
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        "Subject": "[dpdk-dev] [PATCH v5 2/8] crypto/nitrox: create Nitrox symmetric\n\tcryptodev",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
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    },
    "content": "Add Nitrox symmetric cryptodev with following operations,\n- dev_configure\n- dev_start\n- dev_stop\n- dev_close\n- dev_infos_get\n\nSigned-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>\n---\n drivers/crypto/nitrox/Makefile        |   1 +\n drivers/crypto/nitrox/meson.build     |   1 +\n drivers/crypto/nitrox/nitrox_device.c |  13 +++\n drivers/crypto/nitrox/nitrox_device.h |   4 +\n drivers/crypto/nitrox/nitrox_sym.c    | 163 ++++++++++++++++++++++++++++++++++\n drivers/crypto/nitrox/nitrox_sym.h    |  13 +++\n 6 files changed, 195 insertions(+)\n create mode 100644 drivers/crypto/nitrox/nitrox_sym.c\n create mode 100644 drivers/crypto/nitrox/nitrox_sym.h",
    "diff": "diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile\nindex 7681a6603..06c96ccd7 100644\n--- a/drivers/crypto/nitrox/Makefile\n+++ b/drivers/crypto/nitrox/Makefile\n@@ -26,5 +26,6 @@ LDLIBS += -lrte_cryptodev\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_device.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_hal.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_logs.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/crypto/nitrox/meson.build b/drivers/crypto/nitrox/meson.build\nindex ad81f8cd8..1277cf58e 100644\n--- a/drivers/crypto/nitrox/meson.build\n+++ b/drivers/crypto/nitrox/meson.build\n@@ -12,4 +12,5 @@ sources = files(\n \t\t'nitrox_device.c',\n \t\t'nitrox_hal.c',\n \t\t'nitrox_logs.c',\n+\t\t'nitrox_sym.c',\n \t\t)\ndiff --git a/drivers/crypto/nitrox/nitrox_device.c b/drivers/crypto/nitrox/nitrox_device.c\nindex a73528211..5b319dd68 100644\n--- a/drivers/crypto/nitrox/nitrox_device.c\n+++ b/drivers/crypto/nitrox/nitrox_device.c\n@@ -6,6 +6,7 @@\n \n #include \"nitrox_device.h\"\n #include \"nitrox_hal.h\"\n+#include \"nitrox_sym.h\"\n \n #define PCI_VENDOR_ID_CAVIUM\t0x177d\n #define NITROX_V_PCI_VF_DEV_ID\t0x13\n@@ -66,6 +67,7 @@ nitrox_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\tstruct rte_pci_device *pdev)\n {\n \tstruct nitrox_device *ndev;\n+\tint err;\n \n \t/* Nitrox CSR space */\n \tif (!pdev->mem_resource[0].addr)\n@@ -76,6 +78,12 @@ nitrox_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\treturn -ENOMEM;\n \n \tndev_init(ndev, pdev);\n+\terr = nitrox_sym_pmd_create(ndev);\n+\tif (err) {\n+\t\tndev_release(ndev);\n+\t\treturn err;\n+\t}\n+\n \treturn 0;\n }\n \n@@ -83,11 +91,16 @@ static int\n nitrox_pci_remove(struct rte_pci_device *pdev)\n {\n \tstruct nitrox_device *ndev;\n+\tint err;\n \n \tndev = find_ndev(pdev);\n \tif (!ndev)\n \t\treturn -ENODEV;\n \n+\terr = nitrox_sym_pmd_destroy(ndev);\n+\tif (err)\n+\t\treturn err;\n+\n \tndev_release(ndev);\n \treturn 0;\n }\ndiff --git a/drivers/crypto/nitrox/nitrox_device.h b/drivers/crypto/nitrox/nitrox_device.h\nindex 0d0167de2..6b8095f42 100644\n--- a/drivers/crypto/nitrox/nitrox_device.h\n+++ b/drivers/crypto/nitrox/nitrox_device.h\n@@ -8,10 +8,14 @@\n #include <rte_bus_pci.h>\n #include <rte_cryptodev.h>\n \n+struct nitrox_sym_device;\n+\n struct nitrox_device {\n \tTAILQ_ENTRY(nitrox_device) next;\n \tstruct rte_pci_device *pdev;\n \tuint8_t *bar_addr;\n+\tstruct nitrox_sym_device *sym_dev;\n+\tstruct rte_device rte_sym_dev;\n \tuint16_t nr_queues;\n };\n \ndiff --git a/drivers/crypto/nitrox/nitrox_sym.c b/drivers/crypto/nitrox/nitrox_sym.c\nnew file mode 100644\nindex 000000000..12817c6c7\n--- /dev/null\n+++ b/drivers/crypto/nitrox/nitrox_sym.c\n@@ -0,0 +1,163 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#include <stdbool.h>\n+\n+#include <rte_cryptodev_pmd.h>\n+#include <rte_crypto.h>\n+\n+#include \"nitrox_sym.h\"\n+#include \"nitrox_device.h\"\n+#include \"nitrox_logs.h\"\n+\n+#define CRYPTODEV_NAME_NITROX_PMD crypto_nitrox_sym\n+\n+struct nitrox_sym_device {\n+\tstruct rte_cryptodev *cdev;\n+\tstruct nitrox_device *ndev;\n+};\n+\n+uint8_t nitrox_sym_drv_id;\n+static const char nitrox_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_NITROX_PMD);\n+static const struct rte_driver nitrox_rte_sym_drv = {\n+\t.name = nitrox_sym_drv_name,\n+\t.alias = nitrox_sym_drv_name\n+};\n+\n+static int nitrox_sym_dev_qp_release(struct rte_cryptodev *cdev,\n+\t\t\t\t     uint16_t qp_id);\n+\n+static int\n+nitrox_sym_dev_config(struct rte_cryptodev *cdev,\n+\t\t      struct rte_cryptodev_config *config)\n+{\n+\tstruct nitrox_sym_device *sym_dev = cdev->data->dev_private;\n+\tstruct nitrox_device *ndev = sym_dev->ndev;\n+\n+\tif (config->nb_queue_pairs > ndev->nr_queues) {\n+\t\tNITROX_LOG(ERR, \"Invalid queue pairs, max supported %d\\n\",\n+\t\t\t   ndev->nr_queues);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+nitrox_sym_dev_start(struct rte_cryptodev *cdev)\n+{\n+\t/* SE cores initialization is done in PF */\n+\tRTE_SET_USED(cdev);\n+\treturn 0;\n+}\n+\n+static void\n+nitrox_sym_dev_stop(struct rte_cryptodev *cdev)\n+{\n+\t/* SE cores cleanup is done in PF */\n+\tRTE_SET_USED(cdev);\n+}\n+\n+static int\n+nitrox_sym_dev_close(struct rte_cryptodev *cdev)\n+{\n+\tint i, ret;\n+\n+\tfor (i = 0; i < cdev->data->nb_queue_pairs; i++) {\n+\t\tret = nitrox_sym_dev_qp_release(cdev, i);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static void\n+nitrox_sym_dev_info_get(struct rte_cryptodev *cdev,\n+\t\t\tstruct rte_cryptodev_info *info)\n+{\n+\tstruct nitrox_sym_device *sym_dev = cdev->data->dev_private;\n+\tstruct nitrox_device *ndev = sym_dev->ndev;\n+\n+\tif (!info)\n+\t\treturn;\n+\n+\tinfo->max_nb_queue_pairs = ndev->nr_queues;\n+\tinfo->feature_flags = cdev->feature_flags;\n+\tinfo->driver_id = nitrox_sym_drv_id;\n+\tinfo->sym.max_nb_sessions = 0;\n+}\n+\n+static int\n+nitrox_sym_dev_qp_release(struct rte_cryptodev *cdev, uint16_t qp_id)\n+{\n+\tRTE_SET_USED(cdev);\n+\tRTE_SET_USED(qp_id);\n+\treturn 0;\n+}\n+\n+static struct rte_cryptodev_ops nitrox_cryptodev_ops = {\n+\t.dev_configure\t\t= nitrox_sym_dev_config,\n+\t.dev_start\t\t= nitrox_sym_dev_start,\n+\t.dev_stop\t\t= nitrox_sym_dev_stop,\n+\t.dev_close\t\t= nitrox_sym_dev_close,\n+\t.dev_infos_get\t\t= nitrox_sym_dev_info_get,\n+\t.stats_get\t\t= NULL,\n+\t.stats_reset\t\t= NULL,\n+\t.queue_pair_setup\t= NULL,\n+\t.queue_pair_release     = NULL,\n+\t.sym_session_get_size   = NULL,\n+\t.sym_session_configure  = NULL,\n+\t.sym_session_clear      = NULL\n+};\n+\n+int\n+nitrox_sym_pmd_create(struct nitrox_device *ndev)\n+{\n+\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tstruct rte_cryptodev_pmd_init_params init_params = {\n+\t\t\t.name = \"\",\n+\t\t\t.socket_id = ndev->pdev->device.numa_node,\n+\t\t\t.private_data_size = sizeof(struct nitrox_sym_device)\n+\t};\n+\tstruct rte_cryptodev *cdev;\n+\n+\trte_pci_device_name(&ndev->pdev->addr, name, sizeof(name));\n+\tsnprintf(name + strlen(name), RTE_CRYPTODEV_NAME_MAX_LEN, \"_n5sym\");\n+\tndev->rte_sym_dev.driver = &nitrox_rte_sym_drv;\n+\tndev->rte_sym_dev.numa_node = ndev->pdev->device.numa_node;\n+\tndev->rte_sym_dev.devargs = NULL;\n+\tcdev = rte_cryptodev_pmd_create(name, &ndev->rte_sym_dev,\n+\t\t\t\t\t&init_params);\n+\tif (!cdev) {\n+\t\tNITROX_LOG(ERR, \"Cryptodev '%s' creation failed\\n\", name);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tndev->rte_sym_dev.name = cdev->data->name;\n+\tcdev->driver_id = nitrox_sym_drv_id;\n+\tcdev->dev_ops = &nitrox_cryptodev_ops;\n+\tcdev->enqueue_burst = NULL;\n+\tcdev->dequeue_burst = NULL;\n+\tcdev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n+\t\tRTE_CRYPTODEV_FF_HW_ACCELERATED;\n+\n+\tndev->sym_dev = cdev->data->dev_private;\n+\tndev->sym_dev->cdev = cdev;\n+\tndev->sym_dev->ndev = ndev;\n+\tNITROX_LOG(DEBUG, \"Created cryptodev '%s', dev_id %d, drv_id %d\\n\",\n+\t\t   cdev->data->name, cdev->data->dev_id, nitrox_sym_drv_id);\n+\treturn 0;\n+}\n+\n+int\n+nitrox_sym_pmd_destroy(struct nitrox_device *ndev)\n+{\n+\treturn rte_cryptodev_pmd_destroy(ndev->sym_dev->cdev);\n+}\n+\n+static struct cryptodev_driver nitrox_crypto_drv;\n+RTE_PMD_REGISTER_CRYPTO_DRIVER(nitrox_crypto_drv,\n+\t\tnitrox_rte_sym_drv,\n+\t\tnitrox_sym_drv_id);\ndiff --git a/drivers/crypto/nitrox/nitrox_sym.h b/drivers/crypto/nitrox/nitrox_sym.h\nnew file mode 100644\nindex 000000000..f30847e8a\n--- /dev/null\n+++ b/drivers/crypto/nitrox/nitrox_sym.h\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef _NITROX_SYM_H_\n+#define _NITROX_SYM_H_\n+\n+struct nitrox_device;\n+\n+int nitrox_sym_pmd_create(struct nitrox_device *ndev);\n+int nitrox_sym_pmd_destroy(struct nitrox_device *ndev);\n+\n+#endif /* _NITROX_SYM_H_ */\n",
    "prefixes": [
        "v5",
        "2/8"
    ]
}