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GET /api/patches/59591/?format=api
{ "id": 59591, "url": "https://patches.dpdk.org/api/patches/59591/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190923074448.7847-20-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190923074448.7847-20-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190923074448.7847-20-qi.z.zhang@intel.com", "date": "2019-09-23T07:44:37", "name": "[v5,19/30] net/ice/base: add FDIR support for GTPU qfi field", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "2bc0071b6ad683a3d13908e66630a76c9000f5e3", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "https://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190923074448.7847-20-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 6483, "url": "https://patches.dpdk.org/api/series/6483/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6483", "date": "2019-09-23T07:44:18", "name": "net/ice/base: share code update secend batch.", "version": 5, "mbox": "https://patches.dpdk.org/series/6483/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/59591/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/59591/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B43121BEDF;\n\tMon, 23 Sep 2019 09:43:33 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\tby dpdk.org (Postfix) with ESMTP id 02D8A1BEA3\n\tfor <dev@dpdk.org>; Mon, 23 Sep 2019 09:42:31 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n\tby fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t23 Sep 2019 00:42:31 -0700", "from dpdk51.sh.intel.com ([10.67.110.245])\n\tby orsmga008.jf.intel.com with ESMTP; 23 Sep 2019 00:42:29 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,539,1559545200\"; d=\"scan'208\";a=\"182445683\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "wenzhuo.lu@intel.com,\n\tqiming.yang@intel.com", "Cc": "dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n\tJunfeng Guo <junfeng.guo@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Mon, 23 Sep 2019 15:44:37 +0800", "Message-Id": "<20190923074448.7847-20-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20190923074448.7847-1-qi.z.zhang@intel.com>", "References": "<20190902035551.16852-1-qi.z.zhang@intel.com>\n\t<20190923074448.7847-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 19/30] net/ice/base: add FDIR support for GTPU\n\tqfi field", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add GTPU qfi field support for flow director. Note that for GTPU pkt,\nonly qfi field (6 bits) can be set for FD. The supported GTPU pkts are\ndefined as:\nICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,\nICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,\nICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,\nICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER (FRAG and PAY belong to this)\n\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_fdir.c | 111 ++++++++++++++++++++++++++++++++++++++++\n drivers/net/ice/base/ice_fdir.h | 22 ++++++++\n drivers/net/ice/base/ice_type.h | 4 ++\n 3 files changed, 137 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c\nindex 3a2175b30..219588c46 100644\n--- a/drivers/net/ice/base/ice_fdir.c\n+++ b/drivers/net/ice/base/ice_fdir.c\n@@ -42,6 +42,66 @@ static const u8 ice_fdir_ipv4_pkt[] = {\n \t0x00, 0x00\n };\n \n+static const u8 ice_fdir_udp4_gtpu4_pkt[] = {\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,\n+\t0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00,\n+\t0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00,\n+\t0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00,\n+};\n+\n+static const u8 ice_fdir_tcp4_gtpu4_pkt[] = {\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,\n+\t0x00, 0x58, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00,\n+\t0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00,\n+\t0x00, 0x28, 0x00, 0x00, 0x40, 0x00, 0x40, 0x06,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+};\n+\n+static const u8 ice_fdir_icmp4_gtpu4_pkt[] = {\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,\n+\t0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00,\n+\t0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00,\n+\t0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x01,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00,\n+};\n+\n+static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,\n+\t0x00, 0x44, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00,\n+\t0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00,\n+\t0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00,\n+\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t0x00, 0x00,\n+};\n+\n static const u8 ice_fdir_tcpv6_pkt[] = {\n \t0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n \t0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,\n@@ -241,6 +301,34 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {\n \t\tsizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt,\n \t},\n \t{\n+\t\tICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,\n+\t\tsizeof(ice_fdir_udp4_gtpu4_pkt),\n+\t\tice_fdir_udp4_gtpu4_pkt,\n+\t\tsizeof(ice_fdir_udp4_gtpu4_pkt),\n+\t\tice_fdir_udp4_gtpu4_pkt,\n+\t},\n+\t{\n+\t\tICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,\n+\t\tsizeof(ice_fdir_tcp4_gtpu4_pkt),\n+\t\tice_fdir_tcp4_gtpu4_pkt,\n+\t\tsizeof(ice_fdir_tcp4_gtpu4_pkt),\n+\t\tice_fdir_tcp4_gtpu4_pkt,\n+\t},\n+\t{\n+\t\tICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,\n+\t\tsizeof(ice_fdir_icmp4_gtpu4_pkt),\n+\t\tice_fdir_icmp4_gtpu4_pkt,\n+\t\tsizeof(ice_fdir_icmp4_gtpu4_pkt),\n+\t\tice_fdir_icmp4_gtpu4_pkt,\n+\t},\n+\t{\n+\t\tICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,\n+\t\tsizeof(ice_fdir_ipv4_gtpu4_pkt),\n+\t\tice_fdir_ipv4_gtpu4_pkt,\n+\t\tsizeof(ice_fdir_ipv4_gtpu4_pkt),\n+\t\tice_fdir_ipv4_gtpu4_pkt,\n+\t},\n+\t{\n \t\tICE_FLTR_PTYPE_NONF_IPV6_TCP,\n \t\tsizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt,\n \t\tsizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt,\n@@ -488,6 +576,22 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr)\n }\n \n /**\n+ * ice_pkt_insert_u6_qfi - insert a u6 value qfi into a memory buffer for gtpu\n+ * @pkt: packet buffer\n+ * @offset: offset into buffer\n+ * @data: 8 bit value to convert and insert into pkt at offset\n+ *\n+ * This function is designed for inserting qfi (6 bits) for gtpu.\n+ */\n+static void ice_pkt_insert_u6_qfi(u8 *pkt, int offset, u8 data)\n+{\n+\tu8 ret;\n+\n+\tret = (data & 0x3F) + (*(pkt + offset) & 0xC0);\n+\tice_memcpy(pkt + offset, &ret, sizeof(ret), ICE_NONDMA_TO_NONDMA);\n+}\n+\n+/**\n * ice_pkt_insert_u8 - insert a u8 value into a memory buffer.\n * @pkt: packet buffer\n * @offset: offset into buffer\n@@ -678,6 +782,13 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,\n \t\t\t\t input->ip.v4.proto);\n \t\tice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);\n \t\tbreak;\n+\tcase ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP:\n+\tcase ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:\n+\tcase ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP:\n+\tcase ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:\n+\t\tice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET,\n+\t\t\t\t input->gtpu_data.qfi);\n+\t\tbreak;\n \tcase ICE_FLTR_PTYPE_NONF_IPV6_TCP:\n \t\tice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,\n \t\t\t\t\t input->ip.v6.dst_ip);\ndiff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h\nindex 007f6dd8f..22e5bcf8c 100644\n--- a/drivers/net/ice/base/ice_fdir.h\n+++ b/drivers/net/ice/base/ice_fdir.h\n@@ -87,6 +87,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);\n #define ICE_IPV6_TC_OFFSET\t\t14\n #define ICE_IPV6_HLIM_OFFSET\t\t21\n #define ICE_IPV6_PROTO_OFFSET\t\t20\n+#define ICE_IPV4_GTPU_QFI_OFFSET\t56\n \n #define ICE_FDIR_MAX_FLTRS\t\t16384\n \n@@ -146,6 +147,24 @@ struct ice_fdir_v6 {\n \tu8 hlim;\n };\n \n+struct ice_fdir_udp_gtp {\n+\tu8 flags;\n+\tu8 msg_type;\n+\tu16 rsrvd_len;\n+\tu32 teid;\n+\tu16 rsrvd_seq_nbr;\n+\tu8 rsrvd_n_pdu_nbr;\n+\tu8 rsrvd_next_ext_type;\n+\tu8 rsvrd_ext_len;\n+\tu8\tpdu_type:4,\n+\t\tspare:4;\n+\tu8\tppp:1,\n+\t\trqi:1,\n+\t\tqfi:6;\n+\tu32 rsvrd;\n+\tu8 next_ext;\n+};\n+\n struct ice_fdir_extra {\n \tu8 dst_mac[ETH_ALEN];\t/* dest MAC address */\n \tu32 usr_def[2];\t\t/* user data */\n@@ -162,6 +181,9 @@ struct ice_fdir_fltr {\n \t\tstruct ice_fdir_v6 v6;\n \t} ip, mask;\n \n+\tstruct ice_fdir_udp_gtp gtpu_data;\n+\tstruct ice_fdir_udp_gtp gtpu_mask;\n+\n \tstruct ice_fdir_extra ext_data;\n \tstruct ice_fdir_extra ext_mask;\n \ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 7d0a4f63f..500b88461 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -288,6 +288,10 @@ enum ice_fltr_ptype {\n \tICE_FLTR_PTYPE_NONF_IPV4_TCP,\n \tICE_FLTR_PTYPE_NONF_IPV4_SCTP,\n \tICE_FLTR_PTYPE_NONF_IPV4_OTHER,\n+\tICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,\n+\tICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,\n+\tICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,\n+\tICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,\n \tICE_FLTR_PTYPE_FRAG_IPV4,\n \tICE_FLTR_PTYPE_NONF_IPV6_UDP,\n \tICE_FLTR_PTYPE_NONF_IPV6_TCP,\n", "prefixes": [ "v5", "19/30" ] }