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GET /api/patches/58766/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 58766,
    "url": "https://patches.dpdk.org/api/patches/58766/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190906073217.13873-4-shshaikh@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190906073217.13873-4-shshaikh@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190906073217.13873-4-shshaikh@marvell.com",
    "date": "2019-09-06T07:32:15",
    "name": "[v1,3/5] net/qede: fix RSS configuration as per new 100Gb queue allocation method",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "923022d0019ac9c74d34090bbec9b70caeb3da69",
    "submitter": {
        "id": 1210,
        "url": "https://patches.dpdk.org/api/people/1210/?format=api",
        "name": "Shahed Shaikh",
        "email": "shshaikh@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190906073217.13873-4-shshaikh@marvell.com/mbox/",
    "series": [
        {
            "id": 6280,
            "url": "https://patches.dpdk.org/api/series/6280/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6280",
            "date": "2019-09-06T07:32:13",
            "name": "net/qede: fixes and enhancement",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/6280/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/58766/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/58766/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0617E1F24F;\n\tFri,  6 Sep 2019 09:34:01 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 1252E1F222;\n\tFri,  6 Sep 2019 09:32:56 +0200 (CEST)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n\tx867K8LH000371; Fri, 6 Sep 2019 00:32:56 -0700",
            "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2uqp8pq9f7-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tFri, 06 Sep 2019 00:32:56 -0700",
            "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tFri, 6 Sep 2019 00:32:54 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Fri, 6 Sep 2019 00:32:54 -0700",
            "from dut1171.mv.qlogic.com (unknown [10.112.88.18])\n\tby maili.marvell.com (Postfix) with ESMTP id DE7023F7045;\n\tFri,  6 Sep 2019 00:32:53 -0700 (PDT)",
            "from dut1171.mv.qlogic.com (localhost [127.0.0.1])\n\tby dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id x867WrnQ013922;\n\tFri, 6 Sep 2019 00:32:53 -0700",
            "(from root@localhost)\n\tby dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id x867WrJh013921;\n\tFri, 6 Sep 2019 00:32:53 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-type; s=pfpt0818;\n\tbh=46Dgbt9HqUjcrjkBa3iLVpSkAKKl7K9ho6R3h4pLPd0=; \n\tb=iAwvXygJI0V/unK53JY88tfpviZV2tr3i392IT2819JWcheScIvF7jLzG/o9ke19crtO\n\tdxHzKdiU/Og3/3poi9r/Iio883wD92A7+53EbSOr8BQb5W6//Z2EAYV5LzEzVhZQVVhv\n\tPGvAQGmsJwtBe2GwvcP6G94Mg6KuSPs3Cq+O6BMgYqKe30qhjWI209nBi1k4tsA6V3Yz\n\t+PAbawW7OLIgtGFLVIY+Qcbh/h2jxhA7rsbM3iGlq7s21Rlf7vaK1pWZmJkBK5Cjn38j\n\tNkoc/YyajTEa0v9VpHlADNgixloyNaTcmK2ZLb9+d/9A1KkDh0DYNtmNIj9l/WOoz/t4\n\tOg== ",
        "From": "Shahed Shaikh <shshaikh@marvell.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<rmody@marvell.com>, <jerinj@marvell.com>,\n\t<GR-Everest-DPDK-Dev@marvell.com>, <stable@dpdk.org>",
        "Date": "Fri, 6 Sep 2019 00:32:15 -0700",
        "Message-ID": "<20190906073217.13873-4-shshaikh@marvell.com>",
        "X-Mailer": "git-send-email 2.12.0",
        "In-Reply-To": "<20190906073217.13873-1-shshaikh@marvell.com>",
        "References": "<20190906073217.13873-1-shshaikh@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.70,1.0.8\n\tdefinitions=2019-09-06_03:2019-09-04,2019-09-06 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v1 3/5] net/qede: fix RSS configuration as per\n\tnew 100Gb queue allocation method",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "With old design, RETA was configured in round-robin fashion since\nqueue allocation was distributed across both engines alternately.\nNow, we need to configure RETA symmetrically on both engines since\nboth engines have same number of queues.\n\nFixes: 2af14ca79c0a (\"net/qede: support 100G\")\nCc: stable@dpdk.org\n\nSigned-off-by: Shahed Shaikh <shshaikh@marvell.com>\n---\n drivers/net/qede/qede_ethdev.c | 110 ++++++++-------------------------\n 1 file changed, 27 insertions(+), 83 deletions(-)",
    "diff": "diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c\nindex 308588cb8..8b75ca3a7 100644\n--- a/drivers/net/qede/qede_ethdev.c\n+++ b/drivers/net/qede/qede_ethdev.c\n@@ -1962,8 +1962,7 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_dev,\n \tuint32_t *key = (uint32_t *)rss_conf->rss_key;\n \tuint64_t hf = rss_conf->rss_hf;\n \tuint8_t len = rss_conf->rss_key_len;\n-\tuint8_t idx;\n-\tuint8_t i;\n+\tuint8_t idx, i, j, fpidx;\n \tint rc;\n \n \tmemset(&vport_update_params, 0, sizeof(vport_update_params));\n@@ -1997,14 +1996,18 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_dev,\n \t/* tbl_size has to be set with capabilities */\n \trss_params.rss_table_size_log = 7;\n \tvport_update_params.vport_id = 0;\n-\t/* pass the L2 handles instead of qids */\n-\tfor (i = 0 ; i < ECORE_RSS_IND_TABLE_SIZE ; i++) {\n-\t\tidx = i % QEDE_RSS_COUNT(eth_dev);\n-\t\trss_params.rss_ind_table[i] = qdev->fp_array[idx].rxq->handle;\n-\t}\n-\tvport_update_params.rss_params = &rss_params;\n \n \tfor_each_hwfn(edev, i) {\n+\t\t/* pass the L2 handles instead of qids */\n+\t\tfor (j = 0 ; j < ECORE_RSS_IND_TABLE_SIZE ; j++) {\n+\t\t\tidx = j % QEDE_RSS_COUNT(eth_dev);\n+\t\t\tfpidx = idx * edev->num_hwfns + i;\n+\t\t\trss_params.rss_ind_table[j] =\n+\t\t\t\tqdev->fp_array[fpidx].rxq->handle;\n+\t\t}\n+\n+\t\tvport_update_params.rss_params = &rss_params;\n+\n \t\tp_hwfn = &edev->hwfns[i];\n \t\tvport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid;\n \t\trc = ecore_sp_vport_update(p_hwfn, &vport_update_params,\n@@ -2056,61 +2059,6 @@ static int qede_rss_hash_conf_get(struct rte_eth_dev *eth_dev,\n \treturn 0;\n }\n \n-static bool qede_update_rss_parm_cmt(struct ecore_dev *edev,\n-\t\t\t\t    struct ecore_rss_params *rss)\n-{\n-\tint i, fn;\n-\tbool rss_mode = 1; /* enable */\n-\tstruct ecore_queue_cid *cid;\n-\tstruct ecore_rss_params *t_rss;\n-\n-\t/* In regular scenario, we'd simply need to take input handlers.\n-\t * But in CMT, we'd have to split the handlers according to the\n-\t * engine they were configured on. We'd then have to understand\n-\t * whether RSS is really required, since 2-queues on CMT doesn't\n-\t * require RSS.\n-\t */\n-\n-\t/* CMT should be round-robin */\n-\tfor (i = 0; i < ECORE_RSS_IND_TABLE_SIZE; i++) {\n-\t\tcid = rss->rss_ind_table[i];\n-\n-\t\tif (cid->p_owner == ECORE_LEADING_HWFN(edev))\n-\t\t\tt_rss = &rss[0];\n-\t\telse\n-\t\t\tt_rss = &rss[1];\n-\n-\t\tt_rss->rss_ind_table[i / edev->num_hwfns] = cid;\n-\t}\n-\n-\tt_rss = &rss[1];\n-\tt_rss->update_rss_ind_table = 1;\n-\tt_rss->rss_table_size_log = 7;\n-\tt_rss->update_rss_config = 1;\n-\n-\t/* Make sure RSS is actually required */\n-\tfor_each_hwfn(edev, fn) {\n-\t\tfor (i = 1; i < ECORE_RSS_IND_TABLE_SIZE / edev->num_hwfns;\n-\t\t     i++) {\n-\t\t\tif (rss[fn].rss_ind_table[i] !=\n-\t\t\t    rss[fn].rss_ind_table[0])\n-\t\t\t\tbreak;\n-\t\t}\n-\n-\t\tif (i == ECORE_RSS_IND_TABLE_SIZE / edev->num_hwfns) {\n-\t\t\tDP_INFO(edev,\n-\t\t\t\t\"CMT - 1 queue per-hwfn; Disabling RSS\\n\");\n-\t\t\trss_mode = 0;\n-\t\t\tgoto out;\n-\t\t}\n-\t}\n-\n-out:\n-\tt_rss->rss_enable = rss_mode;\n-\n-\treturn rss_mode;\n-}\n-\n int qede_rss_reta_update(struct rte_eth_dev *eth_dev,\n \t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n \t\t\t uint16_t reta_size)\n@@ -2119,8 +2067,8 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev,\n \tstruct ecore_dev *edev = QEDE_INIT_EDEV(qdev);\n \tstruct ecore_sp_vport_update_params vport_update_params;\n \tstruct ecore_rss_params *params;\n+\tuint16_t i, j, idx, fid, shift;\n \tstruct ecore_hwfn *p_hwfn;\n-\tuint16_t i, idx, shift;\n \tuint8_t entry;\n \tint rc = 0;\n \n@@ -2131,40 +2079,36 @@ int qede_rss_reta_update(struct rte_eth_dev *eth_dev,\n \t}\n \n \tmemset(&vport_update_params, 0, sizeof(vport_update_params));\n-\tparams = rte_zmalloc(\"qede_rss\", sizeof(*params) * edev->num_hwfns,\n-\t\t\t     RTE_CACHE_LINE_SIZE);\n+\tparams = rte_zmalloc(\"qede_rss\", sizeof(*params), RTE_CACHE_LINE_SIZE);\n \tif (params == NULL) {\n \t\tDP_ERR(edev, \"failed to allocate memory\\n\");\n \t\treturn -ENOMEM;\n \t}\n \n-\tfor (i = 0; i < reta_size; i++) {\n-\t\tidx = i / RTE_RETA_GROUP_SIZE;\n-\t\tshift = i % RTE_RETA_GROUP_SIZE;\n-\t\tif (reta_conf[idx].mask & (1ULL << shift)) {\n-\t\t\tentry = reta_conf[idx].reta[shift];\n-\t\t\t/* Pass rxq handles to ecore */\n-\t\t\tparams->rss_ind_table[i] =\n-\t\t\t\t\tqdev->fp_array[entry].rxq->handle;\n-\t\t\t/* Update the local copy for RETA query command */\n-\t\t\tqdev->rss_ind_table[i] = entry;\n-\t\t}\n-\t}\n-\n \tparams->update_rss_ind_table = 1;\n \tparams->rss_table_size_log = 7;\n \tparams->update_rss_config = 1;\n \n-\t/* Fix up RETA for CMT mode device */\n-\tif (ECORE_IS_CMT(edev))\n-\t\tqdev->rss_enable = qede_update_rss_parm_cmt(edev,\n-\t\t\t\t\t\t\t    params);\n \tvport_update_params.vport_id = 0;\n \t/* Use the current value of rss_enable */\n \tparams->rss_enable = qdev->rss_enable;\n \tvport_update_params.rss_params = params;\n \n \tfor_each_hwfn(edev, i) {\n+\t\tfor (j = 0; j < reta_size; j++) {\n+\t\t\tidx = j / RTE_RETA_GROUP_SIZE;\n+\t\t\tshift = j % RTE_RETA_GROUP_SIZE;\n+\t\t\tif (reta_conf[idx].mask & (1ULL << shift)) {\n+\t\t\t\tentry = reta_conf[idx].reta[shift];\n+\t\t\t\tfid = entry * edev->num_hwfns + i;\n+\t\t\t\t/* Pass rxq handles to ecore */\n+\t\t\t\tparams->rss_ind_table[j] =\n+\t\t\t\t\t\tqdev->fp_array[fid].rxq->handle;\n+\t\t\t\t/* Update the local copy for RETA query cmd */\n+\t\t\t\tqdev->rss_ind_table[j] = entry;\n+\t\t\t}\n+\t\t}\n+\n \t\tp_hwfn = &edev->hwfns[i];\n \t\tvport_update_params.opaque_fid = p_hwfn->hw_info.opaque_fid;\n \t\trc = ecore_sp_vport_update(p_hwfn, &vport_update_params,\n",
    "prefixes": [
        "v1",
        "3/5"
    ]
}