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GET /api/patches/58660/?format=api
{ "id": 58660, "url": "https://patches.dpdk.org/api/patches/58660/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190905145315.19395-6-ferruh.yigit@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190905145315.19395-6-ferruh.yigit@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190905145315.19395-6-ferruh.yigit@intel.com", "date": "2019-09-05T14:53:10", "name": "[05/10] crypto/dpaa2_sec: fix global variable multiple definitions", "commit_ref": null, "pull_url": null, "state": "rejected", "archived": true, "hash": "a5675c6527f24ee63ecf58ba98128b1f6e124632", "submitter": { "id": 324, "url": "https://patches.dpdk.org/api/people/324/?format=api", "name": "Ferruh Yigit", "email": "ferruh.yigit@intel.com" }, "delegate": { "id": 24651, "url": "https://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190905145315.19395-6-ferruh.yigit@intel.com/mbox/", "series": [ { "id": 6259, "url": "https://patches.dpdk.org/api/series/6259/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6259", "date": "2019-09-05T14:53:05", "name": "fix global variable multiple definitions", "version": 1, "mbox": "https://patches.dpdk.org/series/6259/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/58660/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/58660/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D21551EFEE;\n\tThu, 5 Sep 2019 16:53:36 +0200 (CEST)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n\tby dpdk.org (Postfix) with ESMTP id C60941EFA6;\n\tThu, 5 Sep 2019 16:53:27 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n\tby fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t05 Sep 2019 07:53:27 -0700", "from silpixa00399752.ir.intel.com (HELO\n\tsilpixa00399752.ger.corp.intel.com) ([10.237.223.78])\n\tby fmsmga008.fm.intel.com with ESMTP; 05 Sep 2019 07:53:25 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,470,1559545200\"; d=\"scan'208\";a=\"182846362\"", "From": "Ferruh Yigit <ferruh.yigit@intel.com>", "To": "Gagandeep Singh <g.singh@nxp.com>,\n\tHemant Agrawal <hemant.agrawal@nxp.com>, \n\tAkhil Goyal <akhil.goyal@nxp.com>", "Cc": "dev@dpdk.org,\n\tstable@dpdk.org", "Date": "Thu, 5 Sep 2019 15:53:10 +0100", "Message-Id": "<20190905145315.19395-6-ferruh.yigit@intel.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190905145315.19395-1-ferruh.yigit@intel.com>", "References": "<20190905145315.19395-1-ferruh.yigit@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 05/10] crypto/dpaa2_sec: fix global variable\n\tmultiple definitions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "'rta_sec_era' global variable is defined in 'crypto/dpaa2_sec',\n'crypto/caam_jr' & 'crypto/dpaa_sec' PMDs with the same name. This means\nthey share same storage when application linked with static DPDK\nlibrary, which is not the intention. Three differing drivers sharing\nsame global variable is a defect.\n\nVariable has been used by multiple header files in static inline\nfunctions and these header files are shared by all three PMDs, this\nforces using same variable name in three PMDs.\n\nSince the variable is used only single .c file in 'crypto/dpaa2_sec' &\n'crypto/dpaa_sec' converting global variable to 'static', this requires\nremoving 'extern' definition from header files, and this requires moving\nthe global variable definition before including those headers in .c\nfiles.\n\nFor 'crypto/caam_jr' multiple .c files exists and includes these\nheaders which prevent making variable static, so only one file has the\nglobal variable and others has 'extern' keyword on .c files.\n\nThis change should let all three drivers have their own storage for the\n'rta_sec_era' global variable without multiple definitions.\n\nFixes: 1d678de329ab (\"crypto/caam_jr: add basic job ring routines\")\nFixes: c3e85bdcc6e6 (\"crypto/dpaa_sec: add crypto driver for NXP DPAA platform\")\nCc: stable@dpdk.org\n\nSigned-off-by: Ferruh Yigit <ferruh.yigit@intel.com>\n---\n drivers/crypto/caam_jr/caam_jr.c | 5 +++--\n drivers/crypto/caam_jr/caam_jr_hw.c | 3 +++\n drivers/crypto/caam_jr/caam_jr_uio.c | 3 +++\n drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 5 +++--\n drivers/crypto/dpaa2_sec/hw/rta.h | 1 -\n drivers/crypto/dpaa2_sec/hw/rta/fifo_load_store_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/header_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/jump_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/key_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/load_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/math_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/move_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/nfifo_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/operation_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/protocol_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/seq_in_out_ptr_cmd.h | 2 --\n drivers/crypto/dpaa2_sec/hw/rta/store_cmd.h | 2 --\n drivers/crypto/dpaa_sec/dpaa_sec.c | 5 +++--\n 18 files changed, 15 insertions(+), 31 deletions(-)", "diff": "diff --git a/drivers/crypto/caam_jr/caam_jr.c b/drivers/crypto/caam_jr/caam_jr.c\nindex 77c030347..3503f806f 100644\n--- a/drivers/crypto/caam_jr/caam_jr.c\n+++ b/drivers/crypto/caam_jr/caam_jr.c\n@@ -17,6 +17,9 @@\n #include <rte_security_driver.h>\n #include <rte_hexdump.h>\n \n+#include <hw/rta/sec_run_time_asm.h>\n+enum rta_sec_era rta_sec_era;\n+\n #include <caam_jr_capabilities.h>\n #include <caam_jr_config.h>\n #include <caam_jr_hw_specific.h>\n@@ -34,8 +37,6 @@\n static uint8_t cryptodev_driver_id;\n int caam_jr_logtype;\n \n-enum rta_sec_era rta_sec_era;\n-\n /* Lists the states possible for the SEC user space driver. */\n enum sec_driver_state_e {\n \tSEC_DRIVER_STATE_IDLE,\t\t/* Driver not initialized */\ndiff --git a/drivers/crypto/caam_jr/caam_jr_hw.c b/drivers/crypto/caam_jr/caam_jr_hw.c\nindex 4a2b08995..0ea83622f 100644\n--- a/drivers/crypto/caam_jr/caam_jr_hw.c\n+++ b/drivers/crypto/caam_jr/caam_jr_hw.c\n@@ -11,6 +11,9 @@\n #include <rte_crypto.h>\n #include <rte_security.h>\n \n+#include <hw/rta/sec_run_time_asm.h>\n+extern enum rta_sec_era rta_sec_era;\n+\n #include <caam_jr_config.h>\n #include <caam_jr_hw_specific.h>\n #include <caam_jr_pvt.h>\ndiff --git a/drivers/crypto/caam_jr/caam_jr_uio.c b/drivers/crypto/caam_jr/caam_jr_uio.c\nindex afd75c9a6..acc1bb14c 100644\n--- a/drivers/crypto/caam_jr/caam_jr_uio.c\n+++ b/drivers/crypto/caam_jr/caam_jr_uio.c\n@@ -18,6 +18,9 @@\n #include <rte_crypto.h>\n #include <rte_security.h>\n \n+#include <hw/rta/sec_run_time_asm.h>\n+extern enum rta_sec_era rta_sec_era;\n+\n #include <caam_jr_config.h>\n #include <caam_jr_hw_specific.h>\n #include <caam_jr_pvt.h>\ndiff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\nindex 26458e5d1..a1483df7f 100644\n--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n@@ -28,6 +28,9 @@\n #include <fsl_dpseci.h>\n #include <fsl_mc_sys.h>\n \n+#include <hw/rta/sec_run_time_asm.h>\n+static enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;\n+\n #include \"dpaa2_sec_priv.h\"\n #include \"dpaa2_sec_event.h\"\n #include \"dpaa2_sec_logs.h\"\n@@ -58,8 +61,6 @@ typedef uint64_t\tdma_addr_t;\n #define SEC_FLC_DHR_OUTBOUND\t-114\n #define SEC_FLC_DHR_INBOUND\t0\n \n-enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;\n-\n static uint8_t cryptodev_driver_id;\n \n int dpaa2_logtype_sec;\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta.h b/drivers/crypto/dpaa2_sec/hw/rta.h\nindex c4bbad0b4..8a9f87fd1 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta.h\n@@ -149,7 +149,6 @@\n * - SEC HW block revision format is \"v\"\n * - SEC revision format is \"x.y\"\n */\n-extern enum rta_sec_era rta_sec_era;\n \n /**\n * rta_set_sec_era - Set SEC Era HW block revision for which the RTA library\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/fifo_load_store_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/fifo_load_store_cmd.h\nindex 8c807aaa2..0ec21b07b 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/fifo_load_store_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/fifo_load_store_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_FIFO_LOAD_STORE_CMD_H__\n #define __RTA_FIFO_LOAD_STORE_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n static const uint32_t fifo_load_table[][2] = {\n /*1*/\t{ PKA0, FIFOLD_CLASS_CLASS1 | FIFOLD_TYPE_PK_A0 },\n \t{ PKA1, FIFOLD_CLASS_CLASS1 | FIFOLD_TYPE_PK_A1 },\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/header_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/header_cmd.h\nindex 0c7ea9387..dab69ad5c 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/header_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/header_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_HEADER_CMD_H__\n #define __RTA_HEADER_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n /* Allowed job header flags for each SEC Era. */\n static const uint32_t job_header_flags[] = {\n \tDNR | TD | MTD | SHR | REO,\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/jump_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/jump_cmd.h\nindex 546d22e98..b915e1cd9 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/jump_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/jump_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_JUMP_CMD_H__\n #define __RTA_JUMP_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n static const uint32_t jump_test_cond[][2] = {\n \t{ NIFP, JUMP_COND_NIFP },\n \t{ NIP, JUMP_COND_NIP },\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/key_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/key_cmd.h\nindex 1ec21234a..f6dee13c6 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/key_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/key_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_KEY_CMD_H__\n #define __RTA_KEY_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n /* Allowed encryption flags for each SEC Era */\n static const uint32_t key_enc_flags[] = {\n \tENC,\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/load_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/load_cmd.h\nindex f3b0dcfcb..6ed7d5ce5 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/load_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/load_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_LOAD_CMD_H__\n #define __RTA_LOAD_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n /* Allowed length and offset masks for each SEC Era in case DST = DCTRL */\n static const uint32_t load_len_mask_allowed[] = {\n \t0x000000ee,\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/math_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/math_cmd.h\nindex 5b28cbabb..6b0ea7cb8 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/math_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/math_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_MATH_CMD_H__\n #define __RTA_MATH_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n static const uint32_t math_op1[][2] = {\n /*1*/\t{ MATH0, MATH_SRC0_REG0 },\n \t{ MATH1, MATH_SRC0_REG1 },\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/move_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/move_cmd.h\nindex a7ff7c675..a5d2508ed 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/move_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/move_cmd.h\n@@ -24,8 +24,6 @@\n #define __MOVEB\t\t2\n #define __MOVEDW\t3\n \n-extern enum rta_sec_era rta_sec_era;\n-\n static const uint32_t move_src_table[][2] = {\n /*1*/\t{ CONTEXT1, MOVE_SRC_CLASS1CTX },\n \t{ CONTEXT2, MOVE_SRC_CLASS2CTX },\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/nfifo_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/nfifo_cmd.h\nindex 94f775e2e..2f56f8955 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/nfifo_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/nfifo_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_NFIFO_CMD_H__\n #define __RTA_NFIFO_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n static const uint32_t nfifo_src[][2] = {\n /*1*/\t{ IFIFO, NFIFOENTRY_STYPE_DFIFO },\n \t{ OFIFO, NFIFOENTRY_STYPE_OFIFO },\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/operation_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/operation_cmd.h\nindex b85760e5b..7262327e7 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/operation_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/operation_cmd.h\n@@ -12,8 +12,6 @@\n #pragma GCC diagnostic ignored \"-Wimplicit-fallthrough\"\n #endif\n \n-extern enum rta_sec_era rta_sec_era;\n-\n static inline int\n __rta_alg_aai_aes(uint16_t aai)\n {\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/protocol_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/protocol_cmd.h\nindex cf8dfb910..1001e6ca9 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/protocol_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/protocol_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_PROTOCOL_CMD_H__\n #define __RTA_PROTOCOL_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n static inline int\n __rta_ssl_proto(uint16_t protoinfo)\n {\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/seq_in_out_ptr_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/seq_in_out_ptr_cmd.h\nindex ceb6a8719..1a22c0702 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/seq_in_out_ptr_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/seq_in_out_ptr_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_SEQ_IN_OUT_PTR_CMD_H__\n #define __RTA_SEQ_IN_OUT_PTR_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n /* Allowed SEQ IN PTR flags for each SEC Era. */\n static const uint32_t seq_in_ptr_flags[] = {\n \tRBS | INL | SGF | PRE | EXT | RTO,\ndiff --git a/drivers/crypto/dpaa2_sec/hw/rta/store_cmd.h b/drivers/crypto/dpaa2_sec/hw/rta/store_cmd.h\nindex 8b58e544d..da847118c 100644\n--- a/drivers/crypto/dpaa2_sec/hw/rta/store_cmd.h\n+++ b/drivers/crypto/dpaa2_sec/hw/rta/store_cmd.h\n@@ -8,8 +8,6 @@\n #ifndef __RTA_STORE_CMD_H__\n #define __RTA_STORE_CMD_H__\n \n-extern enum rta_sec_era rta_sec_era;\n-\n static const uint32_t store_src_table[][2] = {\n /*1*/\t{ KEY1SZ, LDST_CLASS_1_CCB | LDST_SRCDST_WORD_KEYSZ_REG },\n \t{ KEY2SZ, LDST_CLASS_2_CCB | LDST_SRCDST_WORD_KEYSZ_REG },\ndiff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c\nindex 122c80a07..578e3cd05 100644\n--- a/drivers/crypto/dpaa_sec/dpaa_sec.c\n+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c\n@@ -29,6 +29,9 @@\n #include <fsl_qman.h>\n #include <of.h>\n \n+#include <hw/rta/sec_run_time_asm.h>\n+static enum rta_sec_era rta_sec_era;\n+\n /* RTA header files */\n #include <hw/desc/common.h>\n #include <hw/desc/algo.h>\n@@ -39,8 +42,6 @@\n #include <dpaa_sec.h>\n #include <dpaa_sec_log.h>\n \n-enum rta_sec_era rta_sec_era;\n-\n int dpaa_logtype_sec;\n \n static uint8_t cryptodev_driver_id;\n", "prefixes": [ "05/10" ] }