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GET /api/patches/58545/?format=api
{ "id": 58545, "url": "https://patches.dpdk.org/api/patches/58545/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190903221522.151382-2-ying.a.wang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190903221522.151382-2-ying.a.wang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190903221522.151382-2-ying.a.wang@intel.com", "date": "2019-09-03T22:15:19", "name": "[1/4] net/ice: add devargs to control pipeline mode", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "932f6c698dc86e908cc1199b0f106a77c9b8612b", "submitter": { "id": 1280, "url": "https://patches.dpdk.org/api/people/1280/?format=api", "name": "Ying Wang", "email": "ying.a.wang@intel.com" }, "delegate": { "id": 31221, "url": "https://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190903221522.151382-2-ying.a.wang@intel.com/mbox/", "series": [ { "id": 6228, "url": "https://patches.dpdk.org/api/series/6228/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6228", "date": "2019-09-03T22:15:18", "name": "rework for ice generic flow framework and switch filter", "version": 1, "mbox": "https://patches.dpdk.org/series/6228/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/58545/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/58545/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5EDA71ECEE;\n\tWed, 4 Sep 2019 08:37:14 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n\tby dpdk.org (Postfix) with ESMTP id 101561E565\n\tfor <dev@dpdk.org>; Wed, 4 Sep 2019 08:37:10 +0200 (CEST)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t03 Sep 2019 23:37:10 -0700", "from npg-dpdk-cvl-yingwang-117d84.sh.intel.com ([10.67.117.84])\n\tby fmsmga004.fm.intel.com with ESMTP; 03 Sep 2019 23:37:09 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,465,1559545200\"; d=\"scan'208\";a=\"207359980\"", "From": "Ying Wang <ying.a.wang@intel.com>", "To": "qi.z.zhang@intel.com", "Cc": "xiaolong.ye@intel.com, qiming.yang@intel.com, dev@dpdk.org,\n\tying.a.wang@intel.com, wei.zhao1@intel.com", "Date": "Wed, 4 Sep 2019 06:15:19 +0800", "Message-Id": "<20190903221522.151382-2-ying.a.wang@intel.com>", "X-Mailer": "git-send-email 2.15.1", "In-Reply-To": "<20190903221522.151382-1-ying.a.wang@intel.com>", "References": "<20190903221522.151382-1-ying.a.wang@intel.com>", "Subject": "[dpdk-dev] [PATCH 1/4] net/ice: add devargs to control pipeline mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Qiming Yang <qiming.yang@intel.com>\n\nAdded a devarg to control the mode in generic flow API.\nWe use none-pipeline mode by default.\n\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\n---\n doc/guides/nics/ice.rst | 11 +++++++++++\n drivers/net/ice/ice_ethdev.c | 16 +++++++++++++++-\n drivers/net/ice/ice_ethdev.h | 1 +\n 3 files changed, 27 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst\nindex 03819d29f..a8429a535 100644\n--- a/doc/guides/nics/ice.rst\n+++ b/doc/guides/nics/ice.rst\n@@ -61,6 +61,17 @@ Runtime Config Options\n NOTE: In Safe mode, only very limited features are available, features like RSS,\n checksum, fdir, tunneling ... are all disabled.\n \n+- ``Generic Flow Pipeline Mode Support`` (default ``0``)\n+\n+ In pipeline mode, a flow can be setted at one specific stage by setting parameter\n+ ``priority``. Currently, we support two stages, priority 0 for permission and 1 for\n+ distributor. For none-pipeline mode, all flows are assumed to be at the same pipeline\n+ stage, priority is ignored. Default, generic flow API is enabled in none pipeline mode,\n+ user can choose to use pipeline mode by set ``devargs`` parameter ``pipeline-mode-support``,\n+ for example::\n+\n+ -w 80:00.0, pipleline-mode-support=1\n+\n Driver compilation and testing\n ------------------------------\n \ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 9aa7506ba..4e0645db1 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -19,9 +19,11 @@\n \n /* devargs */\n #define ICE_SAFE_MODE_SUPPORT_ARG \"safe-mode-support\"\n+#define ICE_PIPELINE_MODE_SUPPORT_ARG \"pipeline-mode-support\"\n \n static const char * const ice_valid_args[] = {\n \tICE_SAFE_MODE_SUPPORT_ARG,\n+\tICE_PIPELINE_MODE_SUPPORT_ARG,\n \tNULL\n };\n \n@@ -1510,7 +1512,18 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)\n \n \tret = rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG,\n \t\t\t\t &parse_bool, &ad->devargs.safe_mode_support);\n+\tif (ret)\n+\t\tgoto err_devargs;\n+\n+\tret = rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG,\n+\t\t\t\t &parse_bool, &ad->devargs.pipeline_mode_support);\n+\tif (ret)\n+\t\tgoto err_devargs;\n+\n+\trte_kvargs_free(kvlist);\n+\treturn ret;\n \n+err_devargs:\n \trte_kvargs_free(kvlist);\n \treturn ret;\n }\n@@ -3925,7 +3938,8 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);\n RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);\n RTE_PMD_REGISTER_KMOD_DEP(net_ice, \"* igb_uio | uio_pci_generic | vfio-pci\");\n RTE_PMD_REGISTER_PARAM_STRING(net_ice,\n-\t\t\t ICE_SAFE_MODE_SUPPORT_ARG \"=<0|1>\");\n+\t\t\tICE_SAFE_MODE_SUPPORT_ARG \"=<0|1>\"\n+\t\t\tICE_PIPELINE_MODE_SUPPORT_ARG \"=<0|1>\");\n \n RTE_INIT(ice_init_log)\n {\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex 926db23d2..9bf5de08d 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -285,6 +285,7 @@ struct ice_pf {\n */\n struct ice_devargs {\n \tint safe_mode_support;\n+\tint pipeline_mode_support;\n };\n \n /**\n", "prefixes": [ "1/4" ] }