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GET /api/patches/58440/?format=api
{ "id": 58440, "url": "https://patches.dpdk.org/api/patches/58440/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190903032337.24780-1-kirankumark@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190903032337.24780-1-kirankumark@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190903032337.24780-1-kirankumark@marvell.com", "date": "2019-09-03T03:23:37", "name": "net/octeontx2: add tx desc status dev ops", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4824449885f0a24de897022c65e211514a46285c", "submitter": { "id": 1260, "url": "https://patches.dpdk.org/api/people/1260/?format=api", "name": "Kiran Kumar Kokkilagadda", "email": "kirankumark@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190903032337.24780-1-kirankumark@marvell.com/mbox/", "series": [ { "id": 6210, "url": "https://patches.dpdk.org/api/series/6210/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6210", "date": "2019-09-03T03:23:37", "name": "net/octeontx2: add tx desc status dev ops", "version": 1, "mbox": "https://patches.dpdk.org/series/6210/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/58440/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/58440/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 42A5F1C1D6;\n\tTue, 3 Sep 2019 05:24:15 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 985277CCA\n\tfor <dev@dpdk.org>; Tue, 3 Sep 2019 05:24:13 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n\tx833LWRP024321; Mon, 2 Sep 2019 20:24:12 -0700", "from sc-exch03.marvell.com ([199.233.58.183])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2uqrdm7xhs-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tMon, 02 Sep 2019 20:24:12 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tMon, 2 Sep 2019 20:24:09 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Mon, 2 Sep 2019 20:24:09 -0700", "from localhost.localdomain (unknown [10.28.34.15])\n\tby maili.marvell.com (Postfix) with ESMTP id 082EB3F703F;\n\tMon, 2 Sep 2019 20:24:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : mime-version : content-type; s=pfpt0818;\n\tbh=2YToas835CvW8nVXYbWkzX5sYwD7EsiZVuyEkc9cJKM=;\n\tb=wOnI0xjJ/l0wQ2VYmSp3nXAcJP3JixJkSZjuwf1upXPh6DyY1orCvSM0Adwebu7APFP4\n\tvWSDoqqGyyvAtB2gizjuRKyu3i0KiTNnqdYvDutFoy18U0U5G4Q2eCNvoALIg/kuCD7T\n\tnGbCLeQ7mvuJ2v5rqConlG3kJI8pXHkycxVJ3yaXIDIDrsRrZy/2m2/+V/PsT+jgE9gu\n\tS8GPckvoV4LFqDB8xrUKfoc1slDFu2z7oU7rrzA1UeJUk6MfQCm5p/4b6Sov+Vq17d7G\n\tEmQWT5CTLoK2THLZVuAtt8XcdvXQgYvnKgDqYNlZWSvu4QHGlaPJIy1XiVtexD+OBqIa\n\tUQ== ", "From": "<kirankumark@marvell.com>", "To": "Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>, \"John\n\tMcNamara\" <john.mcnamara@intel.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>", "CC": "<dev@dpdk.org>", "Date": "Tue, 3 Sep 2019 08:53:37 +0530", "Message-ID": "<20190903032337.24780-1-kirankumark@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.70,1.0.8\n\tdefinitions=2019-09-02_10:2019-08-29,2019-09-02 signatures=0", "Subject": "[dpdk-dev] [PATCH] net/octeontx2: add tx desc status dev ops", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding support for tx descriptor status dev ops for octeontx2.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\n---\n doc/guides/nics/features/octeontx2.ini | 1 +\n drivers/net/octeontx2/otx2_ethdev.c | 1 +\n drivers/net/octeontx2/otx2_ethdev.h | 1 +\n drivers/net/octeontx2/otx2_ethdev_ops.c | 38 ++++++++++++++++++++++++-\n 4 files changed, 40 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini\nindex 66952328b..b89959994 100644\n--- a/doc/guides/nics/features/octeontx2.ini\n+++ b/doc/guides/nics/features/octeontx2.ini\n@@ -39,6 +39,7 @@ Packet type parsing = Y\n Timesync = Y\n Timestamp offload = Y\n Rx descriptor status = Y\n+Tx descriptor status = Y\n Basic stats = Y\n Stats per queue = Y\n Extended stats = Y\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex b84128fef..696c85cb8 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -1646,6 +1646,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {\n \t.rx_queue_count = otx2_nix_rx_queue_count,\n \t.rx_descriptor_done = otx2_nix_rx_descriptor_done,\n \t.rx_descriptor_status = otx2_nix_rx_descriptor_status,\n+\t.tx_descriptor_status = otx2_nix_tx_descriptor_status,\n \t.tx_done_cleanup = otx2_nix_tx_done_cleanup,\n \t.pool_ops_supported = otx2_nix_pool_ops_supported,\n \t.filter_ctrl = otx2_nix_dev_filter_ctrl,\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex 7b15d6bc8..1c660cb1e 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -377,6 +377,7 @@ uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx);\n int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);\n int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);\n int otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset);\n+int otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset);\n \n void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en);\n void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev);\ndiff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c\nindex 7c6532b6f..064a1fe44 100644\n--- a/drivers/net/octeontx2/otx2_ethdev_ops.c\n+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c\n@@ -274,7 +274,7 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset)\n \tstruct otx2_eth_rxq *rxq = rx_queue;\n \tuint32_t head, tail;\n \n-\tif (rxq->qlen >= offset)\n+\tif (rxq->qlen <= offset)\n \t\treturn -EINVAL;\n \n \tnix_rx_head_tail_get(otx2_eth_pmd_priv(rxq->eth_dev),\n@@ -286,6 +286,42 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset)\n \t\treturn RTE_ETH_RX_DESC_AVAIL;\n }\n \n+static void\n+nix_tx_head_tail_get(struct otx2_eth_dev *dev,\n+\t\t uint32_t *head, uint32_t *tail, uint16_t queue_idx)\n+{\n+\tuint64_t reg, val;\n+\n+\tif (head == NULL || tail == NULL)\n+\t\treturn;\n+\n+\treg = (((uint64_t)queue_idx) << 32);\n+\tval = otx2_atomic64_add_nosync(reg, (int64_t *)\n+\t\t\t\t (dev->base + NIX_LF_SQ_OP_STATUS));\n+\tif (val & OP_ERR)\n+\t\tval = 0;\n+\n+\t*tail = (uint32_t)((val >> 28) & 0x3F);\n+\t*head = (uint32_t)((val >> 20) & 0x3F);\n+}\n+\n+int\n+otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset)\n+{\n+\tstruct otx2_eth_txq *txq = tx_queue;\n+\tuint32_t head, tail;\n+\n+\tif (txq->nb_sqb_bufs <= offset)\n+\t\treturn -EINVAL;\n+\n+\tnix_tx_head_tail_get(txq->dev, &head, &tail, txq->sq);\n+\n+\tif (nix_offset_has_packet(head, tail, offset))\n+\t\treturn RTE_ETH_TX_DESC_DONE;\n+\telse\n+\t\treturn RTE_ETH_TX_DESC_FULL;\n+}\n+\n /* It is a NOP for octeontx2 as HW frees the buffer on xmit */\n int\n otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)\n", "prefixes": [] }