Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/57905/?format=api
{ "id": 57905, "url": "https://patches.dpdk.org/api/patches/57905/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190826105105.19121-10-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190826105105.19121-10-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190826105105.19121-10-qi.z.zhang@intel.com", "date": "2019-08-26T10:50:11", "name": "[09/63] net/ice/base: add SFF EEPROM AQ Command", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c784920c1c03bb4bb34f6b4c8867f785c3e2b4d9", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190826105105.19121-10-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 6119, "url": "https://patches.dpdk.org/api/series/6119/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6119", "date": "2019-08-26T10:50:02", "name": "net/ice/base: update base code", "version": 1, "mbox": "https://patches.dpdk.org/series/6119/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/57905/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/57905/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id F31FD1C024;\n\tMon, 26 Aug 2019 12:48:48 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id 5EC1E1BFF1\n\tfor <dev@dpdk.org>; Mon, 26 Aug 2019 12:48:42 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t26 Aug 2019 03:48:42 -0700", "from dpdk51.sh.intel.com ([10.67.110.245])\n\tby orsmga003.jf.intel.com with ESMTP; 26 Aug 2019 03:48:40 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,431,1559545200\"; d=\"scan'208\";a=\"182402105\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "wenzhuo.lu@intel.com,\n\tqiming.yang@intel.com", "Cc": "dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n\tScott W Taylor <scott.w.taylor@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Mon, 26 Aug 2019 18:50:11 +0800", "Message-Id": "<20190826105105.19121-10-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20190826105105.19121-1-qi.z.zhang@intel.com>", "References": "<20190826105105.19121-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 09/63] net/ice/base: add SFF EEPROM AQ Command", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "read/write module eeprom on i2c bus.\n\nSigned-off-by: Scott W Taylor <scott.w.taylor@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 29 ++++++++++++++++++++++\n drivers/net/ice/base/ice_common.c | 46 +++++++++++++++++++++++++++++++++++\n drivers/net/ice/base/ice_common.h | 5 +++-\n 3 files changed, 79 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex 9e5853cca..4de69dd7a 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -1660,6 +1660,33 @@ struct ice_aqc_set_port_id_led {\n \n \n \n+/* Read/Write SFF EEPROM command (indirect 0x06EE) */\n+struct ice_aqc_sff_eeprom {\n+\tu8 lport_num;\n+\tu8 lport_num_valid;\n+#define ICE_AQC_SFF_PORT_NUM_VALID\tBIT(0)\n+\t__le16 i2c_bus_addr;\n+#define ICE_AQC_SFF_I2CBUS_7BIT_M\t0x7F\n+#define ICE_AQC_SFF_I2CBUS_10BIT_M\t0x3FF\n+#define ICE_AQC_SFF_I2CBUS_TYPE_M\tBIT(10)\n+#define ICE_AQC_SFF_I2CBUS_TYPE_7BIT\t0\n+#define ICE_AQC_SFF_I2CBUS_TYPE_10BIT\tICE_AQC_SFF_I2CBUS_TYPE_M\n+#define ICE_AQC_SFF_SET_EEPROM_PAGE_S\t11\n+#define ICE_AQC_SFF_SET_EEPROM_PAGE_M\t(0x3 << ICE_AQC_SFF_SET_EEPROM_PAGE_S)\n+#define ICE_AQC_SFF_NO_PAGE_CHANGE\t0\n+#define ICE_AQC_SFF_SET_23_ON_MISMATCH\t1\n+#define ICE_AQC_SFF_SET_22_ON_MISMATCH\t2\n+#define ICE_AQC_SFF_IS_WRITE\t\tBIT(15)\n+\t__le16 i2c_mem_addr;\n+\t__le16 eeprom_page;\n+#define ICE_AQC_SFF_EEPROM_BANK_S 0\n+#define ICE_AQC_SFF_EEPROM_BANK_M (0xFF << ICE_AQC_SFF_EEPROM_BANK_S)\n+#define ICE_AQC_SFF_EEPROM_PAGE_S 8\n+#define ICE_AQC_SFF_EEPROM_PAGE_M (0xFF << ICE_AQC_SFF_EEPROM_PAGE_S)\n+\t__le32 addr_high;\n+\t__le32 addr_low;\n+};\n+\n /* NVM Read command (indirect 0x0701)\n * NVM Erase commands (direct 0x0702)\n * NVM Update commands (indirect 0x0703)\n@@ -2218,6 +2245,7 @@ struct ice_aq_desc {\n \t\tstruct ice_aqc_get_phy_caps get_phy;\n \t\tstruct ice_aqc_set_phy_cfg set_phy;\n \t\tstruct ice_aqc_restart_an restart_an;\n+\t\tstruct ice_aqc_sff_eeprom read_write_sff_param;\n \t\tstruct ice_aqc_set_port_id_led set_port_id_led;\n \t\tstruct ice_aqc_get_sw_cfg get_sw_conf;\n \t\tstruct ice_aqc_sw_rules sw_rules;\n@@ -2431,6 +2459,7 @@ enum ice_adminq_opc {\n \tice_aqc_opc_set_port_option\t\t\t= 0x06EB,\n \tice_aqc_opc_set_gpio\t\t\t\t= 0x06EC,\n \tice_aqc_opc_get_gpio\t\t\t\t= 0x06ED,\n+\tice_aqc_opc_sff_eeprom\t\t\t\t= 0x06EE,\n \n \t/* NVM commands */\n \tice_aqc_opc_nvm_read\t\t\t\t= 0x0701,\ndiff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 43c06948f..cd94995f4 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -2860,6 +2860,52 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,\n }\n \n /**\n+ * ice_aq_sff_eeprom\n+ * @hw: pointer to the HW struct\n+ * @lport: bits [7:0] = logical port, bit [8] = logical port valid\n+ * @bus_addr: I2C bus address of the eeprom (typically 0xA0, 0=topo default)\n+ * @mem_addr: I2C offset. lower 8 bits for address, 8 upper bits zero padding.\n+ * @page: QSFP page\n+ * @set_page: set or ignore the page\n+ * @data: pointer to data buffer to be read/written to the I2C device.\n+ * @length: 1-16 for read, 1 for write.\n+ * @write: 0 read, 1 for write.\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Read/Write SFF EEPROM (0x06EE)\n+ */\n+enum ice_status\n+ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,\n+\t\t u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,\n+\t\t bool write, struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_sff_eeprom *cmd;\n+\tstruct ice_aq_desc desc;\n+\tenum ice_status status;\n+\n+\tif (!data || (mem_addr & 0xff00))\n+\t\treturn ICE_ERR_PARAM;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_sff_eeprom);\n+\tcmd = &desc.params.read_write_sff_param;\n+\tdesc.flags = CPU_TO_LE16(ICE_AQ_FLAG_RD | ICE_AQ_FLAG_BUF);\n+\tcmd->lport_num = (u8)(lport & 0xff);\n+\tcmd->lport_num_valid = (u8)((lport >> 8) & 0x01);\n+\tcmd->i2c_bus_addr = CPU_TO_LE16(((bus_addr >> 1) &\n+\t\t\t\t\t ICE_AQC_SFF_I2CBUS_7BIT_M) |\n+\t\t\t\t\t((set_page <<\n+\t\t\t\t\t ICE_AQC_SFF_SET_EEPROM_PAGE_S) &\n+\t\t\t\t\t ICE_AQC_SFF_SET_EEPROM_PAGE_M));\n+\tcmd->i2c_mem_addr = CPU_TO_LE16(mem_addr & 0xff);\n+\tcmd->eeprom_page = CPU_TO_LE16((u16)page << ICE_AQC_SFF_EEPROM_PAGE_S);\n+\tif (write)\n+\t\tcmd->i2c_bus_addr |= CPU_TO_LE16(ICE_AQC_SFF_IS_WRITE);\n+\n+\tstatus = ice_aq_send_cmd(hw, &desc, data, length, cd);\n+\treturn status;\n+}\n+\n+/**\n * __ice_aq_get_set_rss_lut\n * @hw: pointer to the hardware structure\n * @vsi_id: VSI FW index\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex 4e44c2f13..d865021bf 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -163,7 +163,10 @@ ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);\n enum ice_status\n ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,\n \t\t struct ice_sq_cd *cd);\n-\n+enum ice_status\n+ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,\n+\t\t u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,\n+\t\t bool write, struct ice_sq_cd *cd);\n \n \n enum ice_status\n", "prefixes": [ "09/63" ] }